About the Execution of TY for Kanban-PT-00050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4409.067 | 672074.00 | 2673739.00 | 110.20 | TFFTFFTFFFTFFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2026-input.r166-smll-177961109500262.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2026-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5973
Executing tool TY
Input is Kanban-PT-00050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r166-smll-177961109500262
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 6.8K Mar 7 16:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Mar 7 16:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Mar 7 16:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Mar 7 16:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Mar 15 11:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Mar 15 11:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 15 11:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 15 11:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.7K Mar 7 16:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Mar 7 16:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Mar 7 16:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Mar 7 16:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 15 11:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 15 11:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 14K Mar 3 18:30 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
echo here is the order used to build the result vector(from xml file)
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-00
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-01
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-02
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-03
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-04
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-05
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-06
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-07
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-08
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-09
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-10
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-11
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-12
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-13
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-14
FORMULA_NAME Kanban-PT-00050-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1780233985518
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-09 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-10 TRUE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-00 TRUE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-01 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-02 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-03 TRUE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-04 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-05 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-06 TRUE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-07 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-08 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-11 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-12 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-13 FALSE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-14 TRUE TECHNIQUES EXPLICIT
FORMULA Kanban-PT-00050-ReachabilityCardinality-2024-15 TRUE TECHNIQUES EXPLICIT
BK_STOP 1780234657592
--------------------
content from stderr:
TY MCC
Host: mcc2026
BK_TOOL: TY
Input: /home/mcc/execution
Examination: ReachabilityCardinality
Threads: 4
Storage: /tmp/ty-mcc-storage
Fingerprint set backend: cas
Backend evidence: /tmp/ty-mcc-storage/backend-capability.jsonl
auto-sized (FingerprintOnly): 16 places (12 packed, 9B exact) × 1B/place max = 57B/state → primary_capacity=360201049 state_limit=unbounded
IntelligenceBus: LP seeded 16 place bounds
IntelligenceBus: published 10 P-invariant constraints
Bounded witness BFS seeded 1/16 reachability verdicts after visiting 37551 states
BMC: ay not found, skipping bounded model checking
BMC seeded 1/16 reachability verdicts
MCC reachability_answer_lane_summary lane=post_smt_witness_bfs status=incomplete stop_reason=state_cap skip_reason=none property_count=16 residual_before=15 seeded=1 unresolved_after=14 visited_states=155703 configured_max_states=200000 effective_max_states=200000 phase_cap_ms=2000 completed=false elapsed_ms=815
AIGER encoding: 96 latches, 16 transitions, 16 constraints
preprocess: latches 96->96->90 inputs 16->16->16 gates 1926->1926->1476 clauses 5941->4433 const_elim=0 scorr_elim=6(iters=7) frts_elim=2 bve_elim=0 frts_bve_iters=2 rewrite_elim=0 dag_rewrite_elim=128 refactor_elim=0 synthesis(rounds=3,gates=-6,depth=-0) ternary=0 ternary_sim=0 renumber=785
Compaction: max_var 1584->1584 (0% reduction)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 blocked=0 natural_exit=true
IC3 propagate: all frames [1..2) empty — trivially-safe convergence (#4247)
IC3 CONVERGED at depth=2
IC3 validate: SKIPPING full validation (medium circuit: 90 latches, 80-200 range, #4106)
IC3 depth=2 blocked=0 natural_exit=true
IC3 propagate: all frames [1..2) empty — trivially-safe convergence (#4247)
IC3 CONVERGED at depth=2
IC3 validate: SKIPPING full validation (medium circuit: 90 latches, 80-200 range, #4106)
IC3 domain stats: consecution(restricted=1 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=99.6%
IC3 consecution stats: queries=1 unsat=0 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=1 full_solver=0
lift: ternary prefilter removed 41/90 state lits
IC3 domain stats: consecution(restricted=1 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=26.4%
IC3 consecution stats: queries=1 unsat=0 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=1 full_solver=0
IC3 depth=2 blocked=0 natural_exit=true
IC3 propagate: all frames [1..2) empty — trivially-safe convergence (#4247)
IC3 CONVERGED at depth=2
IC3 validate: SKIPPING full validation (medium circuit: 90 latches, 80-200 range, #4106)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 blocked=0 natural_exit=true
IC3 propagate: all frames [1..2) empty — trivially-safe convergence (#4247)
IC3 CONVERGED at depth=2
IC3 validate: SKIPPING full validation (medium circuit: 90 latches, 80-200 range, #4106)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 blocked=0 natural_exit=true
IC3 propagate: all frames [1..2) empty — trivially-safe convergence (#4247)
IC3 CONVERGED at depth=2
IC3 validate: SKIPPING full validation (medium circuit: 90 latches, 80-200 range, #4106)
IC3 domain stats: consecution(restricted=2 fallback=0 rate=100.0%) mic(restricted=3 fallback=0 rate=100.0%) avg_coverage=62.8%
IC3 consecution stats: queries=2 unsat=1 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=2 full_solver=0
IC3: 90 latches, 16 inputs, 15 constraints, 96 init_clauses, 4433 trans_clauses, 1 bad (trans/latch: 49.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 domain stats: consecution(restricted=1 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=26.4%
IC3 consecution stats: queries=1 unsat=0 sat=0 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=1 full_solver=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
Portfolio: 5 thread(s) still running after 3s grace period — detaching (#4096)
Random walk seeded 14/16 reachability verdicts
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Kanban-PT-00050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="TY"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool TY"
echo " Input is Kanban-PT-00050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-smll-177961109500262"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Kanban-PT-00050.tgz
mv Kanban-PT-00050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;