Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2026-input.r150-tall-177961076800865.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2026-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5973
Executing tool TY
Input is HouseConstruction-PT-00200, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r150-tall-177961076800865
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 6.7K Mar 7 16:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Mar 7 16:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Mar 7 16:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Mar 7 16:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Mar 15 10:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Mar 15 10:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 15 10:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 15 10:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Mar 7 16:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Mar 7 16:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Mar 7 16:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Mar 7 16:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 15 10:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 15 10:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 13K Mar 3 18:30 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-00
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-01
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-02
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-03
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-04
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-05
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-06
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-07
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-08
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-09
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-10
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-11
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-12
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-13
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-14
FORMULA_NAME HouseConstruction-PT-00200-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1780310628512

CANNOT_COMPUTE

BK_STOP 1780313875679

--------------------
content from stderr:

TY MCC
Host: mcc2026
BK_TOOL: TY
Input: /home/mcc/execution
Examination: CTLCardinality
Threads: 4
Storage: /tmp/ty-mcc-storage
Fingerprint set backend: cas
Backend evidence: /tmp/ty-mcc-storage/backend-capability.jsonl
auto-sized (FingerprintOnly): 26 places × 8B/place = 256B/state → primary_capacity=360108313 state_limit=unbounded
CTL shallow routing: 2/16 properties routed to reachability
IntelligenceBus: LP seeded 26 place bounds
BMC: ay not found, skipping bounded model checking
MCC reachability_answer_lane_summary lane=post_smt_witness_bfs status=incomplete stop_reason=state_cap skip_reason=none property_count=2 residual_before=2 seeded=0 unresolved_after=2 visited_states=150563 configured_max_states=200000 effective_max_states=200000 phase_cap_ms=2000 completed=false elapsed_ms=471
AIGER encoding: 208 latches, 18 transitions, 26 constraints
preprocess: timeout (25.3s) — skipping remaining phases
preprocess: latches 208->208->208 inputs 18->18->18 gates 3477->3477->2995 clauses 10639->8985 const_elim=0 scorr_elim=0(iters=0) frts_elim=0 bve_elim=0 frts_bve_iters=0 rewrite_elim=0 dag_rewrite_elim=0 refactor_elim=0 synthesis(rounds=0,gates=-0,depth=-0) ternary=0 ternary_sim=0 renumber=561
Compaction: max_var 3221->3221 (0% reduction)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 208 latches, 18 inputs, 26 constraints, 208 init_clauses, 8985 trans_clauses, 1 bad (trans/latch: 43.2x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
BMC(step=1): depth=10/50000 vars=35431 latches=208 elapsed=2.1s rate=5depth/s
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
BMC(geometric step=1): depth=13/50000 vars=45094 latches=208 elapsed=2.1s rate=6depth/s
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
BMC(step=10): depth=20/50000 vars=67661 latches=208 elapsed=2.6s rate=1depth/s
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
lift: ternary prefilter removed 206/208 state lits
IC3 domain stats: consecution(restricted=21 fallback=0 rate=100.0%) mic(restricted=5 fallback=0 rate=100.0%) avg_coverage=67.6%
IC3 consecution stats: queries=21 unsat=2 sat=18 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=21 full_solver=0
IC3 domain stats: consecution(restricted=17 fallback=0 rate=100.0%) mic(restricted=28 fallback=0 rate=100.0%) avg_coverage=71.9%
IC3 consecution stats: queries=17 unsat=11 sat=6 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=17 full_solver=0
IC3 domain stats: consecution(restricted=11 fallback=0 rate=100.0%) mic(restricted=13 fallback=0 rate=100.0%) avg_coverage=63.8%
IC3 consecution stats: queries=11 unsat=5 sat=5 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=11 full_solver=0
IC3 domain stats: consecution(restricted=23 fallback=0 rate=100.0%) mic(restricted=5 fallback=0 rate=100.0%) avg_coverage=66.7%
IC3 consecution stats: queries=23 unsat=2 sat=20 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=23 full_solver=0
IC3 domain stats: consecution(restricted=19 fallback=0 rate=100.0%) mic(restricted=5 fallback=0 rate=100.0%) avg_coverage=68.6%
IC3 consecution stats: queries=19 unsat=2 sat=17 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=19 full_solver=0
IC3 domain stats: consecution(restricted=23 fallback=0 rate=100.0%) mic(restricted=4 fallback=0 rate=100.0%) avg_coverage=66.7%
IC3 consecution stats: queries=23 unsat=2 sat=21 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=23 full_solver=0
lift: ternary prefilter removed 206/208 state lits
IC3 domain stats: consecution(restricted=29 fallback=0 rate=100.0%) mic(restricted=5 fallback=0 rate=100.0%) avg_coverage=64.8%
IC3 consecution stats: queries=29 unsat=2 sat=27 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=29 full_solver=0
IC3 domain stats: consecution(restricted=15 fallback=0 rate=100.0%) mic(restricted=21 fallback=0 rate=100.0%) avg_coverage=68.0%
IC3 consecution stats: queries=15 unsat=8 sat=6 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=15 full_solver=0
IC3 domain stats: consecution(restricted=3 fallback=0 rate=100.0%) mic(restricted=13 fallback=0 rate=100.0%) avg_coverage=72.0%
IC3 consecution stats: queries=3 unsat=2 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=3 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=14 fallback=0 rate=100.0%) avg_coverage=65.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
IC3 domain stats: consecution(restricted=18 fallback=0 rate=100.0%) mic(restricted=29 fallback=0 rate=100.0%) avg_coverage=68.9%
IC3 consecution stats: queries=18 unsat=11 sat=7 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=18 full_solver=0
IC3 domain stats: consecution(restricted=3 fallback=0 rate=100.0%) mic(restricted=14 fallback=0 rate=100.0%) avg_coverage=72.0%
IC3 consecution stats: queries=3 unsat=2 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=3 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=16 fallback=0 rate=100.0%) avg_coverage=65.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=17 fallback=0 rate=100.0%) avg_coverage=65.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
Portfolio: 4 thread(s) still running after 3s grace period — detaching (#4096)
Post-witness proof rescue: attempting 2 unresolved reachability properties
BMC: ay not found, skipping bounded model checking
BMC: ay not found, skipping bounded model checking
Reachability: predicate-referenced transitions eliminated by reduction, falling back to unreduced BFS
fingerprint-only CAS resident target capped from 360108313 to 33554432 states
fingerprint-only: 18013563 states, depth 47, fp_set 536870912B, collision_guard 7683964928B, workers 4
IntelligenceBus: 0 frontier states, 26 invariants, 26 bounds, 0/0 pruning checks hit
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-00 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-01 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-03 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-04 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-06 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-07 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-08 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-11 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
CTL local fallback: HouseConstruction-PT-00200-CTLCardinality-2024-13 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker hit the deadline)
memory allocation of 3355443216 bytes failed
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
/home/mcc/BenchKit/BenchKit_head.sh: line 392: 566 Aborted "${cmd[@]}" > "$stdout_capture"
ty-mcc exited with status 134

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00200"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="TY"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool TY"
echo " Input is HouseConstruction-PT-00200, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r150-tall-177961076800865"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00200.tgz
mv HouseConstruction-PT-00200 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;