Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2026-input.r134-smll-177955810700562.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2026-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5973
Executing tool TY
Input is FMS-PT-20000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r134-smll-177955810700562
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 6.9K Mar 7 05:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Mar 7 05:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Mar 7 05:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Mar 7 05:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Mar 15 10:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 15 10:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 15 10:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 15 10:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Mar 7 05:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Mar 7 05:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Mar 7 05:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Mar 7 05:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 15 10:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 15 10:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 16K Mar 3 18:30 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-00
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-01
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-02
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-03
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-04
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-05
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-06
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-07
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-08
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-09
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-10
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-11
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-12
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-13
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-14
FORMULA_NAME FMS-PT-20000-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1780493265739

FORMULA FMS-PT-20000-CTLFireability-2024-11 TRUE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-13 TRUE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-00 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-01 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-02 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-03 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-04 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-05 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-06 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-07 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-08 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-09 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-10 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-12 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-14 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA FMS-PT-20000-CTLFireability-2024-15 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL

BK_STOP 1780494428384

--------------------
content from stderr:

TY MCC
Host: mcc2026
BK_TOOL: TY
Input: /home/mcc/execution
Examination: CTLFireability
Threads: 4
Storage: /tmp/ty-mcc-storage
Fingerprint set backend: cas
Backend evidence: /tmp/ty-mcc-storage/backend-capability.jsonl
auto-sized (FingerprintOnly): 22 places (18 packed, 31B exact) × 2B/place max = 79B/state → primary_capacity=360085017 state_limit=unbounded
CTL shallow routing: 2/16 properties routed to reachability
IntelligenceBus: LP seeded 22 place bounds
IntelligenceBus: published 6 P-invariant constraints
Bounded witness BFS seeded 1/2 reachability verdicts after visiting 32442 states
BMC: ay not found, skipping bounded model checking
BMC seeded 1/2 reachability verdicts
MCC reachability_answer_lane_summary lane=post_smt_witness_bfs status=incomplete stop_reason=state_cap skip_reason=none property_count=2 residual_before=1 seeded=0 unresolved_after=1 visited_states=137803 configured_max_states=200000 effective_max_states=200000 phase_cap_ms=2000 completed=false elapsed_ms=829
AIGER encoding: 250 latches, 20 transitions, 18 constraints
preprocess: timeout (369.0s) — skipping remaining phases
preprocess: latches 250->250->250 inputs 20->20->20 gates 4862->4862->3883 clauses 14765->11649 const_elim=0 scorr_elim=0(iters=0) frts_elim=0 bve_elim=0 frts_bve_iters=0 rewrite_elim=0 dag_rewrite_elim=0 refactor_elim=0 synthesis(rounds=0,gates=-0,depth=-0) ternary=0 ternary_sim=0 renumber=1047
Compaction: max_var 4153->4153 (0% reduction)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 250 latches, 20 inputs, 18 constraints, 250 init_clauses, 11649 trans_clauses, 1 bad (trans/latch: 46.6x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
BMC(step=1): depth=8/50000 vars=37377 latches=250 elapsed=2.0s rate=4depth/s
BMC(geometric step=1): depth=10/50000 vars=45683 latches=250 elapsed=2.3s rate=4depth/s
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 propagate: all frames [1..2) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=3 lemmas=[0, 0, 0] total=0 inf=0
BMC(step=1): depth=13/50000 vars=58142 latches=250 elapsed=4.3s rate=3depth/s
BMC(geometric step=1): depth=14/50000 vars=62295 latches=250 elapsed=4.6s rate=3depth/s
IC3 depth=3 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=3 blocked=12 natural_exit=false
IC3 propagate: all frames [1..3) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=4 lemmas=[0, 0, 0, 0] total=0 inf=0
IC3 depth=3 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=3 blocked=12 natural_exit=false
IC3 propagate: all frames [1..3) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=4 lemmas=[0, 0, 0, 0] total=0 inf=0
IC3 depth=3 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=3 blocked=12 natural_exit=false
IC3 propagate: all frames [1..3) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=4 lemmas=[0, 0, 0, 0] total=0 inf=0
IC3 depth=3 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=3 blocked=12 natural_exit=false
IC3 propagate: all frames [1..3) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 depth=4 lemmas=[0, 0, 0, 0] total=0 inf=0
IC3 depth=3 bad cube repeated 11 times (cube_len=250) — advancing to next depth (#4139)
IC3 depth=3 blocked=12 natural_exit=false
IC3 propagate: all frames [1..3) empty but blocking did NOT complete naturally — refusing trivially-safe convergence (#4310/#4317 soundness gate)
IC3 domain stats: consecution(restricted=13 fallback=0 rate=100.0%) mic(restricted=20 fallback=0 rate=100.0%) avg_coverage=66.1%
IC3 consecution stats: queries=13 unsat=7 sat=6 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=13 full_solver=0
IC3 depth=4 lemmas=[0, 0, 0, 0] total=0 inf=0
IC3 domain stats: consecution(restricted=27 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=27 unsat=0 sat=27 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=27 full_solver=0
IC3 domain stats: consecution(restricted=14 fallback=0 rate=100.0%) mic(restricted=20 fallback=0 rate=100.0%) avg_coverage=68.6%
IC3 consecution stats: queries=14 unsat=7 sat=6 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=14 full_solver=0
IC3 domain stats: consecution(restricted=26 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=26 unsat=0 sat=25 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=26 full_solver=0
IC3 domain stats: consecution(restricted=28 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=28 unsat=0 sat=27 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=28 full_solver=0
IC3 domain stats: consecution(restricted=28 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=28 unsat=0 sat=28 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=28 full_solver=0
IC3 domain stats: consecution(restricted=11 fallback=0 rate=100.0%) mic(restricted=14 fallback=0 rate=100.0%) avg_coverage=73.1%
IC3 consecution stats: queries=11 unsat=6 sat=4 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=11 full_solver=0
IC3 domain stats: consecution(restricted=28 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=28 unsat=0 sat=28 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=28 full_solver=0
IC3 domain stats: consecution(restricted=29 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=29 unsat=0 sat=29 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=29 full_solver=0
IC3 domain stats: consecution(restricted=13 fallback=0 rate=100.0%) mic(restricted=20 fallback=0 rate=100.0%) avg_coverage=66.4%
IC3 consecution stats: queries=13 unsat=7 sat=6 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=13 full_solver=0
IC3 domain stats: consecution(restricted=26 fallback=0 rate=100.0%) mic(restricted=0 fallback=0 rate=0.0%) avg_coverage=100.0%
IC3 consecution stats: queries=26 unsat=0 sat=26 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=26 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=16 fallback=0 rate=100.0%) avg_coverage=68.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=18 fallback=0 rate=100.0%) avg_coverage=68.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=17 fallback=0 rate=100.0%) avg_coverage=68.9%
IC3 consecution stats: queries=7 unsat=4 sat=3 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
Portfolio: 3 thread(s) still running after 3s grace period — detaching (#4096)
Heuristic search seeded 1/2 reachability verdicts
CTL local fallback: FMS-PT-20000-CTLFireability-2024-00 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-01 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-02 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-03 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-04 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-05 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-06 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-07 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-08 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-09 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-10 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-12 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-14 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: FMS-PT-20000-CTLFireability-2024-15 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-20000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="TY"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool TY"
echo " Input is FMS-PT-20000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r134-smll-177955810700562"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-20000.tgz
mv FMS-PT-20000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;