Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2026-input.r054-smll-177946902500294.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2026-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5973
Executing tool TY
Input is ClientsAndServers-PT-N0002P1, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r054-smll-177946902500294
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 6.7K Mar 6 10:56 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Mar 6 10:56 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Mar 6 10:56 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Mar 6 10:56 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Mar 15 08:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 15 08:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 15 08:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 15 08:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Mar 6 10:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 90K Mar 6 10:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Mar 6 10:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 121K Mar 6 10:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 15 08:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 15 08:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 9.2K Mar 3 18:30 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-00
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-01
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-02
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-03
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-04
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-05
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-06
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-07
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-08
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-09
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-10
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-11
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-12
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-13
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-14
FORMULA_NAME ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1780358310672

FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-06 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-13 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-14 TRUE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-01 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-02 TRUE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-03 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-05 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-07 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-08 TRUE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-09 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-10 TRUE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-12 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-15 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-00 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-11 FALSE TECHNIQUES EXPLICIT
FORMULA ClientsAndServers-PT-N0002P1-ReachabilityCardinality-2024-04 TRUE TECHNIQUES EXPLICIT

BK_STOP 1780358467332

--------------------
content from stderr:

TY MCC
Host: mcc2026
BK_TOOL: TY
Input: /home/mcc/execution
Examination: ReachabilityCardinality
Threads: 4
Storage: /tmp/ty-mcc-storage
Fingerprint set backend: cas
Backend evidence: /tmp/ty-mcc-storage/backend-capability.jsonl
auto-sized (FingerprintOnly): 25 places (22 packed, 12B exact) × 1B/place max = 60B/state → primary_capacity=360125875 state_limit=unbounded
IntelligenceBus: LP seeded 25 place bounds
IntelligenceBus: published 24 P-invariant constraints
Bounded witness BFS seeded 3/16 reachability verdicts after visiting 44157 states
BMC: ay not found, skipping bounded model checking
BMC seeded 3/16 reachability verdicts
LP state equation seeded 10/16 reachability verdicts
MCC reachability_answer_lane_summary lane=post_smt_witness_bfs status=incomplete stop_reason=state_cap skip_reason=none property_count=16 residual_before=3 seeded=1 unresolved_after=2 visited_states=182863 configured_max_states=200000 effective_max_states=200000 phase_cap_ms=2000 completed=false elapsed_ms=763
AIGER encoding: 88 latches, 18 transitions, 20 constraints
preprocess: timeout (16.0s) — skipping remaining phases
preprocess: latches 88->88->88 inputs 18->18->18 gates 1429->1429->1211 clauses 4566->3633 const_elim=0 scorr_elim=0(iters=0) frts_elim=0 bve_elim=0 frts_bve_iters=0 rewrite_elim=0 dag_rewrite_elim=0 refactor_elim=0 synthesis(rounds=0,gates=-0,depth=-0) ternary=0 ternary_sim=0 renumber=331
Compaction: max_var 1317->1317 (0% reduction)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 88 latches, 18 inputs, 20 constraints, 88 init_clauses, 3633 trans_clauses, 1 bad (trans/latch: 41.3x, constraint/latch: 0.2x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=88) — advancing to next depth (#4139)
IC3 depth=2 blocked=14 natural_exit=false
BMC(geometric step=1): depth=19/50000 vars=26340 latches=88 elapsed=2.2s rate=9depth/s
BMC(step=1): depth=18/50000 vars=25023 latches=88 elapsed=2.1s rate=9depth/s
IC3 depth=3 lemmas=[0, 4, 0] total=4 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=88) — advancing to next depth (#4139)
IC3 depth=2 blocked=14 natural_exit=false
IC3 depth=3 lemmas=[0, 4, 0] total=4 inf=0
lift: ternary prefilter removed 79/88 state lits
IC3 depth=2 bad cube repeated 11 times (cube_len=88) — advancing to next depth (#4139)
IC3 depth=2 blocked=14 natural_exit=false
lift: ternary prefilter removed 82/88 state lits
IC3 depth=3 lemmas=[0, 4, 0] total=4 inf=0
lift: ternary prefilter removed 79/88 state lits
lift: ternary prefilter removed 81/88 state lits
lift: ternary prefilter removed 80/88 state lits
IC3 depth=2 bad cube repeated 11 times (cube_len=88) — advancing to next depth (#4139)
IC3 depth=2 blocked=14 natural_exit=false
IC3 depth=3 lemmas=[0, 4, 0] total=4 inf=0
lift: ternary prefilter removed 82/88 state lits
IC3 depth=2 blocked=1 natural_exit=true
IC3 domain stats: consecution(restricted=29 fallback=0 rate=100.0%) mic(restricted=45 fallback=0 rate=100.0%) avg_coverage=62.2%
IC3 consecution stats: queries=29 unsat=16 sat=13 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=29 full_solver=0
IC3 domain stats: consecution(restricted=42 fallback=0 rate=100.0%) mic(restricted=37 fallback=0 rate=100.0%) avg_coverage=68.8%
IC3 consecution stats: queries=42 unsat=16 sat=25 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=42 full_solver=0
IC3 domain stats: consecution(restricted=12 fallback=0 rate=100.0%) mic(restricted=28 fallback=0 rate=100.0%) avg_coverage=64.8%
IC3 consecution stats: queries=12 unsat=7 sat=5 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=12 full_solver=0
IC3 domain stats: consecution(restricted=5 fallback=0 rate=100.0%) mic(restricted=23 fallback=0 rate=100.0%) avg_coverage=66.9%
IC3 consecution stats: queries=5 unsat=3 sat=2 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=5 full_solver=0
IC3 domain stats: consecution(restricted=30 fallback=0 rate=100.0%) mic(restricted=24 fallback=0 rate=100.0%) avg_coverage=80.6%
IC3 consecution stats: queries=30 unsat=9 sat=20 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=30 full_solver=0
IC3 domain stats: consecution(restricted=32 fallback=0 rate=100.0%) mic(restricted=27 fallback=0 rate=100.0%) avg_coverage=81.5%
IC3 consecution stats: queries=32 unsat=12 sat=20 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=32 full_solver=0
IC3 domain stats: consecution(restricted=37 fallback=0 rate=100.0%) mic(restricted=34 fallback=0 rate=100.0%) avg_coverage=75.4%
IC3 consecution stats: queries=37 unsat=14 sat=23 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=37 full_solver=0
IC3 domain stats: consecution(restricted=26 fallback=0 rate=100.0%) mic(restricted=40 fallback=0 rate=100.0%) avg_coverage=61.2%
IC3 consecution stats: queries=26 unsat=14 sat=12 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=26 full_solver=0
IC3 domain stats: consecution(restricted=12 fallback=0 rate=100.0%) mic(restricted=34 fallback=0 rate=100.0%) avg_coverage=64.7%
IC3 consecution stats: queries=12 unsat=7 sat=5 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=12 full_solver=0
IC3 domain stats: consecution(restricted=26 fallback=0 rate=100.0%) mic(restricted=40 fallback=0 rate=100.0%) avg_coverage=61.2%
IC3 consecution stats: queries=26 unsat=14 sat=12 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=26 full_solver=0
IC3 domain stats: consecution(restricted=24 fallback=0 rate=100.0%) mic(restricted=28 fallback=0 rate=100.0%) avg_coverage=61.7%
IC3 consecution stats: queries=24 unsat=13 sat=11 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=24 full_solver=0
IC3 domain stats: consecution(restricted=11 fallback=0 rate=100.0%) mic(restricted=26 fallback=0 rate=100.0%) avg_coverage=62.0%
IC3 consecution stats: queries=11 unsat=6 sat=5 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=11 full_solver=0
IC3 domain stats: consecution(restricted=27 fallback=0 rate=100.0%) mic(restricted=23 fallback=0 rate=100.0%) avg_coverage=78.9%
IC3 consecution stats: queries=27 unsat=9 sat=18 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=27 full_solver=0
IC3 domain stats: consecution(restricted=5 fallback=0 rate=100.0%) mic(restricted=25 fallback=0 rate=100.0%) avg_coverage=65.5%
IC3 consecution stats: queries=5 unsat=3 sat=2 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=5 full_solver=0
Portfolio: 3 thread(s) still running after 3s grace period — detaching (#4096)
Random walk seeded 1/16 reachability verdicts
Heuristic search seeded 1/16 reachability verdicts

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ClientsAndServers-PT-N0002P1"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="TY"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool TY"
echo " Input is ClientsAndServers-PT-N0002P1, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r054-smll-177946902500294"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ClientsAndServers-PT-N0002P1.tgz
mv ClientsAndServers-PT-N0002P1 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;