Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2026-input.r054-smll-177946902400185.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2026-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5973
Executing tool TY
Input is CircadianClock-PT-000100, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r054-smll-177946902400185
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 5.6K Mar 6 10:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Mar 6 10:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Mar 6 10:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Mar 6 10:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Mar 15 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Mar 15 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 15 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 15 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Mar 6 10:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Mar 6 10:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Mar 6 10:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Mar 6 10:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 15 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 15 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 6 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 11K Mar 3 18:30 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-00
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-01
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-02
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-03
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-04
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-05
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-06
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-07
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-08
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-09
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-10
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-11
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-12
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-13
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-14
FORMULA_NAME CircadianClock-PT-000100-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1780284546543

FORMULA CircadianClock-PT-000100-CTLCardinality-2024-02 TRUE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-12 TRUE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-00 FALSE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-01 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-03 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-04 FALSE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-05 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-06 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-07 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-08 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-09 TRUE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-10 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-11 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-13 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-14 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL
FORMULA CircadianClock-PT-000100-CTLCardinality-2024-15 CANNOT_COMPUTE TECHNIQUES EXPLICIT TEMPORAL_LOGIC BFS STRUCTURAL

BK_STOP 1780285407449

--------------------
content from stderr:

TY MCC
Host: mcc2026
BK_TOOL: TY
Input: /home/mcc/execution
Examination: CTLCardinality
Threads: 4
Storage: /tmp/ty-mcc-storage
Fingerprint set backend: cas
Backend evidence: /tmp/ty-mcc-storage/backend-capability.jsonl
auto-sized (FingerprintOnly): 14 places (7 packed, 6B exact) × 1B/place max = 54B/state → primary_capacity=360091916 state_limit=unbounded
CTL shallow routing: 1/16 properties routed to reachability
IntelligenceBus: LP seeded 14 place bounds
IntelligenceBus: published 14 P-invariant constraints
BMC: ay not found, skipping bounded model checking
MCC reachability_answer_lane_summary lane=post_smt_witness_bfs status=incomplete stop_reason=state_cap skip_reason=none property_count=1 residual_before=1 seeded=0 unresolved_after=1 visited_states=166337 configured_max_states=200000 effective_max_states=200000 phase_cap_ms=2000 completed=false elapsed_ms=690
AIGER encoding: 74 latches, 16 transitions, 10 constraints
preprocess: timeout (8.1s) — skipping remaining phases
preprocess: latches 74->74->74 inputs 16->16->16 gates 2202->2202->1804 clauses 6797->5412 const_elim=0 scorr_elim=0(iters=0) frts_elim=0 bve_elim=0 frts_bve_iters=0 rewrite_elim=0 dag_rewrite_elim=0 refactor_elim=0 synthesis(rounds=0,gates=-0,depth=-0) ternary=0 ternary_sim=0 renumber=475
Compaction: max_var 1894->1894 (0% reduction)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 blocked=0 natural_exit=true
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3: 74 latches, 16 inputs, 10 constraints, 74 init_clauses, 5412 trans_clauses, 1 bad (trans/latch: 73.1x, constraint/latch: 0.1x, consec_verify: 1, crosscheck_disabled: false, predprop: false)
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=1 lemmas=[0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=1 blocked=0 natural_exit=true
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
IC3 depth=2 lemmas=[0, 0] total=0 inf=0
BMC(geometric step=1): depth=10/50000 vars=20834 latches=74 elapsed=2.2s rate=5depth/s
BMC(step=1): depth=8/50000 vars=17046 latches=74 elapsed=2.6s rate=3depth/s
IC3 depth=2 bad cube repeated 11 times (cube_len=74) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 depth=2 bad cube repeated 11 times (cube_len=74) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 depth=3 lemmas=[0, 6, 0] total=6 inf=0
IC3 depth=3 lemmas=[0, 5, 0] total=5 inf=0
lift: ternary prefilter removed 54/74 state lits
lift: ternary prefilter removed 54/74 state lits
lift: ternary prefilter removed 58/74 state lits
IC3 depth=2 bad cube repeated 11 times (cube_len=74) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
lift: ternary prefilter removed 58/74 state lits
IC3 depth=2 bad cube repeated 11 times (cube_len=74) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 depth=3 lemmas=[0, 5, 0] total=5 inf=0
IC3 depth=2 bad cube repeated 11 times (cube_len=74) — advancing to next depth (#4139)
IC3 depth=2 blocked=12 natural_exit=false
IC3 depth=3 lemmas=[0, 5, 0] total=5 inf=0
lift: ternary prefilter removed 54/74 state lits
IC3 depth=3 lemmas=[0, 5, 0] total=5 inf=0
lift: ternary prefilter removed 54/74 state lits
lift: ternary prefilter removed 54/74 state lits
lift: ternary prefilter removed 58/74 state lits
lift: ternary prefilter removed 58/74 state lits
lift: ternary prefilter removed 58/74 state lits
lift: ternary prefilter removed 52/74 state lits
lift: ternary prefilter removed 52/74 state lits
BMC(step=1): depth=12/50000 vars=24622 latches=74 elapsed=5.0s rate=2depth/s
BMC(step=10): depth=10/50000 vars=20844 latches=74 elapsed=4.9s rate=0depth/s
BMC(geometric step=1): depth=14/50000 vars=28410 latches=74 elapsed=5.0s rate=3depth/s
BMC(step=10): depth=10/50000 vars=20844 latches=74 elapsed=5.0s rate=0depth/s
lift: ternary prefilter removed 70/74 state lits
lift: ternary prefilter removed 70/74 state lits
lift: ternary prefilter removed 52/74 state lits
lift: ternary prefilter removed 52/74 state lits
lift: ternary prefilter removed 69/74 state lits
lift: ternary prefilter removed 52/74 state lits
lift: ternary prefilter removed 71/74 state lits
lift: ternary prefilter removed 69/74 state lits
lift: ternary prefilter removed 70/74 state lits
lift: ternary prefilter removed 70/74 state lits
lift: ternary prefilter removed 69/74 state lits
lift: ternary prefilter removed 70/74 state lits
lift: ternary prefilter removed 71/74 state lits
IC3 domain stats: consecution(restricted=28 fallback=0 rate=100.0%) mic(restricted=55 fallback=0 rate=100.0%) avg_coverage=82.4%
IC3 consecution stats: queries=28 unsat=20 sat=7 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=28 full_solver=0
IC3 domain stats: consecution(restricted=16 fallback=0 rate=100.0%) mic(restricted=26 fallback=0 rate=100.0%) avg_coverage=87.5%
IC3 consecution stats: queries=16 unsat=4 sat=11 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=16 full_solver=0
IC3 domain stats: consecution(restricted=48 fallback=0 rate=100.0%) mic(restricted=40 fallback=0 rate=100.0%) avg_coverage=82.2%
IC3 consecution stats: queries=48 unsat=17 sat=30 unknown=1 verified=0 rejected=0 reject_rate=0.0% domain_restricted=48 full_solver=0
IC3 domain stats: consecution(restricted=19 fallback=0 rate=100.0%) mic(restricted=41 fallback=0 rate=100.0%) avg_coverage=80.7%
IC3 consecution stats: queries=19 unsat=14 sat=5 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=19 full_solver=0
IC3 domain stats: consecution(restricted=20 fallback=0 rate=100.0%) mic(restricted=46 fallback=0 rate=100.0%) avg_coverage=68.7%
IC3 consecution stats: queries=20 unsat=11 sat=9 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=20 full_solver=0
IC3 domain stats: consecution(restricted=23 fallback=0 rate=100.0%) mic(restricted=48 fallback=0 rate=100.0%) avg_coverage=81.0%
IC3 consecution stats: queries=23 unsat=17 sat=6 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=23 full_solver=0
IC3 domain stats: consecution(restricted=51 fallback=0 rate=100.0%) mic(restricted=46 fallback=0 rate=100.0%) avg_coverage=79.1%
IC3 consecution stats: queries=51 unsat=19 sat=32 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=51 full_solver=0
IC3 domain stats: consecution(restricted=55 fallback=0 rate=100.0%) mic(restricted=49 fallback=0 rate=100.0%) avg_coverage=75.2%
IC3 consecution stats: queries=55 unsat=21 sat=34 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=55 full_solver=0
IC3 domain stats: consecution(restricted=49 fallback=0 rate=100.0%) mic(restricted=44 fallback=0 rate=100.0%) avg_coverage=81.2%
IC3 consecution stats: queries=49 unsat=18 sat=31 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=49 full_solver=0
IC3 domain stats: consecution(restricted=4 fallback=0 rate=100.0%) mic(restricted=28 fallback=0 rate=100.0%) avg_coverage=79.7%
IC3 consecution stats: queries=4 unsat=3 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=4 full_solver=0
IC3 domain stats: consecution(restricted=6 fallback=0 rate=100.0%) mic(restricted=33 fallback=0 rate=100.0%) avg_coverage=77.7%
IC3 consecution stats: queries=6 unsat=4 sat=2 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=6 full_solver=0
IC3 domain stats: consecution(restricted=53 fallback=0 rate=100.0%) mic(restricted=50 fallback=0 rate=100.0%) avg_coverage=77.1%
IC3 consecution stats: queries=53 unsat=20 sat=33 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=53 full_solver=0
IC3 domain stats: consecution(restricted=4 fallback=0 rate=100.0%) mic(restricted=28 fallback=0 rate=100.0%) avg_coverage=79.7%
IC3 consecution stats: queries=4 unsat=3 sat=1 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=4 full_solver=0
IC3 domain stats: consecution(restricted=7 fallback=0 rate=100.0%) mic(restricted=31 fallback=0 rate=100.0%) avg_coverage=76.8%
IC3 consecution stats: queries=7 unsat=5 sat=2 unknown=0 verified=0 rejected=0 reject_rate=0.0% domain_restricted=7 full_solver=0
Portfolio: 3 thread(s) still running after 3s grace period — detaching (#4096)
Heuristic search seeded 1/1 reachability verdicts
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-01 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-03 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-05 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-06 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-07 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-08 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-10 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-11 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-13 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-14 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)
CTL local fallback: CircadianClock-PT-000100-CTLCardinality-2024-15 -> CANNOT_COMPUTE (EDG: local EDG exceeded node cap; recursive: local CTL checker exceeded recursion depth)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000100"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="TY"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool TY"
echo " Input is CircadianClock-PT-000100, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r054-smll-177946902400185"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000100.tgz
mv CircadianClock-PT-000100 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;