Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/sdalzilio/mcc2026-input.r014-oct2-177944371800002.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/sdalzilio/mcc2026-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5973
Executing tool gold2025
Input is AirplaneLD-COL-0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r014-oct2-177944371800002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 8.8K Mar 4 17:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Mar 4 17:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Mar 4 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Mar 4 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 3 18:30 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Mar 3 18:30 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Mar 15 06:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Mar 15 06:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Mar 15 06:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 15 06:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Mar 4 17:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Mar 4 17:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Mar 4 17:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 49K Mar 4 17:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 15 06:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 15 06:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 3 18:30 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 3 18:30 instance
-rw-r--r-- 1 mcc users 5 Mar 3 18:30 iscolored
-rw-r--r-- 1 mcc users 40K Mar 3 18:30 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1779525047375

gold2025
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> gold2025 --- TAPAAL 2025-v2
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax
MF=/home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)

Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX UNFOLDING_TO_PT
Query index 1 was solved

Query is NOT satisfied.

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX UNFOLDING_TO_PT
Query index 13 was solved

Query is satisfied.
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Time left: 3590

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (14 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.061334 on verification
@@@0.06,56680@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BestFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 1 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.062448 on verification
@@@0.06,56496@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 2 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 3 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.07769 on verification
@@@0.08,56584@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 3 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.056373 on verification
@@@0.06,57288@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 4 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.059259 on verification
@@@0.07,56580@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s RPFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 5 -n


Query index 0 was solved
Query is NOT satisfied.

Spent 0.069617 on verification
@@@0.07,57228@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 5 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.051556 on verification
@@@0.05,56904@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 6 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.049566 on verification
@@@0.07,56784@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 7 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.084269 on verification
@@@0.08,56620@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BestFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 8 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.066908 on verification
@@@0.08,56516@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s RPFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 9 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 10 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.069609 on verification
@@@0.08,56700@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BestFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 10 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3586
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.095259 on verification
@@@0.10,56576@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 11 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3586
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.105066 on verification
@@@0.10,57032@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s BestFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 12 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3586
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.043265 on verification
@@@0.05,56608@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s DFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 13 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3585
------------------- QUERY 14 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.059498 on verification
@@@0.06,56772@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n '-s DFS -q 0 -l 0 -d 119' /home/mcc/BenchKit/bin/tmp/tmp.qY118JLp9F /home/mcc/BenchKit/bin/tmp/tmp.tOVxGz14Ax --binary-query-io 1 -x 14 -n

FORMULA AirplaneLD-COL-0010-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3585
All queries are solved
Time left: 3585
terminated-with-cleanup

BK_STOP 1779525052502

--------------------
content from stderr:

Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-15
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-14
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-13
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-12
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-11
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-10
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-09
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-08
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-07
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-06
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-05
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-04
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-03
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-02
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-01
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0010-CTLFireability-2024-00
WARNING: Could not run CPN over-approximation on any queries, terminating.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gold2025"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5973"
echo " Executing tool gold2025"
echo " Input is AirplaneLD-COL-0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r014-oct2-177944371800002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0010.tgz
mv AirplaneLD-COL-0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;