About the Execution of ITS-Tools for SmallOperatingSystem-PT-MT8192DC4096
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
0.000 | 11694.00 | 0.00 | 0.00 | FFTFFTFFFFFFTFFT | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2025-input.r212-tall-174901994800684.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2025-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................
=====================================================================
Generated by BenchKit 2-5832
Executing tool itstools
Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-tall-174901994800684
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 8.4K May 29 14:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K May 29 14:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 29 14:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 29 14:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 29 14:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 29 14:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K May 29 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 29 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 29 14:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 29 14:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K May 29 14:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K May 29 14:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K May 29 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 115K May 29 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 29 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K May 29 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 29 14:33 equiv_col
-rw-r--r-- 1 mcc users 13 May 29 14:33 instance
-rw-r--r-- 1 mcc users 6 May 29 14:33 iscolored
-rw-r--r-- 1 mcc users 8.1K May 29 14:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
echo here is the order used to build the result vector(from xml file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1749243891026
Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT8192DC4096
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
LTLFireability PT
Running Version 202505121319
[2025-06-06 21:04:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2025-06-06 21:04:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2025-06-06 21:04:52] [INFO ] Load time of PNML (sax parser for PT used): 27 ms
[2025-06-06 21:04:52] [INFO ] Transformed 9 places.
[2025-06-06 21:04:52] [INFO ] Transformed 8 transitions.
[2025-06-06 21:04:52] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 107 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 10 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 6 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2025-06-06 21:04:52] [INFO ] Computed 4 invariants in 4 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:52] [INFO ] Implicit Places using invariants in 108 ms returned []
[2025-06-06 21:04:52] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:52] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 197 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2025-06-06 21:04:52] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 189 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 131 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 334ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 342ms
Finished structural reductions in LTL mode , in 1 iterations and 560 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2025-06-06 21:04:53] [INFO ] Flatten gal took : 11 ms
[2025-06-06 21:04:53] [INFO ] Flatten gal took : 4 ms
[2025-06-06 21:04:53] [INFO ] Input system was already deterministic with 8 transitions.
Reduction of identical properties reduced properties to check from 11 to 10
RANDOM walk for 49172 steps (8 resets) in 394 ms. (124 steps per ms) remains 8/10 properties
BEST_FIRST walk for 347 steps (0 resets) in 9 ms. (34 steps per ms) remains 0/8 properties
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 14 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2025-06-06 21:04:53] [INFO ] Computed 2 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:53] [INFO ] Implicit Places using invariants in 19 ms returned [2]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 21 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 3/9 places, 5/8 transitions.
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 3 transition count 4
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 3 transition count 3
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 2 transition count 3
Applied a total of 3 rules in 2 ms. Remains 2 /3 variables (removed 1) and now considering 3/5 (removed 2) transitions.
// Phase 1: matrix 3 rows 2 cols
[2025-06-06 21:04:53] [INFO ] Computed 1 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:53] [INFO ] Implicit Places using invariants in 15 ms returned []
[2025-06-06 21:04:53] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:53] [INFO ] Implicit Places using invariants and state equation in 19 ms returned []
Implicit Place search using SMT with State Equation took 36 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 2/9 places, 3/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 73 ms. Remains : 2/9 places, 3/8 transitions.
Stuttering acceptance computed with spot in 175 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00
Stuttering criterion allowed to conclude after 2 steps with 0 reset in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 finished in 301 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X((F(G(p0))&&F((G(F(!p1))||(F(!p1)&&p2))))))))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 7 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2025-06-06 21:04:53] [INFO ] Computed 4 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:53] [INFO ] Implicit Places using invariants in 18 ms returned []
[2025-06-06 21:04:53] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:54] [INFO ] Implicit Places using invariants and state equation in 19 ms returned []
Implicit Place search using SMT with State Equation took 39 ms to find 0 implicit places.
Running 6 sub problems to find dead transitions.
[2025-06-06 21:04:54] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 15/15 variables, and 12 constraints, problems are : Problem set: 0 solved, 6 unsolved in 87 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 6/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 15/15 variables, and 18 constraints, problems are : Problem set: 0 solved, 6 unsolved in 70 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 161ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 163ms
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 209 ms. Remains : 8/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 354 ms :[(OR (NOT p0) p1), (OR (NOT p0) p1), (OR (NOT p0) p1), (OR (NOT p0) p1), (NOT p0), p1, p1]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01
Product exploration explored 100000 steps with 0 reset in 224 ms.
Stack based approach found an accepted trace after 12 steps with 0 reset with depth 13 and stack size 11 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 finished in 816 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)&&X(X(F(p1)))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2025-06-06 21:04:54] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:54] [INFO ] Implicit Places using invariants in 30 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 31 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 33 ms. Remains : 6/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 154 ms :[(OR (NOT p1) (NOT p0)), (NOT p0), (NOT p1), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02
Product exploration explored 100000 steps with 28517 reset in 165 ms.
Product exploration explored 100000 steps with 28528 reset in 96 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p1), (X (NOT p0)), (X (X p1))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0))]
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 3 factoid took 130 ms. Reduced automaton from 4 states, 5 edges and 2 AP (stutter sensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 65 ms :[(NOT p0), (NOT p0)]
RANDOM walk for 49172 steps (8 resets) in 36 ms. (1328 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 4 ms. (3 steps per ms) remains 0/1 properties
Knowledge obtained : [(AND (NOT p0) p1), (X (NOT p0)), (X (X p1))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0)), (F p0)]
Knowledge based reduction with 3 factoid took 158 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 76 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 71 ms :[(NOT p0), (NOT p0)]
// Phase 1: matrix 7 rows 6 cols
[2025-06-06 21:04:55] [INFO ] Computed 2 invariants in 1 ms
Starting Z3 with timeout 15.0 s and query timeout 1500.0 ms
[2025-06-06 21:04:55] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2025-06-06 21:04:55] [INFO ] [Real]Absence check using state equation in 3 ms returned sat
[2025-06-06 21:04:55] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 1 ms.
[2025-06-06 21:04:55] [INFO ] Added : 0 causal constraints over 0 iterations in 3 ms. Result :sat
Could not prove EG (NOT p0)
Support contains 1 out of 6 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 6/6 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2025-06-06 21:04:55] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:55] [INFO ] Implicit Places using invariants in 20 ms returned []
[2025-06-06 21:04:55] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:55] [INFO ] Implicit Places using invariants and state equation in 23 ms returned []
Implicit Place search using SMT with State Equation took 45 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 21:04:55] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2025-06-06 21:04:55] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/5 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/6 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/13 variables, 6/8 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/13 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/13 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 13/13 variables, and 8 constraints, problems are : Problem set: 0 solved, 6 unsolved in 55 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 6/6 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/5 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/6 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/13 variables, 6/8 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/13 variables, 6/14 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/13 variables, 0/14 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/13 variables, 0/14 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 13/13 variables, and 14 constraints, problems are : Problem set: 0 solved, 6 unsolved in 62 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 6/6 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 120ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 120ms
Finished structural reductions in SI_LTL mode , in 1 iterations and 171 ms. Remains : 6/6 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0))]
Knowledge based reduction with 2 factoid took 118 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 76 ms :[(NOT p0), (NOT p0)]
RANDOM walk for 49172 steps (8 resets) in 92 ms. (528 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 6 ms. (2 steps per ms) remains 0/1 properties
Knowledge obtained : [(NOT p0), (X (NOT p0))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0)), (F p0)]
Knowledge based reduction with 2 factoid took 123 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 66 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 73 ms :[(NOT p0), (NOT p0)]
[2025-06-06 21:04:56] [INFO ] Invariant cache hit.
Starting Z3 with timeout 15.0 s and query timeout 1500.0 ms
[2025-06-06 21:04:56] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2025-06-06 21:04:56] [INFO ] [Real]Absence check using state equation in 3 ms returned sat
[2025-06-06 21:04:56] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 1 ms.
[2025-06-06 21:04:56] [INFO ] Added : 0 causal constraints over 0 iterations in 4 ms. Result :sat
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 63 ms :[(NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 24942 reset in 63 ms.
Product exploration explored 100000 steps with 24938 reset in 61 ms.
Built C files in :
/tmp/ltsmin16747320692714254282
[2025-06-06 21:04:56] [INFO ] Computing symmetric may disable matrix : 7 transitions.
[2025-06-06 21:04:56] [INFO ] Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:04:56] [INFO ] Computing symmetric may enable matrix : 7 transitions.
[2025-06-06 21:04:56] [INFO ] Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:04:56] [INFO ] Computing Do-Not-Accords matrix : 7 transitions.
[2025-06-06 21:04:56] [INFO ] Computation of Completed DNA matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:04:56] [INFO ] Built C files in 16ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin16747320692714254282
Running compilation step : cd /tmp/ltsmin16747320692714254282;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
Compilation finished in 189 ms.
Running link step : cd /tmp/ltsmin16747320692714254282;'gcc' '-shared' '-o' 'gal.so' 'model.o'
Link finished in 42 ms.
Running LTSmin : cd /tmp/ltsmin16747320692714254282;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/pins2lts-mc-linux64' './gal.so' '--threads=8' '-p' '--pins-guards' '--when' '--hoa' '/tmp/stateBased17484885978235474293.hoa' '--buchi-type=spotba'
LTSmin run took 423 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 finished in 2650 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((!p0||X(X(p0)))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2025-06-06 21:04:57] [INFO ] Computed 4 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:57] [INFO ] Implicit Places using invariants in 23 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 25 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 27 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 102 ms :[false, (NOT p0), (NOT p0), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
Entered a terminal (fully accepting) state of product in 40917 steps with 0 reset in 36 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 finished in 178 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0))&&F(p1)))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
[2025-06-06 21:04:57] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:57] [INFO ] Implicit Places using invariants in 23 ms returned []
[2025-06-06 21:04:57] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:57] [INFO ] Implicit Places using invariants and state equation in 25 ms returned []
Implicit Place search using SMT with State Equation took 51 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 21:04:57] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2025-06-06 21:04:57] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 15/15 variables, and 12 constraints, problems are : Problem set: 0 solved, 6 unsolved in 68 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 6/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 15/15 variables, and 18 constraints, problems are : Problem set: 0 solved, 6 unsolved in 72 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 144ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 144ms
Starting structural reductions in SI_LTL mode, iteration 1 : 8/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 202 ms. Remains : 8/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 103 ms :[(OR (NOT p1) (NOT p0)), (NOT p0), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04
Product exploration explored 100000 steps with 0 reset in 91 ms.
Stack based approach found an accepted trace after 3 steps with 0 reset with depth 4 and stack size 4 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 finished in 422 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G((!p0 U p1)) U X(X(!p1))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
[2025-06-06 21:04:58] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:58] [INFO ] Implicit Places using invariants in 29 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 30 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 33 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 305 ms :[p1, p1, p1, p1, true, p1, (NOT p1), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05
Product exploration explored 100000 steps with 33333 reset in 61 ms.
Product exploration explored 100000 steps with 33333 reset in 65 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) p0), (X (AND (NOT p1) p0)), (X (NOT (OR p1 (NOT p0)))), (X p0), (X (NOT p1)), (X (X (NOT p1)))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 6 factoid took 19 ms. Reduced automaton from 8 states, 14 edges and 2 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 finished in 513 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((!p0 U (p1||G(!p0))))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2025-06-06 21:04:58] [INFO ] Computed 3 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:58] [INFO ] Implicit Places using invariants in 20 ms returned []
[2025-06-06 21:04:58] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:58] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 55 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 21:04:58] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2025-06-06 21:04:58] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 66 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 61 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 131ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 132ms
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 194 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 74 ms :[(AND (NOT p1) p0), (AND (NOT p1) p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06
Product exploration explored 100000 steps with 4929 reset in 124 ms.
Stack based approach found an accepted trace after 52 steps with 4 reset with depth 16 and stack size 16 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 finished in 411 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(!p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2025-06-06 21:04:58] [INFO ] Computed 4 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants in 32 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 33 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 6 transition count 6
Applied a total of 2 rules in 3 ms. Remains 6 /7 variables (removed 1) and now considering 6/7 (removed 1) transitions.
// Phase 1: matrix 6 rows 6 cols
[2025-06-06 21:04:59] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants in 24 ms returned []
[2025-06-06 21:04:59] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 56 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 6/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 95 ms. Remains : 6/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 42 ms :[p0]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07
Product exploration explored 100000 steps with 0 reset in 84 ms.
Stack based approach found an accepted trace after 4 steps with 0 reset with depth 5 and stack size 5 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 finished in 259 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((!p0 U (p1||X(G(!p2))))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 4 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2025-06-06 21:04:59] [INFO ] Computed 4 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants in 21 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 22 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 28 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 135 ms :[(AND (NOT p1) p2), p2, (AND (NOT p1) p2), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10
Entered a terminal (fully accepting) state of product in 2 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 finished in 184 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(X((!X(p0) U (p1 U p1)))))'
Support contains 1 out of 9 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2025-06-06 21:04:59] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants in 25 ms returned []
[2025-06-06 21:04:59] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:04:59] [INFO ] Implicit Places using invariants and state equation in 22 ms returned []
Implicit Place search using SMT with State Equation took 59 ms to find 0 implicit places.
Running 6 sub problems to find dead transitions.
[2025-06-06 21:04:59] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 69 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 66 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 142ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 144ms
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 209 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 68 ms :[(NOT p1), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12
Product exploration explored 100000 steps with 25079 reset in 117 ms.
Product exploration explored 100000 steps with 25018 reset in 76 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 2 factoid took 91 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 54 ms :[(NOT p1), (NOT p1)]
RANDOM walk for 49172 steps (8 resets) in 41 ms. (1170 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 4 ms. (3 steps per ms) remains 0/1 properties
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 131 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 71 ms :[(NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 75 ms :[(NOT p1), (NOT p1)]
[2025-06-06 21:05:00] [INFO ] Invariant cache hit.
Starting Z3 with timeout 15.0 s and query timeout 1500.0 ms
[2025-06-06 21:05:00] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2025-06-06 21:05:00] [INFO ] [Real]Absence check using state equation in 3 ms returned sat
[2025-06-06 21:05:00] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 1 ms.
[2025-06-06 21:05:00] [INFO ] Added : 0 causal constraints over 0 iterations in 3 ms. Result :sat
Could not prove EG (NOT p1)
Support contains 1 out of 7 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2025-06-06 21:05:00] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:00] [INFO ] Implicit Places using invariants in 21 ms returned []
[2025-06-06 21:05:00] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:00] [INFO ] Implicit Places using invariants and state equation in 24 ms returned []
Implicit Place search using SMT with State Equation took 45 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 21:05:00] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2025-06-06 21:05:00] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 67 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 63 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 134ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 134ms
Finished structural reductions in SI_LTL mode , in 1 iterations and 186 ms. Remains : 7/7 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 2 factoid took 118 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 77 ms :[(NOT p1), (NOT p1)]
RANDOM walk for 49172 steps (8 resets) in 23 ms. (2048 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 4 ms. (3 steps per ms) remains 0/1 properties
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 157 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 76 ms :[(NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 72 ms :[(NOT p1), (NOT p1)]
[2025-06-06 21:05:01] [INFO ] Invariant cache hit.
Starting Z3 with timeout 15.0 s and query timeout 1500.0 ms
[2025-06-06 21:05:01] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2025-06-06 21:05:01] [INFO ] [Real]Absence check using state equation in 2 ms returned sat
[2025-06-06 21:05:01] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 0 ms.
[2025-06-06 21:05:01] [INFO ] Added : 0 causal constraints over 0 iterations in 1 ms. Result :sat
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 74 ms :[(NOT p1), (NOT p1)]
Product exploration explored 100000 steps with 25034 reset in 41 ms.
Product exploration explored 100000 steps with 25071 reset in 59 ms.
Built C files in :
/tmp/ltsmin1173839558342769640
[2025-06-06 21:05:01] [INFO ] Computing symmetric may disable matrix : 7 transitions.
[2025-06-06 21:05:01] [INFO ] Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:05:01] [INFO ] Computing symmetric may enable matrix : 7 transitions.
[2025-06-06 21:05:01] [INFO ] Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:05:01] [INFO ] Computing Do-Not-Accords matrix : 7 transitions.
[2025-06-06 21:05:01] [INFO ] Computation of Completed DNA matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 21:05:01] [INFO ] Built C files in 2ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin1173839558342769640
Running compilation step : cd /tmp/ltsmin1173839558342769640;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
Compilation finished in 81 ms.
Running link step : cd /tmp/ltsmin1173839558342769640;'gcc' '-shared' '-o' 'gal.so' 'model.o'
Link finished in 35 ms.
Running LTSmin : cd /tmp/ltsmin1173839558342769640;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/pins2lts-mc-linux64' './gal.so' '--threads=8' '-p' '--pins-guards' '--when' '--hoa' '/tmp/stateBased11812742838846834602.hoa' '--buchi-type=spotba'
LTSmin run took 334 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12 finished in 2378 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(!p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2025-06-06 21:05:01] [INFO ] Computed 4 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:01] [INFO ] Implicit Places using invariants in 20 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 21 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 6 transition count 6
Applied a total of 2 rules in 1 ms. Remains 6 /7 variables (removed 1) and now considering 6/7 (removed 1) transitions.
// Phase 1: matrix 6 rows 6 cols
[2025-06-06 21:05:01] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:01] [INFO ] Implicit Places using invariants in 17 ms returned []
[2025-06-06 21:05:01] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:01] [INFO ] Implicit Places using invariants and state equation in 23 ms returned []
Implicit Place search using SMT with State Equation took 42 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 6/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 66 ms. Remains : 6/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 40 ms :[p0]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13
Product exploration explored 100000 steps with 0 reset in 100 ms.
Stack based approach found an accepted trace after 3 steps with 0 reset with depth 4 and stack size 4 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13 finished in 216 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((G(p0)||G(p1))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2025-06-06 21:05:01] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:02] [INFO ] Implicit Places using invariants in 27 ms returned []
[2025-06-06 21:05:02] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:02] [INFO ] Implicit Places using invariants and state equation in 23 ms returned []
Implicit Place search using SMT with State Equation took 52 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 21:05:02] [INFO ] Redundant transitions in 1 ms returned []
Running 6 sub problems to find dead transitions.
[2025-06-06 21:05:02] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 59 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 55 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 116ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 117ms
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 175 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 42 ms :[(AND (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14
Product exploration explored 100000 steps with 0 reset in 107 ms.
Stack based approach found an accepted trace after 2 steps with 0 reset with depth 3 and stack size 3 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 finished in 340 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||X(X(X(G(!p1))))) U X(p2)))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2025-06-06 21:05:02] [INFO ] Computed 4 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 21:05:02] [INFO ] Implicit Places using invariants in 26 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 28 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 29 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 195 ms :[(NOT p2), (AND (NOT p2) p1), (NOT p2), p1, p1, true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15
Product exploration explored 100000 steps with 50000 reset in 45 ms.
Product exploration explored 100000 steps with 50000 reset in 39 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X p2), (X (NOT p0)), (X (NOT (AND (NOT p0) (NOT p2)))), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (NOT p2))), (X (X p2)), (X (X (AND (NOT p0) (NOT p2)))), (X (X (NOT (AND (NOT p0) (NOT p2)))))]
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 5 factoid took 17 ms. Reduced automaton from 6 states, 9 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 finished in 348 ms.
All properties solved by simple procedures.
Total runtime 10498 ms.
BK_STOP 1749243902720
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202505121319.jar
+ VERSION=202505121319
+ echo 'Running Version 202505121319'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT8192DC4096"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5832"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-tall-174901994800684"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT8192DC4096.tgz
mv SmallOperatingSystem-PT-MT8192DC4096 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;