fond
Model Checking Contest 2025
15th edition, Paris, France, June 24, 2025
Execution of r212-tall-174901994800667
Last Updated
June 24, 2025

About the Execution of ITS-Tools for SmallOperatingSystem-PT-MT4096DC2048

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
0.000 26161.00 0.00 0.00 FTTFFFFTTTFFFFFF normal

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2025-input.r212-tall-174901994800667.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2025-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................
=====================================================================
Generated by BenchKit 2-5832
Executing tool itstools
Input is SmallOperatingSystem-PT-MT4096DC2048, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-tall-174901994800667
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 9.2K May 29 14:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K May 29 14:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K May 29 14:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 29 14:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 29 14:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 29 14:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K May 29 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 29 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 29 14:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 29 14:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K May 29 14:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 170K May 29 14:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K May 29 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K May 29 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 29 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K May 29 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 29 14:33 equiv_col
-rw-r--r-- 1 mcc users 13 May 29 14:33 instance
-rw-r--r-- 1 mcc users 6 May 29 14:33 iscolored
-rw-r--r-- 1 mcc users 8.1K May 29 14:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1749236364867

Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT4096DC2048
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
LTLCardinality PT
Running Version 202505121319
[2025-06-06 18:59:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2025-06-06 18:59:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2025-06-06 18:59:26] [INFO ] Load time of PNML (sax parser for PT used): 26 ms
[2025-06-06 18:59:26] [INFO ] Transformed 9 places.
[2025-06-06 18:59:26] [INFO ] Transformed 8 transitions.
[2025-06-06 18:59:26] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 123 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 13 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 4 formulas.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 6 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2025-06-06 18:59:26] [INFO ] Computed 4 invariants in 5 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:26] [INFO ] Implicit Places using invariants in 109 ms returned []
[2025-06-06 18:59:26] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:26] [INFO ] Implicit Places using invariants and state equation in 35 ms returned []
Implicit Place search using SMT with State Equation took 174 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2025-06-06 18:59:26] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 162 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 130 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 321ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 329ms
Finished structural reductions in LTL mode , in 1 iterations and 524 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2025-06-06 18:59:27] [INFO ] Flatten gal took : 11 ms
[2025-06-06 18:59:27] [INFO ] Flatten gal took : 2 ms
[2025-06-06 18:59:27] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 40991 steps (8 resets) in 108 ms. (376 steps per ms) remains 16/21 properties
BEST_FIRST walk for 4004 steps (8 resets) in 151 ms. (26 steps per ms) remains 16/16 properties
BEST_FIRST walk for 4004 steps (8 resets) in 136 ms. (29 steps per ms) remains 16/16 properties
BEST_FIRST walk for 4001 steps (8 resets) in 44 ms. (88 steps per ms) remains 11/16 properties
BEST_FIRST walk for 4004 steps (8 resets) in 23 ms. (166 steps per ms) remains 10/11 properties
BEST_FIRST walk for 4004 steps (8 resets) in 29 ms. (133 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4004 steps (8 resets) in 35 ms. (111 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4003 steps (8 resets) in 12 ms. (307 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4004 steps (8 resets) in 29 ms. (133 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4004 steps (8 resets) in 29 ms. (133 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 10/10 properties
BEST_FIRST walk for 4002 steps (8 resets) in 16 ms. (235 steps per ms) remains 10/10 properties
[2025-06-06 18:59:27] [INFO ] Invariant cache hit.
Starting Z3 with timeout 5.0 s and query timeout 500.0 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 10 unsolved
Problem AtomicPropp1 is UNSAT
Problem AtomicPropp13 is UNSAT
Problem AtomicPropp15 is UNSAT
At refinement iteration 2 (OVERLAPS) 2/9 variables, 2/4 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 3 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 3 solved, 7 unsolved in 92 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 3 solved, 7 unsolved
Starting Z3 with timeout 5.0 s and query timeout 500.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 1/1 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/1 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 3/9 variables, 3/4 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 3 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 3 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 3 solved, 7 unsolved in 110 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/10 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 207ms problems are : Problem set: 3 solved, 7 unsolved
Finished Parikh walk after 12266 steps, including 0 resets, run visited all 1 properties in 9 ms. (steps per millisecond=1362 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 7 properties in 16282 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-13 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Successfully simplified 3 atomic propositions for a total of 11 simplifications.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 5 place count 5 transition count 6
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 3 rules applied. Total rules applied 8 place count 3 transition count 5
Graph (trivial) has 3 edges and 3 vertex of which 2 / 3 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Iterating global reduction 3 with 1 rules applied. Total rules applied 9 place count 2 transition count 5
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 11 place count 2 transition count 3
Applied a total of 11 rules in 17 ms. Remains 2 /9 variables (removed 7) and now considering 3/8 (removed 5) transitions.
// Phase 1: matrix 3 rows 2 cols
[2025-06-06 18:59:44] [INFO ] Computed 1 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:44] [INFO ] Implicit Places using invariants in 21 ms returned []
[2025-06-06 18:59:44] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:44] [INFO ] State equation strengthened by 1 read => feed constraints.
[2025-06-06 18:59:44] [INFO ] Implicit Places using invariants and state equation in 18 ms returned []
Implicit Place search using SMT with State Equation took 41 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 18:59:44] [INFO ] Redundant transitions in 0 ms returned []
Running 2 sub problems to find dead transitions.
[2025-06-06 18:59:44] [INFO ] Invariant cache hit.
[2025-06-06 18:59:44] [INFO ] State equation strengthened by 1 read => feed constraints.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 1/5 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/5 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 7 (OVERLAPS) 0/5 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Real declared 5/5 variables, and 4 constraints, problems are : Problem set: 0 solved, 2 unsolved in 31 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 2/5 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/4 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (OVERLAPS) 1/5 variables, 1/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/5 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 8 (OVERLAPS) 0/5 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 5/5 variables, and 6 constraints, problems are : Problem set: 0 solved, 2 unsolved in 33 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 68ms problems are : Problem set: 0 solved, 2 unsolved
Search for dead transitions found 0 dead transitions in 68ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/9 places, 3/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 130 ms. Remains : 2/9 places, 3/8 transitions.
Stuttering acceptance computed with spot in 135 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 2 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00 finished in 324 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0&&(p1||G(p2)))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2025-06-06 18:59:44] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:44] [INFO ] Implicit Places using invariants in 30 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 32 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 33 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 142 ms :[true, (OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p2), (OR (NOT p0) (AND (NOT p1) (NOT p2)))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02
Product exploration explored 100000 steps with 50000 reset in 156 ms.
Product exploration explored 100000 steps with 50000 reset in 90 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p2 p0 p1), (X (NOT (OR (NOT p0) (AND (NOT p1) (NOT p2))))), (X p2), (X (NOT (AND p0 (NOT p1) p2))), (X p0), (X p1), (X (X p2))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 7 factoid took 15 ms. Reduced automaton from 4 states, 6 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02 finished in 468 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0))&&((p1 U p0)||X(p2))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2025-06-06 18:59:44] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:44] [INFO ] Implicit Places using invariants in 22 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 23 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 24 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 200 ms :[(NOT p0), (NOT p0), (NOT p2), (AND (NOT p0) (NOT p2)), true, (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03
Product exploration explored 100000 steps with 0 reset in 147 ms.
Stack based approach found an accepted trace after 97276 steps with 0 reset with depth 97277 and stack size 86039 in 211 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03 finished in 602 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2025-06-06 18:59:45] [INFO ] Computed 3 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:45] [INFO ] Implicit Places using invariants in 23 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 24 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 5 transition count 6
Applied a total of 2 rules in 2 ms. Remains 5 /6 variables (removed 1) and now considering 6/7 (removed 1) transitions.
// Phase 1: matrix 6 rows 5 cols
[2025-06-06 18:59:45] [INFO ] Computed 2 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:45] [INFO ] Implicit Places using invariants in 17 ms returned []
[2025-06-06 18:59:45] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:45] [INFO ] Implicit Places using invariants and state equation in 25 ms returned []
Implicit Place search using SMT with State Equation took 43 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 5/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 72 ms. Remains : 5/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 40 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04
Product exploration explored 100000 steps with 0 reset in 153 ms.
Stack based approach found an accepted trace after 2 steps with 0 reset with depth 3 and stack size 3 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04 finished in 277 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((G(p0)||(G(p1) U p2)) U X(X(X(p2)))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2025-06-06 18:59:45] [INFO ] Computed 4 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:45] [INFO ] Implicit Places using invariants in 21 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 22 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 23 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 1388 ms :[(AND (NOT p1) (NOT p0)), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), true, (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (NOT p2), (OR (NOT p1) (NOT p2)), (OR (NOT p0) (NOT p2)), (OR (NOT p2) (AND (NOT p0) (NOT p1))), (NOT p1), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05
Entered a terminal (fully accepting) state of product in 51449 steps with 0 reset in 39 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05 finished in 1490 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0||X((p0||F(p1))))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
[2025-06-06 18:59:47] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:47] [INFO ] Implicit Places using invariants in 28 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 29 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 30 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 118 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (NOT p1), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09
Product exploration explored 100000 steps with 33333 reset in 138 ms.
Product exploration explored 100000 steps with 33333 reset in 45 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p1), (X (NOT p0)), (X (X (NOT (AND (NOT p0) (NOT p1))))), (X (X (NOT p0))), (X (X p1))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 5 factoid took 17 ms. Reduced automaton from 4 states, 4 edges and 2 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09 finished in 366 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Applied a total of 5 rules in 3 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
// Phase 1: matrix 6 rows 5 cols
[2025-06-06 18:59:47] [INFO ] Computed 2 invariants in 1 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:47] [INFO ] Implicit Places using invariants in 18 ms returned []
[2025-06-06 18:59:47] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:47] [INFO ] State equation strengthened by 1 read => feed constraints.
[2025-06-06 18:59:47] [INFO ] Implicit Places using invariants and state equation in 25 ms returned []
Implicit Place search using SMT with State Equation took 45 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 18:59:47] [INFO ] Redundant transitions in 0 ms returned []
Running 5 sub problems to find dead transitions.
[2025-06-06 18:59:47] [INFO ] Invariant cache hit.
[2025-06-06 18:59:47] [INFO ] State equation strengthened by 1 read => feed constraints.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/5 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/10 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/10 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (OVERLAPS) 1/11 variables, 1/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/11 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (OVERLAPS) 0/11 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Real declared 11/11 variables, and 8 constraints, problems are : Problem set: 0 solved, 5 unsolved in 57 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 5/5 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 5 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/5 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/10 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/10 variables, 5/12 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/10 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (OVERLAPS) 1/11 variables, 1/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/11 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 9 (OVERLAPS) 0/11 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Int declared 11/11 variables, and 13 constraints, problems are : Problem set: 0 solved, 5 unsolved in 58 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 5/5 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 118ms problems are : Problem set: 0 solved, 5 unsolved
Search for dead transitions found 0 dead transitions in 118ms
Starting structural reductions in SI_LTL mode, iteration 1 : 5/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 171 ms. Remains : 5/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 63 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10
Product exploration explored 100000 steps with 0 reset in 114 ms.
Product exploration explored 100000 steps with 0 reset in 124 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 77 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 66 ms :[(NOT p0), (NOT p0)]
RANDOM walk for 49172 steps (8 resets) in 89 ms. (546 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40004 steps (8 resets) in 71 ms. (555 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 52948 steps, run visited all 1 properties in 69 ms. (steps per millisecond=767 )
Probabilistic random walk after 52948 steps, saw 25477 distinct states, run finished after 75 ms. (steps per millisecond=705 ) properties seen :1
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 69 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 76 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 83 ms :[(NOT p0), (NOT p0)]
Support contains 2 out of 5 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 5/5 places, 6/6 transitions.
Applied a total of 0 rules in 2 ms. Remains 5 /5 variables (removed 0) and now considering 6/6 (removed 0) transitions.
[2025-06-06 18:59:48] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:48] [INFO ] Implicit Places using invariants in 22 ms returned []
[2025-06-06 18:59:48] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:48] [INFO ] State equation strengthened by 1 read => feed constraints.
[2025-06-06 18:59:48] [INFO ] Implicit Places using invariants and state equation in 25 ms returned []
Implicit Place search using SMT with State Equation took 51 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 18:59:48] [INFO ] Redundant transitions in 0 ms returned []
Running 5 sub problems to find dead transitions.
[2025-06-06 18:59:48] [INFO ] Invariant cache hit.
[2025-06-06 18:59:48] [INFO ] State equation strengthened by 1 read => feed constraints.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/5 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/10 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/10 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (OVERLAPS) 1/11 variables, 1/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/11 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (OVERLAPS) 0/11 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Real declared 11/11 variables, and 8 constraints, problems are : Problem set: 0 solved, 5 unsolved in 63 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 5/5 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 5 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/5 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/10 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/10 variables, 5/12 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/10 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (OVERLAPS) 1/11 variables, 1/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/11 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 9 (OVERLAPS) 0/11 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Int declared 11/11 variables, and 13 constraints, problems are : Problem set: 0 solved, 5 unsolved in 62 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 5/5 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 128ms problems are : Problem set: 0 solved, 5 unsolved
Search for dead transitions found 0 dead transitions in 128ms
Finished structural reductions in SI_LTL mode , in 1 iterations and 186 ms. Remains : 5/5 places, 6/6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 79 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 81 ms :[(NOT p0), (NOT p0)]
RANDOM walk for 49172 steps (8 resets) in 57 ms. (847 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40004 steps (8 resets) in 67 ms. (588 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 52948 steps, run visited all 1 properties in 48 ms. (steps per millisecond=1103 )
Probabilistic random walk after 52948 steps, saw 25477 distinct states, run finished after 48 ms. (steps per millisecond=1103 ) properties seen :1
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 100 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 67 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 75 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 64 ms :[(NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 69 ms.
Product exploration explored 100000 steps with 0 reset in 77 ms.
Built C files in :
/tmp/ltsmin2746418440424732428
[2025-06-06 18:59:49] [INFO ] Computing symmetric may disable matrix : 6 transitions.
[2025-06-06 18:59:49] [INFO ] Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 18:59:49] [INFO ] Computing symmetric may enable matrix : 6 transitions.
[2025-06-06 18:59:49] [INFO ] Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 18:59:49] [INFO ] Computing Do-Not-Accords matrix : 6 transitions.
[2025-06-06 18:59:49] [INFO ] Computation of Completed DNA matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2025-06-06 18:59:49] [INFO ] Built C files in 21ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin2746418440424732428
Running compilation step : cd /tmp/ltsmin2746418440424732428;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
Compilation finished in 197 ms.
Running link step : cd /tmp/ltsmin2746418440424732428;'gcc' '-shared' '-o' 'gal.so' 'model.o'
Link finished in 56 ms.
Running LTSmin : cd /tmp/ltsmin2746418440424732428;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202505121319/bin/pins2lts-mc-linux64' './gal.so' '--threads=8' '-p' '--pins-guards' '--when' '--hoa' '/tmp/stateBased10115827452769354875.hoa' '--buchi-type=spotba'
LTSmin run took 832 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10 finished in 3063 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2025-06-06 18:59:50] [INFO ] Computed 3 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:50] [INFO ] Implicit Places using invariants in 25 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 25 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 27 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 74 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14
Product exploration explored 100000 steps with 5615 reset in 65 ms.
Stack based approach found an accepted trace after 15 steps with 3 reset with depth 4 and stack size 4 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14 finished in 181 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202505121319/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 1 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2025-06-06 18:59:50] [INFO ] Computed 2 invariants in 0 ms
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:50] [INFO ] Implicit Places using invariants in 18 ms returned []
[2025-06-06 18:59:50] [INFO ] Invariant cache hit.
Starting Z3 with timeout 160.0 s and query timeout 16000.0 ms
[2025-06-06 18:59:50] [INFO ] Implicit Places using invariants and state equation in 21 ms returned []
Implicit Place search using SMT with State Equation took 41 ms to find 0 implicit places.
Starting Z3 with timeout 200.0 s and query timeout 20000.0 ms
[2025-06-06 18:59:50] [INFO ] Redundant transitions in 0 ms returned []
Running 3 sub problems to find dead transitions.
[2025-06-06 18:59:50] [INFO ] Invariant cache hit.
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/3 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (OVERLAPS) 1/4 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/4 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 4 (OVERLAPS) 4/8 variables, 4/6 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/8 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 6 (OVERLAPS) 0/8 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Real declared 8/9 variables, and 6 constraints, problems are : Problem set: 0 solved, 3 unsolved in 40 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 3 unsolved
Starting Z3 with timeout 30.0 s and query timeout 3000.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/3 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (OVERLAPS) 1/4 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/4 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 4 (OVERLAPS) 4/8 variables, 4/6 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/8 variables, 3/9 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/8 variables, 0/9 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 7 (OVERLAPS) 0/8 variables, 0/9 constraints. Problems are: Problem set: 0 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Int declared 8/9 variables, and 9 constraints, problems are : Problem set: 0 solved, 3 unsolved in 38 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 80ms problems are : Problem set: 0 solved, 3 unsolved
Search for dead transitions found 0 dead transitions in 80ms
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 126 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 33 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15 finished in 170 ms.
All properties solved by simple procedures.
Total runtime 24920 ms.

BK_STOP 1749236391028

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202505121319.jar
+ VERSION=202505121319
+ echo 'Running Version 202505121319'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC2048"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5832"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT4096DC2048, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-tall-174901994800667"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC2048.tgz
mv SmallOperatingSystem-PT-MT4096DC2048 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;