About the Execution of ITS-Tools for FireWire-PT-16
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
0.000 | 13433.00 | 0.00 | 0.00 | TFFFTTFTFFTTFTFT | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2025-input.r086-smll-174860102400367.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2025-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5832
Executing tool itstools
Input is FireWire-PT-16, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r086-smll-174860102400367
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 6.8K May 29 14:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K May 29 14:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K May 29 14:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 29 14:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 29 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 29 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 29 14:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 29 14:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K May 29 14:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K May 29 14:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K May 29 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K May 29 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 29 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 29 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 29 14:32 equiv_col
-rw-r--r-- 1 mcc users 3 May 29 14:32 instance
-rw-r--r-- 1 mcc users 6 May 29 14:32 iscolored
-rw-r--r-- 1 mcc users 84K May 29 14:32 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
echo here is the order used to build the result vector(from xml file)
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-00
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-01
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-02
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-03
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-04
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-05
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-06
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-07
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-08
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-09
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-10
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-11
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-12
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-13
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-14
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2025-15
=== Now, execution of the tool begins
BK_START 1748888623823
Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-16
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
ReachabilityFireability PT
Running Version 202505121319
[2025-06-02 18:23:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2025-06-02 18:23:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2025-06-02 18:23:46] [INFO ] Load time of PNML (sax parser for PT used): 199 ms
[2025-06-02 18:23:46] [INFO ] Transformed 254 places.
[2025-06-02 18:23:46] [INFO ] Transformed 368 transitions.
[2025-06-02 18:23:46] [INFO ] Found NUPN structural information;
[2025-06-02 18:23:47] [INFO ] Parsed PT model containing 254 places and 368 transitions and 1032 arcs in 462 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 35 ms.
Working with output stream class java.io.PrintStream
RANDOM walk for 40000 steps (12 resets) in 2917 ms. (13 steps per ms) remains 15/16 properties
FORMULA FireWire-PT-16-ReachabilityFireability-2025-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
BEST_FIRST walk for 4000 steps (8 resets) in 107 ms. (37 steps per ms) remains 15/15 properties
[2025-06-02 18:23:48] [INFO ] Flatten gal took : 152 ms
BEST_FIRST walk for 4001 steps (10 resets) in 63 ms. (62 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4000 steps (9 resets) in 134 ms. (29 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (11 resets) in 150 ms. (26 steps per ms) remains 15/15 properties
[2025-06-02 18:23:48] [INFO ] Flatten gal took : 121 ms
BEST_FIRST walk for 4001 steps (10 resets) in 126 ms. (31 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (9 resets) in 144 ms. (27 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (10 resets) in 90 ms. (43 steps per ms) remains 15/15 properties
[2025-06-02 18:23:48] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality15820482800582657790.gal : 74 ms
BEST_FIRST walk for 4002 steps (11 resets) in 123 ms. (32 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (11 resets) in 111 ms. (35 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4000 steps (8 resets) in 51 ms. (76 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (9 resets) in 99 ms. (40 steps per ms) remains 15/15 properties
[2025-06-02 18:23:48] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality10855055858576632011.prop : 14 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202505121319/bin/its-reach-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/ReachabilityCardinality15820482800582657790.gal' '-t' 'CGAL' '-reachable-file' '/tmp/ReachabilityCardinality10855055858576632011.prop' '--nowitness' '--gen-order' 'FOLLOW'
BEST_FIRST walk for 4001 steps (8 resets) in 198 ms. (20 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4002 steps (8 resets) in 136 ms. (29 steps per ms) remains 15/15 properties
its-reach command run as :
/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202505121319/bin/its-reach-linux64 --gc-threshold 2000000 --quiet ...330
BEST_FIRST walk for 4000 steps (8 resets) in 30 ms. (129 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (9 resets) in 40 ms. (97 steps per ms) remains 15/15 properties
Loading property file /tmp/ReachabilityCardinality10855055858576632011.prop.
SDD proceeding with computation,15 properties remain. new max is 4
SDD size :1 after 5
SDD proceeding with computation,15 properties remain. new max is 8
SDD size :5 after 7
SDD proceeding with computation,15 properties remain. new max is 16
SDD size :7 after 13
SDD proceeding with computation,15 properties remain. new max is 32
SDD size :13 after 45
SDD proceeding with computation,15 properties remain. new max is 64
SDD size :45 after 60
SDD proceeding with computation,15 properties remain. new max is 128
SDD size :60 after 71
SDD proceeding with computation,15 properties remain. new max is 256
SDD size :71 after 139
Reachability property FireWire-PT-16-ReachabilityFireability-2025-11 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Reachability property FireWire-PT-16-ReachabilityFireability-2025-00 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
SDD proceeding with computation,13 properties remain. new max is 256
SDD size :139 after 530
SDD proceeding with computation,13 properties remain. new max is 512
SDD size :530 after 643
Reachability property FireWire-PT-16-ReachabilityFireability-2025-04 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Invariant property FireWire-PT-16-ReachabilityFireability-2025-01 does not hold.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
SDD proceeding with computation,11 properties remain. new max is 512
SDD size :643 after 181064
Reachability property FireWire-PT-16-ReachabilityFireability-2025-10 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Reachability property FireWire-PT-16-ReachabilityFireability-2025-05 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
SDD proceeding with computation,9 properties remain. new max is 512
SDD size :181064 after 182536
Reachability property FireWire-PT-16-ReachabilityFireability-2025-15 is true.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Interrupted probabilistic random walk after 339426 steps, run timeout after 3001 ms. (steps per millisecond=113 ) properties seen :5 out of 15
Probabilistic random walk after 339426 steps, saw 81884 distinct states, run finished after 3009 ms. (steps per millisecond=112 ) properties seen :5
// Phase 1: matrix 368 rows 254 cols
[2025-06-02 18:23:51] [INFO ] Computed 5 invariants in 54 ms
Excessive predecessor constraint size, skipping predecessor.
Excessive predecessor constraint size, skipping predecessor.
Starting Z3 with timeout 5.0 s and query timeout 500.0 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/125 variables, 125/125 constraints. Problems are: Problem set: 0 solved, 8 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/125 variables, 0/125 constraints. Problems are: Problem set: 0 solved, 8 unsolved
Problem FireWire-PT-16-ReachabilityFireability-2025-06 is UNSAT
FORMULA FireWire-PT-16-ReachabilityFireability-2025-06 FALSE TECHNIQUES SMT_REFINEMENT
Problem FireWire-PT-16-ReachabilityFireability-2025-08 is UNSAT
FORMULA FireWire-PT-16-ReachabilityFireability-2025-08 FALSE TECHNIQUES SMT_REFINEMENT
Problem FireWire-PT-16-ReachabilityFireability-2025-12 is UNSAT
FORMULA FireWire-PT-16-ReachabilityFireability-2025-12 FALSE TECHNIQUES SMT_REFINEMENT
Problem FireWire-PT-16-ReachabilityFireability-2025-14 is UNSAT
FORMULA FireWire-PT-16-ReachabilityFireability-2025-14 FALSE TECHNIQUES SMT_REFINEMENT
At refinement iteration 2 (OVERLAPS) 129/254 variables, 5/130 constraints. Problems are: Problem set: 4 solved, 4 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/254 variables, 129/259 constraints. Problems are: Problem set: 4 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/254 variables, 0/259 constraints. Problems are: Problem set: 4 solved, 4 unsolved
At refinement iteration 5 (OVERLAPS) 368/622 variables, 254/513 constraints. Problems are: Problem set: 4 solved, 4 unsolved
Invariant property FireWire-PT-16-ReachabilityFireability-2025-03 does not hold.
FORMULA FireWire-PT-16-ReachabilityFireability-2025-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
SDD proceeding with computation,7 properties remain. new max is 512
SDD size :182536 after 184478
At refinement iteration 6 (INCLUDED_ONLY) 0/622 variables, 0/513 constraints. Problems are: Problem set: 5 solved, 3 unsolved
At refinement iteration 7 (OVERLAPS) 0/622 variables, 0/513 constraints. Problems are: Problem set: 5 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Real declared 622/622 variables, and 513 constraints, problems are : Problem set: 5 solved, 3 unsolved in 1435 ms.
Refiners :[Domain max(s): 254/254 constraints, Positive P Invariants (semi-flows): 5/5 constraints, State Equation: 254/254 constraints, PredecessorRefiner: 8/4 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 3 unsolved
Starting Z3 with timeout 5.0 s and query timeout 500.0 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/54 variables, 54/54 constraints. Problems are: Problem set: 5 solved, 3 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/54 variables, 0/54 constraints. Problems are: Problem set: 5 solved, 3 unsolved
Problem FireWire-PT-16-ReachabilityFireability-2025-13 is UNSAT
FORMULA FireWire-PT-16-ReachabilityFireability-2025-13 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 2 (OVERLAPS) 200/254 variables, 5/59 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/254 variables, 200/259 constraints. Problems are: Problem set: 6 solved, 2 unsolved
Starting Z3 with timeout 120.0 s and query timeout 12000.0 ms
[2025-06-02 18:23:54] [INFO ] Deduced a trap composed of 16 places in 309 ms of which 28 ms to minimize.
Starting Z3 with timeout 120.0 s and query timeout 12000.0 ms
[2025-06-02 18:23:54] [INFO ] Deduced a trap composed of 101 places in 197 ms of which 24 ms to minimize.
Starting Z3 with timeout 120.0 s and query timeout 12000.0 ms
[2025-06-02 18:23:54] [INFO ] Deduced a trap composed of 33 places in 213 ms of which 28 ms to minimize.
Starting Z3 with timeout 120.0 s and query timeout 12000.0 ms
[2025-06-02 18:23:54] [INFO ] Deduced a trap composed of 105 places in 216 ms of which 25 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/254 variables, 4/263 constraints. Problems are: Problem set: 6 solved, 2 unsolved
Starting Z3 with timeout 120.0 s and query timeout 12000.0 ms
[2025-06-02 18:23:55] [INFO ] Deduced a trap composed of 76 places in 229 ms of which 43 ms to minimize.
At refinement iteration 5 (INCLUDED_ONLY) 0/254 variables, 1/264 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/254 variables, 0/264 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 7 (OVERLAPS) 368/622 variables, 254/518 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/622 variables, 2/520 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/622 variables, 0/520 constraints. Problems are: Problem set: 6 solved, 2 unsolved
At refinement iteration 10 (OVERLAPS) 0/622 variables, 0/520 constraints. Problems are: Problem set: 6 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 622/622 variables, and 520 constraints, problems are : Problem set: 6 solved, 2 unsolved in 2630 ms.
Refiners :[Domain max(s): 254/254 constraints, Positive P Invariants (semi-flows): 5/5 constraints, State Equation: 254/254 constraints, PredecessorRefiner: 3/4 constraints, Known Traps: 5/5 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 4344ms problems are : Problem set: 6 solved, 2 unsolved
Parikh walk visited 0 properties in 547 ms.
Support contains 20 out of 254 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 254/254 places, 368/368 transitions.
Graph (trivial) has 189 edges and 254 vertex of which 19 / 254 are part of one of the 3 SCC in 3 ms
Free SCC test removed 16 places
Drop transitions (Empty/Sink Transition effects.) removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Graph (complete) has 581 edges and 238 vertex of which 235 are kept as prefixes of interest. Removing 3 places using SCC suffix rule.2 ms
Discarding 3 places :
Also discarding 0 output transitions
Drop transitions (Empty/Sink Transition effects.) removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 63 transitions
Trivial Post-agglo rules discarded 63 transitions
Performed 63 trivial Post agglomeration. Transition count delta: 63
Iterating post reduction 0 with 64 rules applied. Total rules applied 66 place count 235 transition count 284
Reduce places removed 63 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 66 rules applied. Total rules applied 132 place count 172 transition count 281
Reduce places removed 2 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 2 with 6 rules applied. Total rules applied 138 place count 170 transition count 277
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 142 place count 166 transition count 277
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 4 Pre rules applied. Total rules applied 142 place count 166 transition count 273
Deduced a syphon composed of 4 places in 3 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 4 with 8 rules applied. Total rules applied 150 place count 162 transition count 273
Discarding 25 places :
Symmetric choice reduction at 4 with 25 rule applications. Total rules 175 place count 137 transition count 247
Iterating global reduction 4 with 25 rules applied. Total rules applied 200 place count 137 transition count 247
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 201 place count 137 transition count 246
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 5 Pre rules applied. Total rules applied 201 place count 137 transition count 241
Deduced a syphon composed of 5 places in 2 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 5 with 10 rules applied. Total rules applied 211 place count 132 transition count 241
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 213 place count 130 transition count 237
Iterating global reduction 5 with 2 rules applied. Total rules applied 215 place count 130 transition count 237
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 5 with 2 rules applied. Total rules applied 217 place count 130 transition count 235
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 218 place count 129 transition count 235
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Deduced a syphon composed of 18 places in 1 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 7 with 36 rules applied. Total rules applied 254 place count 111 transition count 217
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: -58
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 7 with 28 rules applied. Total rules applied 282 place count 97 transition count 275
Drop transitions (Empty/Sink Transition effects.) removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 7 with 3 rules applied. Total rules applied 285 place count 97 transition count 272
Drop transitions (Redundant composition of simpler transitions.) removed 15 transitions
Redundant transition composition rules discarded 15 transitions
Iterating global reduction 8 with 15 rules applied. Total rules applied 300 place count 97 transition count 257
Free-agglomeration rule applied 10 times.
Iterating global reduction 8 with 10 rules applied. Total rules applied 310 place count 97 transition count 247
Reduce places removed 10 places and 0 transitions.
Drop transitions (Empty/Sink Transition effects.) removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 8 with 13 rules applied. Total rules applied 323 place count 87 transition count 244
Drop transitions (Redundant composition of simpler transitions.) removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 9 with 5 rules applied. Total rules applied 328 place count 87 transition count 239
Partial Free-agglomeration rule applied 1 times.
Drop transitions (Partial Free agglomeration) removed 1 transitions
Iterating global reduction 9 with 1 rules applied. Total rules applied 329 place count 87 transition count 239
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 9 with 1 rules applied. Total rules applied 330 place count 86 transition count 238
Applied a total of 330 rules in 198 ms. Remains 86 /254 variables (removed 168) and now considering 238/368 (removed 130) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 208 ms. Remains : 86/254 places, 238/368 transitions.
RANDOM walk for 40000 steps (2687 resets) in 411 ms. (97 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40001 steps (799 resets) in 186 ms. (213 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40003 steps (816 resets) in 160 ms. (248 steps per ms) remains 2/2 properties
SDD proceeding with computation,7 properties remain. new max is 1024
SDD size :184478 after 186291
Finished probabilistic random walk after 30037 steps, run visited all 2 properties in 108 ms. (steps per millisecond=278 )
Probabilistic random walk after 30037 steps, saw 9754 distinct states, run finished after 114 ms. (steps per millisecond=263 ) properties seen :2
FORMULA FireWire-PT-16-ReachabilityFireability-2025-09 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2025-07 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
ITS runner timed out or was interrupted.
ITS tools runner thread asked to quit. Dying gracefully.
All properties solved without resorting to model-checking.
Total runtime 10749 ms.
BK_STOP 1748888637256
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202505121319.jar
+ VERSION=202505121319
+ echo 'Running Version 202505121319'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-16"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5832"
echo " Executing tool itstools"
echo " Input is FireWire-PT-16, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r086-smll-174860102400367"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-16.tgz
mv FireWire-PT-16 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;