Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2025-input.r086-smll-174860102000198.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2025-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5832
Executing tool itstools
Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r086-smll-174860102000198
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 21K May 29 14:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 161K May 29 14:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 35K May 29 14:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 146K May 29 14:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 29 14:32 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 29 14:32 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K May 29 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 57K May 29 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 29 14:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 55K May 29 14:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 63K May 29 14:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 452K May 29 14:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101K May 29 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 410K May 29 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K May 29 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.3K May 29 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 29 14:32 equiv_col
-rw-r--r-- 1 mcc users 24 May 29 14:32 instance
-rw-r--r-- 1 mcc users 6 May 29 14:32 iscolored
-rw-r--r-- 1 mcc users 552K May 29 14:32 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

echo here is the order used to build the result vector(from xml file)
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-00
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-01
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-02
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-03
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-04
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-05
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-06
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-07
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-08
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-09
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-10
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-11
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-12
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-13
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-14
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-15

=== Now, execution of the tool begins

BK_START 1748794090621

Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-PT-L00010M0001C001P001G001
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
ReachabilityCardinality PT
Running Version 202505121319
[2025-06-01 16:08:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2025-06-01 16:08:12] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2025-06-01 16:08:13] [INFO ] Load time of PNML (sax parser for PT used): 293 ms
[2025-06-01 16:08:13] [INFO ] Transformed 1475 places.
[2025-06-01 16:08:13] [INFO ] Transformed 1234 transitions.
[2025-06-01 16:08:13] [INFO ] Parsed PT model containing 1475 places and 1234 transitions and 3799 arcs in 508 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 56 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 10 places and 0 transitions.
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 40000 steps (60 resets) in 3528 ms. (11 steps per ms) remains 10/15 properties
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2025-06-01 16:08:14] [INFO ] Flatten gal took : 478 ms
[2025-06-01 16:08:15] [INFO ] Flatten gal took : 207 ms
[2025-06-01 16:08:15] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality13195863786286262052.gal : 167 ms
BEST_FIRST walk for 40004 steps (8 resets) in 2589 ms. (15 steps per ms) remains 10/10 properties
[2025-06-01 16:08:15] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality12164939635790364911.prop : 21 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202505121319/bin/its-reach-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/ReachabilityCardinality13195863786286262052.gal' '-t' 'CGAL' '-reachable-file' '/tmp/ReachabilityCardinality12164939635790364911.prop' '--nowitness' '--gen-order' 'FOLLOW'

its-reach command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202505121319/bin/its-reach-linux64 --gc-threshold 2000000 --quiet ...330
Loading property file /tmp/ReachabilityCardinality12164939635790364911.prop.
BEST_FIRST walk for 40004 steps (8 resets) in 2433 ms. (16 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 1302 ms. (30 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 172 ms. (231 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 156 ms. (254 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 491 ms. (81 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 200 ms. (199 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 176 ms. (226 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 184 ms. (216 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 159 ms. (250 steps per ms) remains 10/10 properties
// Phase 1: matrix 1234 rows 1465 cols
[2025-06-01 16:08:17] [INFO ] Computed 332 invariants in 166 ms
Excessive predecessor constraint size, skipping predecessor.
Starting Z3 with timeout 5.0 s and query timeout 500.0 ms
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-07 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-07 TRUE TECHNIQUES SMT_REFINEMENT
SDD proceeding with computation,10 properties remain. new max is 4
SDD size :1 after 4
SDD proceeding with computation,10 properties remain. new max is 8
SDD size :4 after 17
SDD proceeding with computation,10 properties remain. new max is 16
SDD size :17 after 32
SDD proceeding with computation,10 properties remain. new max is 32
SDD size :32 after 256
SDD proceeding with computation,10 properties remain. new max is 64
SDD size :256 after 6336
SDD proceeding with computation,10 properties remain. new max is 128
SDD size :6336 after 188160
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/1310 variables, 128/128 constraints. Problems are: Problem set: 1 solved, 9 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/1310 variables, 0/128 constraints. Problems are: Problem set: 1 solved, 9 unsolved
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-08 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-08 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-10 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-10 FALSE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-14 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-14 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 2 (OVERLAPS) 70/1380 variables, 30/158 constraints. Problems are: Problem set: 4 solved, 6 unsolved
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-05 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-05 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 3 (INCLUDED_ONLY) 0/1380 variables, 75/233 constraints. Problems are: Problem set: 5 solved, 5 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/1380 variables, 0/233 constraints. Problems are: Problem set: 5 solved, 5 unsolved
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-00 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-00 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-01 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-01 FALSE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-04 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-04 FALSE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-06 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-06 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-09 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2025-09 TRUE TECHNIQUES SMT_REFINEMENT
After SMT solving in domain Real declared 1465/2699 variables, and 332 constraints, problems are : Problem set: 10 solved, 0 unsolved in 2279 ms.
Refiners :[Positive P Invariants (semi-flows): 30/30 constraints, Generalized P Invariants (flows): 302/302 constraints, State Equation: 0/1465 constraints, PredecessorRefiner: 9/6 constraints, Known Traps: 0/0 constraints, Known Traps Along Path: 0/0 constraints]
After SMT, in 2608ms problems are : Problem set: 10 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
ITS runner timed out or was interrupted.
ITS tools runner thread asked to quit. Dying gracefully.
All properties solved without resorting to model-checking.
Total runtime 6824 ms.

BK_STOP 1748794099805

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202505121319.jar
+ VERSION=202505121319
+ echo 'Running Version 202505121319'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00010M0001C001P001G001"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5832"
echo " Executing tool itstools"
echo " Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r086-smll-174860102000198"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00010M0001C001P001G001.tgz
mv FamilyReunion-PT-L00010M0001C001P001G001 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;