Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r602-tall-171774424800291.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool itstools
Input is BlocksWorld-PT-17, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r602-tall-171774424800291
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 127M
-rw-r--r-- 1 mcc users 2.3M Jun 7 06:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 11M Jun 7 06:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0M Jun 7 06:38 CTLFireability.txt
-rw-r--r-- 1 mcc users 21M Jun 7 06:38 CTLFireability.xml
-rw-r--r-- 1 mcc users 49K Jun 7 06:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 152K Jun 7 06:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7M Jun 7 06:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 6.2M Jun 7 06:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 7 06:26 NewModel
-rw-r--r-- 1 mcc users 4.2M Jun 7 06:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19M Jun 7 06:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2M Jun 7 06:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 43M Jun 7 06:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 338K Jun 7 06:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 812K Jun 7 06:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jun 7 06:26 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 7 06:26 instance
-rw-r--r-- 1 mcc users 6 Jun 7 06:26 iscolored
-rw-r--r-- 1 mcc users 7.4M Jun 7 06:26 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-00
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-01
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-02
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-03
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-04
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-05
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-06
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-07
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-08
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-09
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-10
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-11
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-12
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-13
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-14
FORMULA_NAME BlocksWorld-PT-17-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717768973759

Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BlocksWorld-PT-17
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
LTLCardinality PT
Running Version 202405141337
[2024-06-07 14:02:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2024-06-07 14:02:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-07 14:02:55] [INFO ] Load time of PNML (sax parser for PT used): 535 ms
[2024-06-07 14:02:55] [INFO ] Transformed 7831 places.
[2024-06-07 14:02:55] [INFO ] Transformed 15313 transitions.
[2024-06-07 14:02:55] [INFO ] Found NUPN structural information;
[2024-06-07 14:02:55] [INFO ] Completing missing partition info from NUPN : creating a component with [pred_on_table_0, pred_arm_empty_0, pred_on_table_1, pred_on_table_2, pred_on_table_3, pred_on_table_4, pred_on_table_5, pred_on_table_6, pred_on_table_7, pred_on_table_8, pred_on_table_9, pred_on_table_10, pred_on_table_11, pred_on_table_12, pred_on_table_13, pred_on_table_14, pred_on_table_15, pred_on_table_16, pred_on_table_17, pred_on_table_18, pred_on_table_19, pred_on_table_20, pred_on_table_21, pred_on_table_22, pred_on_table_23, pred_on_table_24, pred_on_table_25, pred_on_table_26, pred_on_table_27, pred_on_table_28, pred_on_table_29, pred_on_table_30, pred_on_table_31, pred_on_table_32, pred_on_table_33, pred_on_table_34, pred_on_table_35, pred_on_table_36, pred_on_table_37, pred_on_table_38, pred_on_table_39, pred_on_table_40, pred_on_table_41, pred_on_table_42, pred_on_table_43, pred_on_table_44, pred_on_table_45, pred_on_table_46, pred_on_table_47, pred_on_table_48, pred_on_table_49, pred_on_table_50, pred_on_table_51, pred_on_table_52, pred_on_table_53, pred_on_table_54, pred_on_table_55, pred_on_table_56, pred_on_table_57, pred_on_table_58, pred_on_table_59, pred_on_table_60, pred_on_table_61, pred_on_table_62, pred_on_table_63, pred_on_table_64, pred_on_table_65, pred_on_table_66, pred_on_table_67, pred_on_table_68, pred_on_table_69, pred_on_table_70, pred_on_table_71, pred_on_table_72, pred_on_table_73, pred_on_table_74, pred_on_table_75, pred_on_table_76, pred_on_table_77, pred_on_table_78, pred_on_table_79, pred_on_table_80, pred_on_table_81, pred_on_table_82, pred_on_table_83, pred_on_table_84, pred_on_table_85, pred_on_table_86]
[2024-06-07 14:02:55] [INFO ] Parsed PT model containing 7831 places and 15313 transitions and 76536 arcs in 719 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 21 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 4 formulas.
FORMULA BlocksWorld-PT-17-LTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 262 out of 7831 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7831/7831 places, 15313/15313 transitions.
Applied a total of 0 rules in 1277 ms. Remains 7831 /7831 variables (removed 0) and now considering 15313/15313 (removed 0) transitions.
// Phase 1: matrix 15313 rows 7831 cols
[2024-06-07 14:02:57] [INFO ] Computed 175 invariants in 231 ms
[2024-06-07 14:03:05] [INFO ] Implicit Places using invariants in 8265 ms returned []
Implicit Place search using SMT only with invariants took 8300 ms to find 0 implicit places.
Running 15306 sub problems to find dead transitions.
[2024-06-07 14:03:06] [INFO ] Invariant cache hit.
[2024-06-07 14:03:06] [INFO ] State equation strengthened by 161 read => feed constraints.
Problem TDEAD1 is UNSAT
Problem TDEAD88 is UNSAT
Problem TDEAD262 is UNSAT
Problem TDEAD350 is UNSAT
Problem TDEAD438 is UNSAT
Problem TDEAD526 is UNSAT
Problem TDEAD614 is UNSAT
Problem TDEAD702 is UNSAT
Problem TDEAD790 is UNSAT
Problem TDEAD878 is UNSAT
Problem TDEAD966 is UNSAT
Problem TDEAD1054 is UNSAT
Problem TDEAD1142 is UNSAT
Problem TDEAD1230 is UNSAT
Problem TDEAD1406 is UNSAT
Problem TDEAD1494 is UNSAT
Problem TDEAD1582 is UNSAT
Problem TDEAD1670 is UNSAT
Problem TDEAD1758 is UNSAT
Problem TDEAD1846 is UNSAT
Problem TDEAD1934 is UNSAT
Problem TDEAD2110 is UNSAT
Problem TDEAD2198 is UNSAT
Problem TDEAD2286 is UNSAT
Problem TDEAD2374 is UNSAT
Problem TDEAD2462 is UNSAT
Problem TDEAD2550 is UNSAT
Problem TDEAD2638 is UNSAT
Problem TDEAD2726 is UNSAT
Problem TDEAD2814 is UNSAT
Problem TDEAD2902 is UNSAT
Problem TDEAD2990 is UNSAT
Problem TDEAD3078 is UNSAT
Problem TDEAD3166 is UNSAT
Problem TDEAD3254 is UNSAT
Problem TDEAD3342 is UNSAT
Problem TDEAD3430 is UNSAT
Problem TDEAD3606 is UNSAT
Problem TDEAD3694 is UNSAT
Problem TDEAD3782 is UNSAT
Problem TDEAD3870 is UNSAT
Problem TDEAD3958 is UNSAT
Problem TDEAD4046 is UNSAT
Problem TDEAD4134 is UNSAT
Problem TDEAD4222 is UNSAT
Problem TDEAD4310 is UNSAT
Problem TDEAD4398 is UNSAT
Problem TDEAD4486 is UNSAT
Problem TDEAD4662 is UNSAT
Problem TDEAD4750 is UNSAT
Problem TDEAD4838 is UNSAT
Problem TDEAD4926 is UNSAT
Problem TDEAD5014 is UNSAT
Problem TDEAD5102 is UNSAT
Problem TDEAD5190 is UNSAT
Problem TDEAD5278 is UNSAT
Problem TDEAD5366 is UNSAT
Problem TDEAD5454 is UNSAT
Problem TDEAD5542 is UNSAT
Problem TDEAD5630 is UNSAT
Problem TDEAD5718 is UNSAT
Problem TDEAD5806 is UNSAT
Problem TDEAD5894 is UNSAT
Problem TDEAD5982 is UNSAT
Problem TDEAD6070 is UNSAT
Problem TDEAD6158 is UNSAT
Problem TDEAD6246 is UNSAT
Problem TDEAD6334 is UNSAT
Problem TDEAD6422 is UNSAT
Problem TDEAD6510 is UNSAT
Problem TDEAD6598 is UNSAT
Problem TDEAD6686 is UNSAT
Problem TDEAD6774 is UNSAT
Problem TDEAD6862 is UNSAT
Problem TDEAD6950 is UNSAT
Problem TDEAD7038 is UNSAT
Problem TDEAD7126 is UNSAT
Problem TDEAD7302 is UNSAT
Problem TDEAD7390 is UNSAT
Problem TDEAD7478 is UNSAT
Problem TDEAD7566 is UNSAT
Problem TDEAD7654 is UNSAT
Problem TDEAD7742 is UNSAT
Problem TDEAD7830 is UNSAT
Problem TDEAD8002 is UNSAT
Problem TDEAD8172 is UNSAT
Problem TDEAD8340 is UNSAT
Problem TDEAD8506 is UNSAT
Problem TDEAD8670 is UNSAT
Problem TDEAD8832 is UNSAT
Problem TDEAD8992 is UNSAT
Problem TDEAD9150 is UNSAT
Problem TDEAD9306 is UNSAT
Problem TDEAD9460 is UNSAT
Problem TDEAD9612 is UNSAT
Problem TDEAD9910 is UNSAT
Problem TDEAD10056 is UNSAT
Problem TDEAD10200 is UNSAT
Problem TDEAD10342 is UNSAT
Problem TDEAD10482 is UNSAT
Problem TDEAD10620 is UNSAT
Problem TDEAD10756 is UNSAT
Problem TDEAD11022 is UNSAT
Problem TDEAD11152 is UNSAT
Problem TDEAD11280 is UNSAT
Problem TDEAD11406 is UNSAT
Problem TDEAD11530 is UNSAT
Problem TDEAD11652 is UNSAT
Problem TDEAD11772 is UNSAT
Problem TDEAD11890 is UNSAT
Problem TDEAD12006 is UNSAT
Problem TDEAD12120 is UNSAT
Problem TDEAD12232 is UNSAT
Problem TDEAD12342 is UNSAT
Problem TDEAD12450 is UNSAT
Problem TDEAD12556 is UNSAT
Problem TDEAD12660 is UNSAT
Problem TDEAD12762 is UNSAT
Problem TDEAD12960 is UNSAT
Problem TDEAD13056 is UNSAT
Problem TDEAD13150 is UNSAT
Problem TDEAD13242 is UNSAT
Problem TDEAD13332 is UNSAT
Problem TDEAD13420 is UNSAT
Problem TDEAD13506 is UNSAT
Problem TDEAD13590 is UNSAT
Problem TDEAD13672 is UNSAT
Problem TDEAD13752 is UNSAT
Problem TDEAD13830 is UNSAT
Problem TDEAD13980 is UNSAT
Problem TDEAD14052 is UNSAT
Problem TDEAD14122 is UNSAT
Problem TDEAD14190 is UNSAT
Problem TDEAD14256 is UNSAT
Problem TDEAD14320 is UNSAT
Problem TDEAD14382 is UNSAT
Problem TDEAD14442 is UNSAT
Problem TDEAD14500 is UNSAT
Problem TDEAD14556 is UNSAT
Problem TDEAD14610 is UNSAT
Problem TDEAD14662 is UNSAT
Problem TDEAD14712 is UNSAT
Problem TDEAD14760 is UNSAT
Problem TDEAD14806 is UNSAT
Problem TDEAD14850 is UNSAT
Problem TDEAD14892 is UNSAT
Problem TDEAD14932 is UNSAT
Problem TDEAD14970 is UNSAT
Problem TDEAD15006 is UNSAT
Problem TDEAD15040 is UNSAT
Problem TDEAD15072 is UNSAT
Problem TDEAD15102 is UNSAT
Problem TDEAD15130 is UNSAT
Problem TDEAD15156 is UNSAT
Problem TDEAD15180 is UNSAT
Problem TDEAD15202 is UNSAT
Problem TDEAD15222 is UNSAT
Problem TDEAD15240 is UNSAT
Problem TDEAD15270 is UNSAT
Problem TDEAD15282 is UNSAT
Problem TDEAD15292 is UNSAT
Problem TDEAD15300 is UNSAT
Problem TDEAD15306 is UNSAT
Problem TDEAD15310 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/7824 variables, 163/163 constraints. Problems are: Problem set: 164 solved, 15142 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 7824/23144 variables, and 163 constraints, problems are : Problem set: 164 solved, 15142 unsolved in 30659 ms.
Refiners :[Positive P Invariants (semi-flows): 163/175 constraints, State Equation: 0/7831 constraints, ReadFeed: 0/161 constraints, PredecessorRefiner: 15224/7657 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 164 solved, 15142 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/7742 variables, 6/6 constraints. Problems are: Problem set: 164 solved, 15142 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 7742/23144 variables, and 6 constraints, problems are : Problem set: 164 solved, 15142 unsolved in 30208 ms.
Refiners :[Positive P Invariants (semi-flows): 6/175 constraints, State Equation: 0/7831 constraints, ReadFeed: 0/161 constraints, PredecessorRefiner: 7567/7657 constraints, Known Traps: 0/0 constraints]
After SMT, in 228956ms problems are : Problem set: 164 solved, 15142 unsolved
Search for dead transitions found 164 dead transitions in 229155ms
Found 164 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 164 transitions
Dead transitions reduction (with SMT) removed 164 transitions
Starting structural reductions in LTL mode, iteration 1 : 7831/7831 places, 15149/15313 transitions.
Reduce places removed 82 places and 0 transitions.
Iterating post reduction 0 with 82 rules applied. Total rules applied 82 place count 7749 transition count 15149
Applied a total of 82 rules in 1358 ms. Remains 7749 /7831 variables (removed 82) and now considering 15149/15149 (removed 0) transitions.
// Phase 1: matrix 15149 rows 7749 cols
[2024-06-07 14:06:56] [INFO ] Computed 175 invariants in 102 ms
[2024-06-07 14:07:02] [INFO ] Implicit Places using invariants in 6519 ms returned []
Implicit Place search using SMT only with invariants took 6522 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 7749/7831 places, 15149/15313 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 246725 ms. Remains : 7749/7831 places, 15149/15313 transitions.
Support contains 262 out of 7749 places after structural reductions.
[2024-06-07 14:07:04] [INFO ] Flatten gal took : 873 ms
[2024-06-07 14:07:04] [INFO ] Flatten gal took : 636 ms
[2024-06-07 14:07:05] [INFO ] Input system was already deterministic with 15149 transitions.
RANDOM walk for 40000 steps (8 resets) in 12822 ms. (3 steps per ms) remains 17/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 162 ms. (24 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 164 ms. (24 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 145 ms. (27 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 152 ms. (26 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 176 ms. (22 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 164 ms. (24 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 197 ms. (20 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 181 ms. (22 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 153 ms. (26 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 174 ms. (22 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 154 ms. (25 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 152 ms. (26 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 132 ms. (30 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4002 steps (8 resets) in 126 ms. (31 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 118 ms. (33 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 124 ms. (32 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 130 ms. (30 steps per ms) remains 17/17 properties
[2024-06-07 14:07:10] [INFO ] Invariant cache hit.
[2024-06-07 14:07:10] [INFO ] State equation strengthened by 11 read => feed constraints.
Problem AtomicPropp3 is UNSAT
Problem AtomicPropp4 is UNSAT
Problem AtomicPropp5 is UNSAT
Problem AtomicPropp13 is UNSAT
Problem AtomicPropp14 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/262 variables, 1/1 constraints. Problems are: Problem set: 5 solved, 12 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/262 variables, 0/1 constraints. Problems are: Problem set: 5 solved, 12 unsolved
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp15 is UNSAT
Problem AtomicPropp17 is UNSAT
Problem AtomicPropp18 is UNSAT
Problem AtomicPropp19 is UNSAT
Problem AtomicPropp20 is UNSAT
At refinement iteration 2 (OVERLAPS) 7487/7749 variables, 174/175 constraints. Problems are: Problem set: 11 solved, 6 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/7749 variables, 0/175 constraints. Problems are: Problem set: 11 solved, 6 unsolved
SMT process timed out in 5397ms, After SMT, problems are : Problem set: 11 solved, 6 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 262 out of 7749 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7749/7749 places, 15149/15149 transitions.
Drop transitions (Empty/Sink Transition effects.) removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 7749 transition count 15148
Applied a total of 1 rules in 135723 ms. Remains 7749 /7749 variables (removed 0) and now considering 15148/15149 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 135727 ms. Remains : 7749/7749 places, 15148/15149 transitions.
FORMULA BlocksWorld-PT-17-LTLCardinality-08 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Successfully simplified 11 atomic propositions for a total of 11 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA BlocksWorld-PT-17-LTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BlocksWorld-PT-17-LTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
FORMULA BlocksWorld-PT-17-LTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)&&X(F(!p0))))'
Support contains 87 out of 7749 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7749/7749 places, 15149/15149 transitions.
Applied a total of 0 rules in 1079 ms. Remains 7749 /7749 variables (removed 0) and now considering 15149/15149 (removed 0) transitions.
[2024-06-07 14:09:33] [INFO ] Invariant cache hit.

BK_STOP 1717769375990

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BlocksWorld-PT-17"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool itstools"
echo " Input is BlocksWorld-PT-17, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r602-tall-171774424800291"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BlocksWorld-PT-17.tgz
mv BlocksWorld-PT-17 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;