About the Execution of LoLA for MedleyA-PT-16
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
12978.880 | 3600000.00 | 1255990.00 | 11084.10 | F???FFF?FFFFFT?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r577-smll-171734920500123.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is MedleyA-PT-16, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r577-smll-171734920500123
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 5.6K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 15K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 169K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 89K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME MedleyA-PT-16-LTLCardinality-00
FORMULA_NAME MedleyA-PT-16-LTLCardinality-01
FORMULA_NAME MedleyA-PT-16-LTLCardinality-02
FORMULA_NAME MedleyA-PT-16-LTLCardinality-03
FORMULA_NAME MedleyA-PT-16-LTLCardinality-04
FORMULA_NAME MedleyA-PT-16-LTLCardinality-05
FORMULA_NAME MedleyA-PT-16-LTLCardinality-06
FORMULA_NAME MedleyA-PT-16-LTLCardinality-07
FORMULA_NAME MedleyA-PT-16-LTLCardinality-08
FORMULA_NAME MedleyA-PT-16-LTLCardinality-09
FORMULA_NAME MedleyA-PT-16-LTLCardinality-10
FORMULA_NAME MedleyA-PT-16-LTLCardinality-11
FORMULA_NAME MedleyA-PT-16-LTLCardinality-12
FORMULA_NAME MedleyA-PT-16-LTLCardinality-13
FORMULA_NAME MedleyA-PT-16-LTLCardinality-14
FORMULA_NAME MedleyA-PT-16-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717387914223
FORMULA MedleyA-PT-16-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MedleyA-PT-16-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 MedleyA-PT-16-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for MedleyA-PT-16-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 20 (type CNST) for 19 MedleyA-PT-16-LTLCardinality-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 48 (type CNST) for 47 MedleyA-PT-16-LTLCardinality-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 20 (type CNST) for MedleyA-PT-16-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 48 (type CNST) for MedleyA-PT-16-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 15 (type CNST) for 12 MedleyA-PT-16-LTLCardinality-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 15 (type CNST) for MedleyA-PT-16-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 MedleyA-PT-16-LTLCardinality-15
[[35mlola[0m][I] time limit : 222 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 25 MedleyA-PT-16-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 9 MedleyA-PT-16-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 36 (type CNST) for 35 MedleyA-PT-16-LTLCardinality-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 36 (type CNST) for MedleyA-PT-16-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for MedleyA-PT-16-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for MedleyA-PT-16-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6856
[[35mlola[0m][I] fired transitions : 24613
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 MedleyA-PT-16-LTLCardinality-12
[[35mlola[0m][I] time limit : 297 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for MedleyA-PT-16-LTLCardinality-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 MedleyA-PT-16-LTLCardinality-11
[[35mlola[0m][I] time limit : 324 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for MedleyA-PT-16-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 MedleyA-PT-16-LTLCardinality-10
[[35mlola[0m][I] time limit : 356 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for MedleyA-PT-16-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 MedleyA-PT-16-LTLCardinality-08
[[35mlola[0m][I] time limit : 396 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for MedleyA-PT-16-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 MedleyA-PT-16-LTLCardinality-06
[[35mlola[0m][I] time limit : 445 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for MedleyA-PT-16-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 12 MedleyA-PT-16-LTLCardinality-04
[[35mlola[0m][I] time limit : 509 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for MedleyA-PT-16-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 MedleyA-PT-16-LTLCardinality-02
[[35mlola[0m][I] time limit : 594 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for MedleyA-PT-16-LTLCardinality-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 5/594 4/2000 MedleyA-PT-16-LTLCardinality-02 546103 m, 109220 m/sec, 3020048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 39 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 10/594 9/2000 MedleyA-PT-16-LTLCardinality-02 1292096 m, 149198 m/sec, 5788767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 44 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 15/594 13/2000 MedleyA-PT-16-LTLCardinality-02 1896551 m, 120891 m/sec, 8505023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 20/594 17/2000 MedleyA-PT-16-LTLCardinality-02 2447718 m, 110233 m/sec, 11162340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 25/594 21/2000 MedleyA-PT-16-LTLCardinality-02 2964173 m, 103291 m/sec, 13700950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 59 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 30/594 24/2000 MedleyA-PT-16-LTLCardinality-02 3452730 m, 97711 m/sec, 16280744 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 64 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 35/594 27/2000 MedleyA-PT-16-LTLCardinality-02 3906782 m, 90810 m/sec, 18761243 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 69 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 40/594 30/2000 MedleyA-PT-16-LTLCardinality-02 4347343 m, 88112 m/sec, 21282851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 74 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 45/594 33/2000 MedleyA-PT-16-LTLCardinality-02 4766640 m, 83859 m/sec, 23799775 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 79 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 50/594 35/2000 MedleyA-PT-16-LTLCardinality-02 5145890 m, 75850 m/sec, 26257624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 84 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 55/594 37/2000 MedleyA-PT-16-LTLCardinality-02 5480131 m, 66848 m/sec, 28842312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 89 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 60/594 40/2000 MedleyA-PT-16-LTLCardinality-02 5811195 m, 66212 m/sec, 31216357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 94 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 65/594 42/2000 MedleyA-PT-16-LTLCardinality-02 6186989 m, 75158 m/sec, 33564452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 99 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 70/594 44/2000 MedleyA-PT-16-LTLCardinality-02 6529638 m, 68529 m/sec, 35744792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 104 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 75/594 47/2000 MedleyA-PT-16-LTLCardinality-02 6874864 m, 69045 m/sec, 38114359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 109 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 80/594 49/2000 MedleyA-PT-16-LTLCardinality-02 7267004 m, 78428 m/sec, 40399423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 114 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 85/594 52/2000 MedleyA-PT-16-LTLCardinality-02 7642495 m, 75098 m/sec, 42200221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 119 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 90/594 54/2000 MedleyA-PT-16-LTLCardinality-02 7957544 m, 63009 m/sec, 44034540 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 124 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 95/594 56/2000 MedleyA-PT-16-LTLCardinality-02 8223012 m, 53093 m/sec, 45954662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 129 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 100/594 58/2000 MedleyA-PT-16-LTLCardinality-02 8550107 m, 65419 m/sec, 48353663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 134 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 105/594 61/2000 MedleyA-PT-16-LTLCardinality-02 8943934 m, 78765 m/sec, 51159310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 139 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 110/594 63/2000 MedleyA-PT-16-LTLCardinality-02 9309772 m, 73167 m/sec, 53917068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 144 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 115/594 65/2000 MedleyA-PT-16-LTLCardinality-02 9661258 m, 70297 m/sec, 56562914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 149 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 120/594 68/2000 MedleyA-PT-16-LTLCardinality-02 10043523 m, 76453 m/sec, 59361204 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 154 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 125/594 70/2000 MedleyA-PT-16-LTLCardinality-02 10366082 m, 64511 m/sec, 62042008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 159 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 130/594 70/2000 MedleyA-PT-16-LTLCardinality-02 10403806 m, 7544 m/sec, 63788447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 164 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 135/594 71/2000 MedleyA-PT-16-LTLCardinality-02 10511882 m, 21615 m/sec, 65878405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 169 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 140/594 72/2000 MedleyA-PT-16-LTLCardinality-02 10583924 m, 14408 m/sec, 67782847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 174 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 145/594 72/2000 MedleyA-PT-16-LTLCardinality-02 10664107 m, 16036 m/sec, 69871025 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 179 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 150/594 73/2000 MedleyA-PT-16-LTLCardinality-02 10737797 m, 14738 m/sec, 72059888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 184 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 155/594 73/2000 MedleyA-PT-16-LTLCardinality-02 10780256 m, 8491 m/sec, 74331505 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 189 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 160/594 75/2000 MedleyA-PT-16-LTLCardinality-02 11090116 m, 61972 m/sec, 76899684 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 194 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 165/594 79/2000 MedleyA-PT-16-LTLCardinality-02 11650345 m, 112045 m/sec, 79800245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 199 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 170/594 82/2000 MedleyA-PT-16-LTLCardinality-02 12173715 m, 104674 m/sec, 82308908 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 204 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 175/594 85/2000 MedleyA-PT-16-LTLCardinality-02 12601196 m, 85496 m/sec, 84765007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 209 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 180/594 88/2000 MedleyA-PT-16-LTLCardinality-02 12977893 m, 75339 m/sec, 87235841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 185/594 90/2000 MedleyA-PT-16-LTLCardinality-02 13322533 m, 68928 m/sec, 89723139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 219 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 190/594 92/2000 MedleyA-PT-16-LTLCardinality-02 13647134 m, 64920 m/sec, 91951882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 224 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 195/594 94/2000 MedleyA-PT-16-LTLCardinality-02 13966991 m, 63971 m/sec, 94382122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 229 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 200/594 97/2000 MedleyA-PT-16-LTLCardinality-02 14334509 m, 73503 m/sec, 97069000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 234 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 205/594 98/2000 MedleyA-PT-16-LTLCardinality-02 14572216 m, 47541 m/sec, 99346917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 239 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 210/594 100/2000 MedleyA-PT-16-LTLCardinality-02 14752859 m, 36128 m/sec, 101520779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 244 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 215/594 102/2000 MedleyA-PT-16-LTLCardinality-02 15048289 m, 59086 m/sec, 104018725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 249 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 220/594 105/2000 MedleyA-PT-16-LTLCardinality-02 15622368 m, 114815 m/sec, 106554775 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 254 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 225/594 108/2000 MedleyA-PT-16-LTLCardinality-02 16072191 m, 89964 m/sec, 109025973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 259 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 230/594 111/2000 MedleyA-PT-16-LTLCardinality-02 16461570 m, 77875 m/sec, 111513955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 264 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 235/594 113/2000 MedleyA-PT-16-LTLCardinality-02 16819210 m, 71528 m/sec, 114080277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 269 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 240/594 116/2000 MedleyA-PT-16-LTLCardinality-02 17160900 m, 68338 m/sec, 116404051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 274 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 245/594 118/2000 MedleyA-PT-16-LTLCardinality-02 17482039 m, 64227 m/sec, 118816381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 279 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 250/594 120/2000 MedleyA-PT-16-LTLCardinality-02 17859126 m, 75417 m/sec, 121592288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 284 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 255/594 122/2000 MedleyA-PT-16-LTLCardinality-02 18130025 m, 54179 m/sec, 124043509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 289 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 260/594 123/2000 MedleyA-PT-16-LTLCardinality-02 18321897 m, 38374 m/sec, 126291141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 294 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 265/594 125/2000 MedleyA-PT-16-LTLCardinality-02 18577325 m, 51085 m/sec, 128925203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 299 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 270/594 128/2000 MedleyA-PT-16-LTLCardinality-02 19046719 m, 93878 m/sec, 132029972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 304 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 275/594 132/2000 MedleyA-PT-16-LTLCardinality-02 19551817 m, 101019 m/sec, 134475675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 309 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 280/594 135/2000 MedleyA-PT-16-LTLCardinality-02 19996098 m, 88856 m/sec, 136821055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 314 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 285/594 137/2000 MedleyA-PT-16-LTLCardinality-02 20355754 m, 71931 m/sec, 139089279 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 319 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 290/594 139/2000 MedleyA-PT-16-LTLCardinality-02 20673053 m, 63459 m/sec, 141261910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 324 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 295/594 142/2000 MedleyA-PT-16-LTLCardinality-02 20998759 m, 65141 m/sec, 143394923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 329 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 300/594 144/2000 MedleyA-PT-16-LTLCardinality-02 21355282 m, 71304 m/sec, 145629473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 334 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 305/594 146/2000 MedleyA-PT-16-LTLCardinality-02 21654762 m, 59896 m/sec, 147646462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 339 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 310/594 148/2000 MedleyA-PT-16-LTLCardinality-02 21966216 m, 62290 m/sec, 149964770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 344 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 315/594 150/2000 MedleyA-PT-16-LTLCardinality-02 22286768 m, 64110 m/sec, 152374865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 349 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 320/594 151/2000 MedleyA-PT-16-LTLCardinality-02 22418242 m, 26294 m/sec, 154262461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 354 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 325/594 152/2000 MedleyA-PT-16-LTLCardinality-02 22606646 m, 37680 m/sec, 156456901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 359 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 330/594 154/2000 MedleyA-PT-16-LTLCardinality-02 22914228 m, 61516 m/sec, 158824657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 364 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 335/594 157/2000 MedleyA-PT-16-LTLCardinality-02 23287656 m, 74685 m/sec, 161063913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 369 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 340/594 159/2000 MedleyA-PT-16-LTLCardinality-02 23583539 m, 59176 m/sec, 163244172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 374 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 345/594 161/2000 MedleyA-PT-16-LTLCardinality-02 23850977 m, 53487 m/sec, 165492291 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 379 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 350/594 163/2000 MedleyA-PT-16-LTLCardinality-02 24175312 m, 64867 m/sec, 167779741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 384 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 355/594 165/2000 MedleyA-PT-16-LTLCardinality-02 24524876 m, 69912 m/sec, 170065651 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 389 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 360/594 167/2000 MedleyA-PT-16-LTLCardinality-02 24832714 m, 61567 m/sec, 172332548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 394 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 365/594 169/2000 MedleyA-PT-16-LTLCardinality-02 25071969 m, 47851 m/sec, 174564256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 399 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 370/594 172/2000 MedleyA-PT-16-LTLCardinality-02 25489054 m, 83417 m/sec, 177147604 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 404 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 375/594 175/2000 MedleyA-PT-16-LTLCardinality-02 25991536 m, 100496 m/sec, 179514745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 409 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 380/594 178/2000 MedleyA-PT-16-LTLCardinality-02 26384947 m, 78682 m/sec, 181876606 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 414 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 385/594 180/2000 MedleyA-PT-16-LTLCardinality-02 26719943 m, 66999 m/sec, 184180231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 419 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 390/594 182/2000 MedleyA-PT-16-LTLCardinality-02 27051548 m, 66321 m/sec, 186358886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 424 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 395/594 185/2000 MedleyA-PT-16-LTLCardinality-02 27411019 m, 71894 m/sec, 188672067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 429 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 400/594 187/2000 MedleyA-PT-16-LTLCardinality-02 27741941 m, 66184 m/sec, 190761950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 434 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 405/594 189/2000 MedleyA-PT-16-LTLCardinality-02 28056235 m, 62858 m/sec, 193102338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 439 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 410/594 191/2000 MedleyA-PT-16-LTLCardinality-02 28379132 m, 64579 m/sec, 195539339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 444 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 415/594 192/2000 MedleyA-PT-16-LTLCardinality-02 28533380 m, 30849 m/sec, 197547443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 449 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 420/594 193/2000 MedleyA-PT-16-LTLCardinality-02 28738179 m, 40959 m/sec, 199795154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 454 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 425/594 195/2000 MedleyA-PT-16-LTLCardinality-02 29024208 m, 57205 m/sec, 202215709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 459 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 430/594 198/2000 MedleyA-PT-16-LTLCardinality-02 29419245 m, 79007 m/sec, 204526926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 464 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 435/594 200/2000 MedleyA-PT-16-LTLCardinality-02 29714903 m, 59131 m/sec, 206695475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 469 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 440/594 202/2000 MedleyA-PT-16-LTLCardinality-02 29992401 m, 55499 m/sec, 209024816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 474 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 445/594 204/2000 MedleyA-PT-16-LTLCardinality-02 30325328 m, 66585 m/sec, 211359519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 479 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 450/594 206/2000 MedleyA-PT-16-LTLCardinality-02 30680477 m, 71029 m/sec, 213704983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 484 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 455/594 209/2000 MedleyA-PT-16-LTLCardinality-02 30997291 m, 63362 m/sec, 216035813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 489 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 460/594 210/2000 MedleyA-PT-16-LTLCardinality-02 31227725 m, 46086 m/sec, 218300837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 494 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 465/594 212/2000 MedleyA-PT-16-LTLCardinality-02 31575609 m, 69576 m/sec, 221224805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 499 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 470/594 214/2000 MedleyA-PT-16-LTLCardinality-02 31836835 m, 52245 m/sec, 224249525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 504 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 475/594 216/2000 MedleyA-PT-16-LTLCardinality-02 32141907 m, 61014 m/sec, 227192639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 509 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 480/594 218/2000 MedleyA-PT-16-LTLCardinality-02 32528071 m, 77232 m/sec, 229963383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 514 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 485/594 220/2000 MedleyA-PT-16-LTLCardinality-02 32832427 m, 60871 m/sec, 232642133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 519 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 490/594 222/2000 MedleyA-PT-16-LTLCardinality-02 33141892 m, 61893 m/sec, 235434955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 524 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 495/594 224/2000 MedleyA-PT-16-LTLCardinality-02 33442823 m, 60186 m/sec, 238234014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 529 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 500/594 225/2000 MedleyA-PT-16-LTLCardinality-02 33730018 m, 57439 m/sec, 241038244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 534 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 505/594 227/2000 MedleyA-PT-16-LTLCardinality-02 33997446 m, 53485 m/sec, 243823143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 539 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 510/594 229/2000 MedleyA-PT-16-LTLCardinality-02 34270342 m, 54579 m/sec, 246592403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 544 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 515/594 230/2000 MedleyA-PT-16-LTLCardinality-02 34516368 m, 49205 m/sec, 249265355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 549 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 520/594 232/2000 MedleyA-PT-16-LTLCardinality-02 34765724 m, 49871 m/sec, 251956779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 554 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 525/594 233/2000 MedleyA-PT-16-LTLCardinality-02 35009588 m, 48772 m/sec, 254619536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 559 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 530/594 235/2000 MedleyA-PT-16-LTLCardinality-02 35244232 m, 46928 m/sec, 257325430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 564 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 535/594 236/2000 MedleyA-PT-16-LTLCardinality-02 35472579 m, 45669 m/sec, 260071366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 569 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 540/594 237/2000 MedleyA-PT-16-LTLCardinality-02 35692251 m, 43934 m/sec, 262738480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 574 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 545/594 239/2000 MedleyA-PT-16-LTLCardinality-02 35901709 m, 41891 m/sec, 265426993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 579 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 550/594 240/2000 MedleyA-PT-16-LTLCardinality-02 36095422 m, 38742 m/sec, 267998434 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 584 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 555/594 241/2000 MedleyA-PT-16-LTLCardinality-02 36293365 m, 39588 m/sec, 270852343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 589 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 560/594 242/2000 MedleyA-PT-16-LTLCardinality-02 36475371 m, 36401 m/sec, 273350975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 594 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 565/594 243/2000 MedleyA-PT-16-LTLCardinality-02 36642029 m, 33331 m/sec, 275777007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 599 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 570/594 244/2000 MedleyA-PT-16-LTLCardinality-02 36838360 m, 39266 m/sec, 278290253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 604 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 575/594 246/2000 MedleyA-PT-16-LTLCardinality-02 37026047 m, 37537 m/sec, 280712260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 609 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 580/594 247/2000 MedleyA-PT-16-LTLCardinality-02 37231927 m, 41176 m/sec, 283153579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 614 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 585/594 248/2000 MedleyA-PT-16-LTLCardinality-02 37397137 m, 33042 m/sec, 285583962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 619 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 590/594 249/2000 MedleyA-PT-16-LTLCardinality-02 37602163 m, 41005 m/sec, 288411927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 624 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 7 (type EXCL) for MedleyA-PT-16-LTLCardinality-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 629 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 MedleyA-PT-16-LTLCardinality-01
[[35mlola[0m][I] time limit : 594 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 MedleyA-PT-16-LTLCardinality-02
[[35mlola[0m][I] time limit : 2971 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 5/594 4/2000 MedleyA-PT-16-LTLCardinality-01 584273 m, 116854 m/sec, 3185636 t fired, .
[[35mlola[0m][.] 7 LTL EXCL 5/2971 4/5 MedleyA-PT-16-LTLCardinality-02 526991 m, -7415034 m/sec, 2900655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 634 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 7 (type EXCL) for MedleyA-PT-16-LTLCardinality-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 10/594 8/2000 MedleyA-PT-16-LTLCardinality-01 1184476 m, 120040 m/sec, 6500561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 639 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 15/594 12/2000 MedleyA-PT-16-LTLCardinality-01 1779092 m, 118923 m/sec, 9873021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 644 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 20/594 16/2000 MedleyA-PT-16-LTLCardinality-01 2342783 m, 112738 m/sec, 13154946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 649 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 25/594 21/2000 MedleyA-PT-16-LTLCardinality-01 3132674 m, 157978 m/sec, 16332790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 654 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 30/594 26/2000 MedleyA-PT-16-LTLCardinality-01 3993984 m, 172262 m/sec, 19462217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 659 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 35/594 31/2000 MedleyA-PT-16-LTLCardinality-01 4756858 m, 152574 m/sec, 22552105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 664 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 40/594 36/2000 MedleyA-PT-16-LTLCardinality-01 5472619 m, 143152 m/sec, 25630822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 669 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 45/594 40/2000 MedleyA-PT-16-LTLCardinality-01 6137354 m, 132947 m/sec, 28726745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 674 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 50/594 45/2000 MedleyA-PT-16-LTLCardinality-01 6841446 m, 140818 m/sec, 31739313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 679 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 55/594 49/2000 MedleyA-PT-16-LTLCardinality-01 7553666 m, 142444 m/sec, 34756526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 684 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 60/594 54/2000 MedleyA-PT-16-LTLCardinality-01 8244791 m, 138225 m/sec, 37779150 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 689 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 65/594 58/2000 MedleyA-PT-16-LTLCardinality-01 8875523 m, 126146 m/sec, 40877018 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 694 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 70/594 62/2000 MedleyA-PT-16-LTLCardinality-01 9513079 m, 127511 m/sec, 43853714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 699 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 75/594 66/2000 MedleyA-PT-16-LTLCardinality-01 10184202 m, 134224 m/sec, 46848438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 704 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 80/594 70/2000 MedleyA-PT-16-LTLCardinality-01 10800746 m, 123308 m/sec, 49816055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 709 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 85/594 74/2000 MedleyA-PT-16-LTLCardinality-01 11406580 m, 121166 m/sec, 52780542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 714 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 90/594 78/2000 MedleyA-PT-16-LTLCardinality-01 12007401 m, 120164 m/sec, 55741558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 719 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 95/594 82/2000 MedleyA-PT-16-LTLCardinality-01 12596888 m, 117897 m/sec, 58739768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 724 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 100/594 86/2000 MedleyA-PT-16-LTLCardinality-01 13180768 m, 116776 m/sec, 61772361 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 729 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 105/594 89/2000 MedleyA-PT-16-LTLCardinality-01 13729044 m, 109655 m/sec, 64714631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 734 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 110/594 93/2000 MedleyA-PT-16-LTLCardinality-01 14314084 m, 117008 m/sec, 67746495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 739 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 115/594 97/2000 MedleyA-PT-16-LTLCardinality-01 14874102 m, 112003 m/sec, 70711251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 744 secs. Pages in use: 348
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 120/594 100/2000 MedleyA-PT-16-LTLCardinality-01 15392576 m, 103694 m/sec, 73690937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 749 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 125/594 103/2000 MedleyA-PT-16-LTLCardinality-01 15937270 m, 108938 m/sec, 76673364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 754 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 130/594 107/2000 MedleyA-PT-16-LTLCardinality-01 16436242 m, 99794 m/sec, 79723680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 759 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 135/594 110/2000 MedleyA-PT-16-LTLCardinality-01 16893052 m, 91362 m/sec, 82750282 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 764 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 140/594 113/2000 MedleyA-PT-16-LTLCardinality-01 17382611 m, 97911 m/sec, 85653380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 769 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 145/594 116/2000 MedleyA-PT-16-LTLCardinality-01 17890337 m, 101545 m/sec, 88625656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 774 secs. Pages in use: 367
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 150/594 119/2000 MedleyA-PT-16-LTLCardinality-01 18366456 m, 95223 m/sec, 91506172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 779 secs. Pages in use: 370
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 155/594 122/2000 MedleyA-PT-16-LTLCardinality-01 18855646 m, 97838 m/sec, 94421235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 784 secs. Pages in use: 373
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 160/594 125/2000 MedleyA-PT-16-LTLCardinality-01 19319749 m, 92820 m/sec, 97246889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 789 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 165/594 129/2000 MedleyA-PT-16-LTLCardinality-01 19838238 m, 103697 m/sec, 100101655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 794 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 170/594 132/2000 MedleyA-PT-16-LTLCardinality-01 20358318 m, 104016 m/sec, 102921977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 799 secs. Pages in use: 383
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 175/594 135/2000 MedleyA-PT-16-LTLCardinality-01 20833074 m, 94951 m/sec, 105736773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 804 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 180/594 138/2000 MedleyA-PT-16-LTLCardinality-01 21313723 m, 96129 m/sec, 108558262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 809 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 185/594 141/2000 MedleyA-PT-16-LTLCardinality-01 21838968 m, 105049 m/sec, 111420165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 814 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 190/594 145/2000 MedleyA-PT-16-LTLCardinality-01 22324979 m, 97202 m/sec, 114230764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 819 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 195/594 148/2000 MedleyA-PT-16-LTLCardinality-01 22805500 m, 96104 m/sec, 117217092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 824 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 200/594 151/2000 MedleyA-PT-16-LTLCardinality-01 23294536 m, 97807 m/sec, 120203553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 829 secs. Pages in use: 402
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 205/594 154/2000 MedleyA-PT-16-LTLCardinality-01 23767162 m, 94525 m/sec, 123033596 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 834 secs. Pages in use: 405
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 210/594 157/2000 MedleyA-PT-16-LTLCardinality-01 24198501 m, 86267 m/sec, 125730664 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 839 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 215/594 159/2000 MedleyA-PT-16-LTLCardinality-01 24632017 m, 86703 m/sec, 128562258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 844 secs. Pages in use: 410
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 220/594 162/2000 MedleyA-PT-16-LTLCardinality-01 25085197 m, 90636 m/sec, 131546741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 849 secs. Pages in use: 413
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 225/594 165/2000 MedleyA-PT-16-LTLCardinality-01 25465635 m, 76087 m/sec, 134444356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 854 secs. Pages in use: 416
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 230/594 168/2000 MedleyA-PT-16-LTLCardinality-01 25889023 m, 84677 m/sec, 137371792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 859 secs. Pages in use: 419
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 235/594 170/2000 MedleyA-PT-16-LTLCardinality-01 26290636 m, 80322 m/sec, 140376217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 864 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 240/594 173/2000 MedleyA-PT-16-LTLCardinality-01 26708276 m, 83528 m/sec, 143093415 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 869 secs. Pages in use: 424
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 245/594 175/2000 MedleyA-PT-16-LTLCardinality-01 27095259 m, 77396 m/sec, 145711370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 874 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 250/594 178/2000 MedleyA-PT-16-LTLCardinality-01 27527373 m, 86422 m/sec, 148518266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 879 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 255/594 181/2000 MedleyA-PT-16-LTLCardinality-01 27958435 m, 86212 m/sec, 151480185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 884 secs. Pages in use: 432
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 260/594 183/2000 MedleyA-PT-16-LTLCardinality-01 28350366 m, 78386 m/sec, 154127712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 889 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 265/594 186/2000 MedleyA-PT-16-LTLCardinality-01 28783603 m, 86647 m/sec, 156970907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 894 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 270/594 189/2000 MedleyA-PT-16-LTLCardinality-01 29184920 m, 80263 m/sec, 159833301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 899 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 275/594 191/2000 MedleyA-PT-16-LTLCardinality-01 29555094 m, 74034 m/sec, 162458021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 904 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 280/594 194/2000 MedleyA-PT-16-LTLCardinality-01 29972993 m, 83579 m/sec, 165471323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 909 secs. Pages in use: 445
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 285/594 197/2000 MedleyA-PT-16-LTLCardinality-01 30411624 m, 87726 m/sec, 168213377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 914 secs. Pages in use: 448
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 290/594 199/2000 MedleyA-PT-16-LTLCardinality-01 30839346 m, 85544 m/sec, 171162470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 919 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 295/594 203/2000 MedleyA-PT-16-LTLCardinality-01 31342251 m, 100581 m/sec, 174216186 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 924 secs. Pages in use: 454
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 300/594 206/2000 MedleyA-PT-16-LTLCardinality-01 31825359 m, 96621 m/sec, 177081282 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 929 secs. Pages in use: 457
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 305/594 209/2000 MedleyA-PT-16-LTLCardinality-01 32327014 m, 100331 m/sec, 180024481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 934 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 310/594 213/2000 MedleyA-PT-16-LTLCardinality-01 32885908 m, 111778 m/sec, 182715636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 939 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 315/594 216/2000 MedleyA-PT-16-LTLCardinality-01 33417714 m, 106361 m/sec, 185357453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 944 secs. Pages in use: 467
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 320/594 219/2000 MedleyA-PT-16-LTLCardinality-01 33936696 m, 103796 m/sec, 187968221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 949 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 325/594 222/2000 MedleyA-PT-16-LTLCardinality-01 34412409 m, 95142 m/sec, 190520447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 954 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 330/594 225/2000 MedleyA-PT-16-LTLCardinality-01 34847889 m, 87096 m/sec, 193103006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 959 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 335/594 228/2000 MedleyA-PT-16-LTLCardinality-01 35254391 m, 81300 m/sec, 195534639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 964 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 340/594 230/2000 MedleyA-PT-16-LTLCardinality-01 35606375 m, 70396 m/sec, 198151952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 969 secs. Pages in use: 481
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 345/594 232/2000 MedleyA-PT-16-LTLCardinality-01 35958473 m, 70419 m/sec, 200710946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 974 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 350/594 235/2000 MedleyA-PT-16-LTLCardinality-01 36342143 m, 76734 m/sec, 203378092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 979 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 355/594 237/2000 MedleyA-PT-16-LTLCardinality-01 36708621 m, 73295 m/sec, 205835131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 984 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 360/594 240/2000 MedleyA-PT-16-LTLCardinality-01 37077127 m, 73701 m/sec, 208628734 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 989 secs. Pages in use: 491
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 365/594 242/2000 MedleyA-PT-16-LTLCardinality-01 37428732 m, 70321 m/sec, 211342883 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 994 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 370/594 244/2000 MedleyA-PT-16-LTLCardinality-01 37812346 m, 76722 m/sec, 214303922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 999 secs. Pages in use: 495
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 375/594 247/2000 MedleyA-PT-16-LTLCardinality-01 38248287 m, 87188 m/sec, 217360989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1004 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 380/594 250/2000 MedleyA-PT-16-LTLCardinality-01 38700779 m, 90498 m/sec, 220559634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1009 secs. Pages in use: 501
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 385/594 253/2000 MedleyA-PT-16-LTLCardinality-01 39193886 m, 98621 m/sec, 223839020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1014 secs. Pages in use: 504
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 390/594 256/2000 MedleyA-PT-16-LTLCardinality-01 39627824 m, 86787 m/sec, 227095966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1019 secs. Pages in use: 507
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 395/594 259/2000 MedleyA-PT-16-LTLCardinality-01 40031002 m, 80635 m/sec, 230290534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1024 secs. Pages in use: 510
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 400/594 261/2000 MedleyA-PT-16-LTLCardinality-01 40429893 m, 79778 m/sec, 233324250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1029 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 405/594 264/2000 MedleyA-PT-16-LTLCardinality-01 40833652 m, 80751 m/sec, 236295924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1034 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 410/594 266/2000 MedleyA-PT-16-LTLCardinality-01 41221979 m, 77665 m/sec, 239115081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1039 secs. Pages in use: 517
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 415/594 269/2000 MedleyA-PT-16-LTLCardinality-01 41652420 m, 86088 m/sec, 242252411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1044 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 420/594 272/2000 MedleyA-PT-16-LTLCardinality-01 42071639 m, 83843 m/sec, 245210095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1049 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 425/594 274/2000 MedleyA-PT-16-LTLCardinality-01 42465685 m, 78809 m/sec, 248304656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1054 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 430/594 277/2000 MedleyA-PT-16-LTLCardinality-01 42842252 m, 75313 m/sec, 251254371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1059 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 435/594 279/2000 MedleyA-PT-16-LTLCardinality-01 43239497 m, 79449 m/sec, 254397014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1064 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 440/594 282/2000 MedleyA-PT-16-LTLCardinality-01 43644509 m, 81002 m/sec, 257556449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1069 secs. Pages in use: 533
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 445/594 285/2000 MedleyA-PT-16-LTLCardinality-01 44084228 m, 87943 m/sec, 260661062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1074 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 450/594 287/2000 MedleyA-PT-16-LTLCardinality-01 44503367 m, 83827 m/sec, 263723316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1079 secs. Pages in use: 538
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 455/594 290/2000 MedleyA-PT-16-LTLCardinality-01 44955109 m, 90348 m/sec, 267003057 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1084 secs. Pages in use: 541
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 460/594 293/2000 MedleyA-PT-16-LTLCardinality-01 45394925 m, 87963 m/sec, 270101278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1089 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 465/594 296/2000 MedleyA-PT-16-LTLCardinality-01 45770402 m, 75095 m/sec, 273240160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1094 secs. Pages in use: 547
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 470/594 298/2000 MedleyA-PT-16-LTLCardinality-01 46126023 m, 71124 m/sec, 276211555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1099 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 475/594 301/2000 MedleyA-PT-16-LTLCardinality-01 46583997 m, 91594 m/sec, 279405261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1104 secs. Pages in use: 552
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 480/594 303/2000 MedleyA-PT-16-LTLCardinality-01 46972350 m, 77670 m/sec, 282490886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1109 secs. Pages in use: 554
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 485/594 305/2000 MedleyA-PT-16-LTLCardinality-01 47200502 m, 45630 m/sec, 285590865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1114 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 490/594 305/2000 MedleyA-PT-16-LTLCardinality-01 47310269 m, 21953 m/sec, 288060721 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1119 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 495/594 306/2000 MedleyA-PT-16-LTLCardinality-01 47341313 m, 6208 m/sec, 290592746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1124 secs. Pages in use: 557
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 500/594 306/2000 MedleyA-PT-16-LTLCardinality-01 47405425 m, 12822 m/sec, 293253456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1129 secs. Pages in use: 557
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 505/594 307/2000 MedleyA-PT-16-LTLCardinality-01 47555569 m, 30028 m/sec, 296104195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1134 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 510/594 308/2000 MedleyA-PT-16-LTLCardinality-01 47677089 m, 24304 m/sec, 298792560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1139 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 515/594 308/2000 MedleyA-PT-16-LTLCardinality-01 47724316 m, 9445 m/sec, 301445130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1144 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 520/594 308/2000 MedleyA-PT-16-LTLCardinality-01 47786065 m, 12349 m/sec, 304105352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1149 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 525/594 309/2000 MedleyA-PT-16-LTLCardinality-01 47849689 m, 12724 m/sec, 306789443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1154 secs. Pages in use: 560
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 530/594 310/2000 MedleyA-PT-16-LTLCardinality-01 47957416 m, 21545 m/sec, 309511911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1159 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 535/594 311/2000 MedleyA-PT-16-LTLCardinality-01 48149372 m, 38391 m/sec, 312444925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1164 secs. Pages in use: 562
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 540/594 312/2000 MedleyA-PT-16-LTLCardinality-01 48301807 m, 30487 m/sec, 315378816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1169 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 545/594 312/2000 MedleyA-PT-16-LTLCardinality-01 48387842 m, 17207 m/sec, 318266269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1174 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 550/594 313/2000 MedleyA-PT-16-LTLCardinality-01 48521747 m, 26781 m/sec, 321185184 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1179 secs. Pages in use: 564
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 555/594 314/2000 MedleyA-PT-16-LTLCardinality-01 48649962 m, 25643 m/sec, 324145338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1184 secs. Pages in use: 565
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 560/594 315/2000 MedleyA-PT-16-LTLCardinality-01 48727512 m, 15510 m/sec, 327064561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1189 secs. Pages in use: 566
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 565/594 315/2000 MedleyA-PT-16-LTLCardinality-01 48825543 m, 19606 m/sec, 330046616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1194 secs. Pages in use: 566
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 570/594 316/2000 MedleyA-PT-16-LTLCardinality-01 48880810 m, 11053 m/sec, 333029828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1199 secs. Pages in use: 567
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 575/594 316/2000 MedleyA-PT-16-LTLCardinality-01 48914552 m, 6748 m/sec, 336080773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1204 secs. Pages in use: 567
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 580/594 317/2000 MedleyA-PT-16-LTLCardinality-01 49120755 m, 41240 m/sec, 338707071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1209 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 585/594 320/2000 MedleyA-PT-16-LTLCardinality-01 49527213 m, 81291 m/sec, 341576081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1214 secs. Pages in use: 571
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 590/594 323/2000 MedleyA-PT-16-LTLCardinality-01 50007699 m, 96097 m/sec, 344506889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1219 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 4 (type EXCL) for MedleyA-PT-16-LTLCardinality-01 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1224 secs. Pages in use: 577
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 9 MedleyA-PT-16-LTLCardinality-03
[[35mlola[0m][I] time limit : 594 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 MedleyA-PT-16-LTLCardinality-01
[[35mlola[0m][I] time limit : 2376 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for MedleyA-PT-16-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 5/594 4/5 MedleyA-PT-16-LTLCardinality-01 620401 m, -9877459 m/sec, 3386518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1229 secs. Pages in use: 581
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 4 (type EXCL) for MedleyA-PT-16-LTLCardinality-01 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1234 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 25 MedleyA-PT-16-LTLCardinality-07
[[35mlola[0m][I] time limit : 788 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for MedleyA-PT-16-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 MedleyA-PT-16-LTLCardinality-14
[[35mlola[0m][I] time limit : 2366 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for MedleyA-PT-16-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1239 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1244 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1249 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1254 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1259 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1264 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1269 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1274 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1279 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1284 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1289 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1294 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1299 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1304 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1309 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1314 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1319 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1324 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1329 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1334 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1339 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1344 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1349 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1354 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1359 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1364 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1369 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1374 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1379 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1384 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1389 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1394 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1399 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1404 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1409 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1414 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1419 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1424 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1429 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1434 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1439 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1444 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1449 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1454 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1459 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1464 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1469 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1474 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1479 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1484 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1489 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1494 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1499 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1504 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1509 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1514 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1519 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1524 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1529 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1534 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1539 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1544 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1549 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1554 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1559 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1564 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1569 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1574 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1579 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1584 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1589 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1594 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1599 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1604 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1609 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1614 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1619 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1624 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1629 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1634 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1639 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1644 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1649 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1654 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1659 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1664 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1669 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1674 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1679 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1684 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1689 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1694 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1699 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1704 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1709 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1714 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1719 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1724 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1729 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1734 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1739 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1744 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1749 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1754 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1759 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1764 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1769 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1774 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1779 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1784 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1789 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1794 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1799 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1804 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1809 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1814 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1819 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1824 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1829 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1834 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1839 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1844 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1849 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1854 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1859 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1864 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1869 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1874 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1879 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1884 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1889 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1894 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1899 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1904 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1909 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1914 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1919 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1924 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1929 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1934 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1939 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1944 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1949 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1954 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1959 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1964 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1969 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1974 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1979 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1984 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1989 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1994 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1999 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2004 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2009 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2014 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2019 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2024 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2029 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2034 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2039 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2044 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2049 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2054 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2059 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2064 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2069 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2074 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2079 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2084 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2089 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2094 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2099 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2104 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2109 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2114 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2119 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2124 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2129 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2134 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2139 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2144 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2149 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2154 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2159 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2164 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2169 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2174 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2179 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2184 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2189 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2194 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2199 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2204 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2209 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2214 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2219 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2224 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2229 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2234 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2239 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2244 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2249 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2254 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2259 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2264 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] MedleyA-PT-16-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2269 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-03: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-07: CONJ false state space /ER[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedleyA-PT-16-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedleyA-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MedleyA-PT-16"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is MedleyA-PT-16, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r577-smll-171734920500123"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/MedleyA-PT-16.tgz
mv MedleyA-PT-16 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;