Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910400185.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FireWire-PT-16, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910400185
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 8.1K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.3K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 113K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 84K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-00
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-01
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-02
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-03
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-04
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-05
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-06
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-07
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-08
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-09
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-10
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-11
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-12
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-13
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-14
FORMULA_NAME FireWire-PT-16-ReachabilityFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717370561907

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-16
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 23:22:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2024-06-02 23:22:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 23:22:43] [INFO ] Load time of PNML (sax parser for PT used): 56 ms
[2024-06-02 23:22:43] [INFO ] Transformed 254 places.
[2024-06-02 23:22:43] [INFO ] Transformed 368 transitions.
[2024-06-02 23:22:43] [INFO ] Found NUPN structural information;
[2024-06-02 23:22:43] [INFO ] Parsed PT model containing 254 places and 368 transitions and 1032 arcs in 118 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 13 ms.
Working with output stream class java.io.PrintStream
FORMULA FireWire-PT-16-ReachabilityFireability-2024-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 4 resets, run finished after 375 ms. (steps per millisecond=26 ) properties (out of 15) seen :2
FORMULA FireWire-PT-16-ReachabilityFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 219 ms. (steps per millisecond=45 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 182 ms. (steps per millisecond=54 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 137 ms. (steps per millisecond=72 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 113 ms. (steps per millisecond=88 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 13) seen :1
FORMULA FireWire-PT-16-ReachabilityFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 135 ms. (steps per millisecond=74 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 176 ms. (steps per millisecond=56 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 202 ms. (steps per millisecond=49 ) properties (out of 12) seen :1
FORMULA FireWire-PT-16-ReachabilityFireability-2024-05 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 130 ms. (steps per millisecond=76 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 368 rows 254 cols
[2024-06-02 23:22:45] [INFO ] Computed 5 invariants in 20 ms
[2024-06-02 23:22:46] [INFO ] [Real]Absence check using 5 positive place invariants in 5 ms returned sat
[2024-06-02 23:22:46] [INFO ] After 270ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2024-06-02 23:22:46] [INFO ] [Nat]Absence check using 5 positive place invariants in 3 ms returned sat
[2024-06-02 23:22:46] [INFO ] After 450ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :7
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 102 places in 89 ms of which 4 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 88 places in 84 ms of which 1 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 233 ms
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 107 places in 88 ms of which 1 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 119 places in 77 ms of which 1 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 82 places in 93 ms of which 1 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 76 places in 89 ms of which 1 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 430 ms
[2024-06-02 23:22:47] [INFO ] Deduced a trap composed of 102 places in 68 ms of which 0 ms to minimize.
[2024-06-02 23:22:47] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 104 ms
[2024-06-02 23:22:47] [INFO ] After 1716ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :7
Attempting to minimize the solution found.
Minimization took 441 ms.
[2024-06-02 23:22:48] [INFO ] After 2340ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :7
FORMULA FireWire-PT-16-ReachabilityFireability-2024-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-16-ReachabilityFireability-2024-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-16-ReachabilityFireability-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-16-ReachabilityFireability-2024-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 111 ms.
Support contains 106 out of 254 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 254/254 places, 368/368 transitions.
Graph (complete) has 601 edges and 254 vertex of which 251 are kept as prefixes of interest. Removing 3 places using SCC suffix rule.1 ms
Discarding 3 places :
Also discarding 0 output transitions
Drop transitions removed 15 transitions
Trivial Post-agglo rules discarded 15 transitions
Performed 15 trivial Post agglomeration. Transition count delta: 15
Iterating post reduction 0 with 15 rules applied. Total rules applied 16 place count 251 transition count 353
Reduce places removed 15 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 18 rules applied. Total rules applied 34 place count 236 transition count 350
Reduce places removed 2 places and 0 transitions.
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Iterating post reduction 2 with 17 rules applied. Total rules applied 51 place count 234 transition count 335
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 3 with 15 rules applied. Total rules applied 66 place count 219 transition count 335
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 7 Pre rules applied. Total rules applied 66 place count 219 transition count 328
Deduced a syphon composed of 7 places in 3 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 4 with 14 rules applied. Total rules applied 80 place count 212 transition count 328
Discarding 26 places :
Symmetric choice reduction at 4 with 26 rule applications. Total rules 106 place count 186 transition count 302
Iterating global reduction 4 with 26 rules applied. Total rules applied 132 place count 186 transition count 302
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 1 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 4 with 22 rules applied. Total rules applied 154 place count 175 transition count 291
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -15
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 158 place count 173 transition count 306
Free-agglomeration rule applied 4 times.
Iterating global reduction 4 with 4 rules applied. Total rules applied 162 place count 173 transition count 302
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 166 place count 169 transition count 302
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 5 with 3 rules applied. Total rules applied 169 place count 169 transition count 302
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 170 place count 168 transition count 301
Applied a total of 170 rules in 78 ms. Remains 168 /254 variables (removed 86) and now considering 301/368 (removed 67) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 79 ms. Remains : 168/254 places, 301/368 transitions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 163 ms. (steps per millisecond=61 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 166 ms. (steps per millisecond=60 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 156 ms. (steps per millisecond=64 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 158 ms. (steps per millisecond=63 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 159 ms. (steps per millisecond=62 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 157 ms. (steps per millisecond=63 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 156 ms. (steps per millisecond=64 ) properties (out of 7) seen :0
Finished probabilistic random walk after 810217 steps, run visited all 7 properties in 1806 ms. (steps per millisecond=448 )
Probabilistic random walk after 810217 steps, saw 185039 distinct states, run finished after 1806 ms. (steps per millisecond=448 ) properties seen :7
FORMULA FireWire-PT-16-ReachabilityFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-12 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-10 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-03 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-02 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityFireability-2024-00 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 8268 ms.
starting LoLA
BK_INPUT FireWire-PT-16
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability

FORMULA FireWire-PT-16-ReachabilityFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717370574933

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 55 (type EXCL) for 0 FireWire-PT-16-ReachabilityFireability-2024-00
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type FNDP) for 12 FireWire-PT-16-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 12 FireWire-PT-16-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SRCH) for 12 FireWire-PT-16-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-00
lola: result : true
lola: markings : 1180
lola: fired transitions : 1306
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type EXCL) for 12 FireWire-PT-16-ReachabilityFireability-2024-04
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type SRCH) for FireWire-PT-16-ReachabilityFireability-2024-04
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 57 (type FNDP) for FireWire-PT-16-ReachabilityFireability-2024-04 (obsolete)
lola: CANCELED task # 58 (type EQUN) for FireWire-PT-16-ReachabilityFireability-2024-04 (obsolete)
lola: CANCELED task # 61 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-04 (obsolete)
lola: LAUNCH task # 99 (type EXCL) for 39 FireWire-PT-16-ReachabilityFireability-2024-13
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 50 (type FNDP) for 3 FireWire-PT-16-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 3 FireWire-PT-16-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SRCH) for 3 FireWire-PT-16-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type FNDP) for FireWire-PT-16-ReachabilityFireability-2024-04
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 FireWire-PT-16-ReachabilityFireability-2024-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 99 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-13
lola: result : true
lola: markings : 1021
lola: fired transitions : 1161
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 25 (type CNST) for FireWire-PT-16-ReachabilityFireability-2024-08
lola: Created skeleton in 0.000000 secs.
lola: result : false
lola: LAUNCH task # 91 (type EXCL) for 30 FireWire-PT-16-ReachabilityFireability-2024-10
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-58.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 91 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-10
lola: result : true
lola: markings : 1871
lola: fired transitions : 2077
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 15 FireWire-PT-16-ReachabilityFireability-2024-05
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 131 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-05
lola: result : true
lola: markings : 54
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 145 (type EXCL) for 42 FireWire-PT-16-ReachabilityFireability-2024-14
lola: time limit : 359 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-63.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 145 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-14
lola: result : false
lola: markings : 16246
lola: fired transitions : 20652
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 119 (type EXCL) for 33 FireWire-PT-16-ReachabilityFireability-2024-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 119 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-11
lola: result : true
lola: markings : 90
lola: fired transitions : 95
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 83 (type EXCL) for 6 FireWire-PT-16-ReachabilityFireability-2024-02
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 83 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-02
lola: result : true
lola: markings : 11937
lola: fired transitions : 13899
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 140 (type EXCL) for 45 FireWire-PT-16-ReachabilityFireability-2024-15
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 140 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-15
lola: result : false
lola: markings : 21901
lola: fired transitions : 28315
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 73 (type EXCL) for 36 FireWire-PT-16-ReachabilityFireability-2024-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 73 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-12
lola: result : true
lola: markings : 2194
lola: fired transitions : 2669
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 94 (type EXCL) for 18 FireWire-PT-16-ReachabilityFireability-2024-06
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 94 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-06
lola: result : false
lola: markings : 18976
lola: fired transitions : 24215
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 105 (type EXCL) for 21 FireWire-PT-16-ReachabilityFireability-2024-07
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 105 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-07
lola: result : true
lola: markings : 8
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 111 (type EXCL) for 27 FireWire-PT-16-ReachabilityFireability-2024-09
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 111 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-09
lola: result : true
lola: markings : 1424
lola: fired transitions : 1759
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 126 (type EXCL) for 9 FireWire-PT-16-ReachabilityFireability-2024-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 126 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-03
lola: result : true
lola: markings : 3069
lola: fired transitions : 3564
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 3 FireWire-PT-16-ReachabilityFireability-2024-01
lola: time limit : 3598 sec
lola: memory limit: 32 pages
sara: warning, failure of lp_solve (at job 534)
lola: FINISHED task # 66 (type EXCL) for FireWire-PT-16-ReachabilityFireability-2024-01
lola: result : false
lola: markings : 46496
lola: fired transitions : 63594
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for FireWire-PT-16-ReachabilityFireability-2024-01 (obsolete)
lola: CANCELED task # 63 (type EQUN) for FireWire-PT-16-ReachabilityFireability-2024-01 (obsolete)
lola: CANCELED task # 65 (type SRCH) for FireWire-PT-16-ReachabilityFireability-2024-01 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-16-ReachabilityFireability-2024-00: EF true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-01: AG true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-02: AG false tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-03: AG false tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-04: EF true tandem / insertion
FireWire-PT-16-ReachabilityFireability-2024-05: EF true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-06: AG true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-07: EF true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-08: INITIAL false preprocessing
FireWire-PT-16-ReachabilityFireability-2024-09: EF true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-10: EF true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-11: AG false tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-12: AG false tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-13: AG false tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-14: AG true tandem / relaxed
FireWire-PT-16-ReachabilityFireability-2024-15: AG true tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-16"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FireWire-PT-16, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910400185"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-16.tgz
mv FireWire-PT-16 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;