fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r571-tall-171734910400184
Last Updated
July 7, 2024

About the Execution of 2023-gold for FireWire-PT-16

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
326.535 11085.00 24774.00 259.20 FFFFFTFTTTFTFTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910400184.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FireWire-PT-16, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910400184
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 8.1K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.3K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 113K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 84K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-00
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-01
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-02
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-03
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-04
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-05
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-06
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-07
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-08
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-09
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-10
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-11
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-12
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-13
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-14
FORMULA_NAME FireWire-PT-16-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717370542864

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-16
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 23:22:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 23:22:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 23:22:24] [INFO ] Load time of PNML (sax parser for PT used): 59 ms
[2024-06-02 23:22:24] [INFO ] Transformed 254 places.
[2024-06-02 23:22:24] [INFO ] Transformed 368 transitions.
[2024-06-02 23:22:24] [INFO ] Found NUPN structural information;
[2024-06-02 23:22:24] [INFO ] Parsed PT model containing 254 places and 368 transitions and 1032 arcs in 127 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 12 ms.
Working with output stream class java.io.PrintStream
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 3 resets, run finished after 574 ms. (steps per millisecond=17 ) properties (out of 14) seen :3
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 271 ms. (steps per millisecond=36 ) properties (out of 11) seen :1
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 262 ms. (steps per millisecond=38 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 217 ms. (steps per millisecond=46 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 215 ms. (steps per millisecond=46 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 176 ms. (steps per millisecond=56 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 169 ms. (steps per millisecond=59 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 368 rows 254 cols
[2024-06-02 23:22:27] [INFO ] Computed 5 invariants in 15 ms
[2024-06-02 23:22:27] [INFO ] After 274ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:10
[2024-06-02 23:22:27] [INFO ] [Nat]Absence check using 5 positive place invariants in 4 ms returned sat
[2024-06-02 23:22:27] [INFO ] After 442ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2024-06-02 23:22:28] [INFO ] Deduced a trap composed of 16 places in 68 ms of which 6 ms to minimize.
[2024-06-02 23:22:28] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 112 ms
[2024-06-02 23:22:28] [INFO ] Deduced a trap composed of 105 places in 74 ms of which 1 ms to minimize.
[2024-06-02 23:22:28] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 102 ms
[2024-06-02 23:22:28] [INFO ] Deduced a trap composed of 90 places in 78 ms of which 0 ms to minimize.
[2024-06-02 23:22:28] [INFO ] Deduced a trap composed of 119 places in 87 ms of which 1 ms to minimize.
[2024-06-02 23:22:28] [INFO ] Deduced a trap composed of 115 places in 72 ms of which 0 ms to minimize.
[2024-06-02 23:22:28] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 297 ms
[2024-06-02 23:22:28] [INFO ] After 1343ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :10
Attempting to minimize the solution found.
Minimization took 313 ms.
[2024-06-02 23:22:29] [INFO ] After 1844ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :10
Parikh walk visited 0 properties in 116 ms.
Support contains 94 out of 254 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 254/254 places, 368/368 transitions.
Drop transitions removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 254 transition count 352
Reduce places removed 16 places and 0 transitions.
Performed 13 Post agglomeration using F-continuation condition.Transition count delta: 13
Iterating post reduction 1 with 29 rules applied. Total rules applied 45 place count 238 transition count 339
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 2 with 13 rules applied. Total rules applied 58 place count 225 transition count 339
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 58 place count 225 transition count 334
Deduced a syphon composed of 5 places in 2 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 68 place count 220 transition count 334
Discarding 20 places :
Symmetric choice reduction at 3 with 20 rule applications. Total rules 88 place count 200 transition count 314
Iterating global reduction 3 with 20 rules applied. Total rules applied 108 place count 200 transition count 314
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 108 place count 200 transition count 313
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 110 place count 199 transition count 313
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 14 rules applied. Total rules applied 124 place count 192 transition count 306
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: -23
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 134 place count 187 transition count 329
Free-agglomeration rule applied 12 times.
Iterating global reduction 3 with 12 rules applied. Total rules applied 146 place count 187 transition count 317
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 3 with 12 rules applied. Total rules applied 158 place count 175 transition count 317
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 159 place count 175 transition count 317
Applied a total of 159 rules in 77 ms. Remains 175 /254 variables (removed 79) and now considering 317/368 (removed 51) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 77 ms. Remains : 175/254 places, 317/368 transitions.
Incomplete random walk after 10000 steps, including 4 resets, run finished after 153 ms. (steps per millisecond=65 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 145 ms. (steps per millisecond=68 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 141 ms. (steps per millisecond=70 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 11 resets, run finished after 145 ms. (steps per millisecond=68 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 147 ms. (steps per millisecond=68 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 7 resets, run finished after 145 ms. (steps per millisecond=68 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 159 ms. (steps per millisecond=62 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 171 ms. (steps per millisecond=58 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 106 ms. (steps per millisecond=94 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 7 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 10) seen :0
Finished probabilistic random walk after 234305 steps, run visited all 10 properties in 1215 ms. (steps per millisecond=192 )
Probabilistic random walk after 234305 steps, saw 58050 distinct states, run finished after 1216 ms. (steps per millisecond=192 ) properties seen :10
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-14 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-16-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 7794 ms.
starting LoLA
BK_INPUT FireWire-PT-16
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-16-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717370553949

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type EXCL) for 6 FireWire-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 6 FireWire-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 6 FireWire-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 6 FireWire-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 58 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 359
lola: fired transitions : 391
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 49 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 50 (type EQUN) for FireWire-PT-16-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 57 (type SRCH) for FireWire-PT-16-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 68 (type EXCL) for 9 FireWire-PT-16-ReachabilityCardinality-2024-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 0 FireWire-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 0 FireWire-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SRCH) for 0 FireWire-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-02
lola: result : unknown
lola: fired transitions : 639
lola: tried executions : 62
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-03
lola: result : true
lola: markings : 679
lola: fired transitions : 776
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 90 (type EXCL) for 18 FireWire-PT-16-ReachabilityCardinality-2024-06
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 90 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 13727
lola: fired transitions : 19574
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 151 (type EXCL) for 24 FireWire-PT-16-ReachabilityCardinality-2024-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 151 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-08
lola: result : false
lola: markings : 10094
lola: fired transitions : 12459
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 106 (type EXCL) for 27 FireWire-PT-16-ReachabilityCardinality-2024-09
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 106 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 1464
lola: fired transitions : 1637
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 139 (type EXCL) for 42 FireWire-PT-16-ReachabilityCardinality-2024-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 139 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 669
lola: fired transitions : 737
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 84 (type EXCL) for 3 FireWire-PT-16-ReachabilityCardinality-2024-01
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 84 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 961
lola: fired transitions : 1078
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 133 (type EXCL) for 36 FireWire-PT-16-ReachabilityCardinality-2024-12
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 75 (type SRCH) for FireWire-PT-16-ReachabilityCardinality-2024-00
lola: result : true
lola: markings : 47655
lola: fired transitions : 106253
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 70 (type EQUN) for FireWire-PT-16-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 95 (type FNDP) for 15 FireWire-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 15 FireWire-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SRCH) for 15 FireWire-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 70493
lola: tried executions : 2502
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 70 (type EQUN) for FireWire-PT-16-ReachabilityCardinality-2024-00
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 98 (type SRCH) for FireWire-PT-16-ReachabilityCardinality-2024-05
lola: result : true
lola: markings : 55
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 96 (type EQUN) for FireWire-PT-16-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 130 (type FNDP) for 45 FireWire-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type EQUN) for 45 FireWire-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SRCH) for 45 FireWire-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 133 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-12
lola: result : true
lola: markings : 437
lola: fired transitions : 470
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 112 (type EXCL) for 30 FireWire-PT-16-ReachabilityCardinality-2024-10
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 112 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-10
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 93 (type EXCL) for 21 FireWire-PT-16-ReachabilityCardinality-2024-07
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 93 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-07
lola: result : true
lola: markings : 18
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 129 (type EXCL) for 39 FireWire-PT-16-ReachabilityCardinality-2024-13
lola: time limit : 900 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: warning, failure of lp_solve (at job 324)
lola: FINISHED task # 95 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-05
lola: result : true
lola: fired transitions : 53
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 129 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-13
lola: result : true
lola: markings : 57
lola: fired transitions : 65
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 33 FireWire-PT-16-ReachabilityCardinality-2024-11
lola: time limit : 1200 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 124 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-11
lola: result : true
lola: markings : 1426
lola: fired transitions : 1629
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 12 FireWire-PT-16-ReachabilityCardinality-2024-04
lola: time limit : 1800 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 61 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-04
lola: result : true
lola: markings : 4556
lola: fired transitions : 5818
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 144 (type EXCL) for 45 FireWire-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 144 (type EXCL) for FireWire-PT-16-ReachabilityCardinality-2024-15
lola: result : true
lola: markings : 4490
lola: fired transitions : 4716
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 130 (type FNDP) for FireWire-PT-16-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 141 (type EQUN) for FireWire-PT-16-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 143 (type SRCH) for FireWire-PT-16-ReachabilityCardinality-2024-15 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-16-ReachabilityCardinality-2024-00: AG false tandem / insertion
FireWire-PT-16-ReachabilityCardinality-2024-01: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-02: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-03: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-04: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-05: EF true tandem / insertion
FireWire-PT-16-ReachabilityCardinality-2024-06: EF false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-07: EF true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-08: AG true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-09: EF true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-10: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-11: EF true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-12: AG false tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-13: EF true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-14: EF true tandem / relaxed
FireWire-PT-16-ReachabilityCardinality-2024-15: AG false tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-16"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FireWire-PT-16, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910400184"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-16.tgz
mv FireWire-PT-16 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;