Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910400179.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FireWire-PT-15, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910400179
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 7.6K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.1K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 90K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-00
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-01
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-02
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-03
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-04
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-05
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-06
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-07
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-08
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-09
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-10
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-11
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-12
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-13
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-14
FORMULA_NAME FireWire-PT-15-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717370386965

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-15
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 23:19:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 23:19:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 23:19:48] [INFO ] Load time of PNML (sax parser for PT used): 60 ms
[2024-06-02 23:19:48] [INFO ] Transformed 248 places.
[2024-06-02 23:19:48] [INFO ] Transformed 383 transitions.
[2024-06-02 23:19:48] [INFO ] Found NUPN structural information;
[2024-06-02 23:19:48] [INFO ] Parsed PT model containing 248 places and 383 transitions and 1144 arcs in 125 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 14 ms.
Working with output stream class java.io.PrintStream
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 3 resets, run finished after 500 ms. (steps per millisecond=20 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 214 ms. (steps per millisecond=46 ) properties (out of 13) seen :1
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-08 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 276 ms. (steps per millisecond=36 ) properties (out of 12) seen :1
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-06 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 202 ms. (steps per millisecond=49 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 186 ms. (steps per millisecond=53 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 193 ms. (steps per millisecond=51 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 188 ms. (steps per millisecond=53 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 184 ms. (steps per millisecond=54 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 216 ms. (steps per millisecond=46 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 174 ms. (steps per millisecond=57 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 183 ms. (steps per millisecond=54 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 383 rows 248 cols
[2024-06-02 23:19:51] [INFO ] Computed 5 invariants in 13 ms
[2024-06-02 23:19:51] [INFO ] After 275ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2024-06-02 23:19:51] [INFO ] [Nat]Absence check using 5 positive place invariants in 6 ms returned sat
[2024-06-02 23:19:52] [INFO ] After 320ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :9
[2024-06-02 23:19:52] [INFO ] Deduced a trap composed of 114 places in 103 ms of which 5 ms to minimize.
[2024-06-02 23:19:52] [INFO ] Deduced a trap composed of 132 places in 120 ms of which 0 ms to minimize.
[2024-06-02 23:19:52] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 290 ms
[2024-06-02 23:19:52] [INFO ] Deduced a trap composed of 63 places in 96 ms of which 1 ms to minimize.
[2024-06-02 23:19:52] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 117 ms
[2024-06-02 23:19:52] [INFO ] Deduced a trap composed of 27 places in 40 ms of which 1 ms to minimize.
[2024-06-02 23:19:52] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 67 ms
[2024-06-02 23:19:52] [INFO ] After 1051ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :8
Attempting to minimize the solution found.
Minimization took 194 ms.
[2024-06-02 23:19:53] [INFO ] After 1411ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :8
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 8 different solutions.
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 156 ms.
Support contains 29 out of 248 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 248/248 places, 383/383 transitions.
Graph (trivial) has 153 edges and 248 vertex of which 9 / 248 are part of one of the 2 SCC in 6 ms
Free SCC test removed 7 places
Drop transitions removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Graph (complete) has 670 edges and 241 vertex of which 236 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.2 ms
Discarding 5 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 0 with 32 rules applied. Total rules applied 34 place count 236 transition count 341
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 33 rules applied. Total rules applied 67 place count 205 transition count 339
Reduce places removed 1 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 2 with 4 rules applied. Total rules applied 71 place count 204 transition count 336
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 74 place count 201 transition count 336
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 7 Pre rules applied. Total rules applied 74 place count 201 transition count 329
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 4 with 14 rules applied. Total rules applied 88 place count 194 transition count 329
Discarding 34 places :
Symmetric choice reduction at 4 with 34 rule applications. Total rules 122 place count 160 transition count 294
Iterating global reduction 4 with 34 rules applied. Total rules applied 156 place count 160 transition count 294
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 157 place count 160 transition count 293
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 2 Pre rules applied. Total rules applied 157 place count 160 transition count 291
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 161 place count 158 transition count 291
Discarding 8 places :
Symmetric choice reduction at 5 with 8 rule applications. Total rules 169 place count 150 transition count 255
Iterating global reduction 5 with 8 rules applied. Total rules applied 177 place count 150 transition count 255
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 179 place count 150 transition count 253
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 6 with 38 rules applied. Total rules applied 217 place count 131 transition count 234
Performed 11 Post agglomeration using F-continuation condition with reduction of 3 identical transitions.
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 6 with 22 rules applied. Total rules applied 239 place count 120 transition count 251
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 240 place count 120 transition count 250
Free-agglomeration rule applied 9 times.
Iterating global reduction 6 with 9 rules applied. Total rules applied 249 place count 120 transition count 241
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 6 with 9 rules applied. Total rules applied 258 place count 111 transition count 241
Discarding 2 places :
Symmetric choice reduction at 7 with 2 rule applications. Total rules 260 place count 109 transition count 239
Iterating global reduction 7 with 2 rules applied. Total rules applied 262 place count 109 transition count 239
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 7 with 5 rules applied. Total rules applied 267 place count 109 transition count 234
Partial Free-agglomeration rule applied 5 times.
Drop transitions removed 5 transitions
Iterating global reduction 7 with 5 rules applied. Total rules applied 272 place count 109 transition count 234
Applied a total of 272 rules in 111 ms. Remains 109 /248 variables (removed 139) and now considering 234/383 (removed 149) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 112 ms. Remains : 109/248 places, 234/383 transitions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 223 ms. (steps per millisecond=44 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 170 ms. (steps per millisecond=58 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 186 ms. (steps per millisecond=53 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 177 ms. (steps per millisecond=56 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 180 ms. (steps per millisecond=55 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 181 ms. (steps per millisecond=55 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 177 ms. (steps per millisecond=56 ) properties (out of 7) seen :0
Finished probabilistic random walk after 17262 steps, run visited all 7 properties in 107 ms. (steps per millisecond=161 )
Probabilistic random walk after 17262 steps, saw 5775 distinct states, run finished after 108 ms. (steps per millisecond=159 ) properties seen :7
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-15-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 6533 ms.
starting LoLA
BK_INPUT FireWire-PT-15
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-15-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717370401860

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 6 FireWire-PT-15-ReachabilityCardinality-2024-02
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 6 FireWire-PT-15-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 6 FireWire-PT-15-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 6 FireWire-PT-15-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 52 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 105
lola: fired transitions : 104
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 50 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 53 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 67 (type EXCL) for 9 FireWire-PT-15-ReachabilityCardinality-2024-03
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 70 (type FNDP) for 24 FireWire-PT-15-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 24 FireWire-PT-15-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH) for 24 FireWire-PT-15-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-02
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-08
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 71 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-08 (obsolete)
lola: LAUNCH task # 56 (type FNDP) for 3 FireWire-PT-15-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 3 FireWire-PT-15-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 3 FireWire-PT-15-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 56 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-01
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 57 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 59 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-01 (obsolete)

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type FNDP) for 0 FireWire-PT-15-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 0 FireWire-PT-15-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SRCH) for 0 FireWire-PT-15-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 70 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-08
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 67 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-03
lola: result : true
lola: markings : 607
lola: fired transitions : 650
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 83 (type EXCL) for 27 FireWire-PT-15-ReachabilityCardinality-2024-09
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 84 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-00
lola: result : true
lola: markings : 599
lola: fired transitions : 661
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 76 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 78 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 98 (type FNDP) for 39 FireWire-PT-15-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
lola: LAUNCH task # 99 (type EQUN) for 39 FireWire-PT-15-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 101 (type SRCH) for 39 FireWire-PT-15-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 76 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 1165
lola: tried executions : 65
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 57 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-01
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-99.sara.
sara: warning, failure of lp_solve (at job 2)
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 83 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 16172
lola: fired transitions : 19333
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 150 (type EXCL) for 33 FireWire-PT-15-ReachabilityCardinality-2024-11
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 101 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-13
lola: result : false
lola: markings : 112881
lola: fired transitions : 205673
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 98 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 99 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 95 (type FNDP) for 12 FireWire-PT-15-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 12 FireWire-PT-15-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SRCH) for 12 FireWire-PT-15-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-13
lola: result : unknown
lola: FINISHED task # 98 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 109541
lola: tried executions : 6342
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 150 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-11
lola: result : false
lola: markings : 42362
lola: fired transitions : 54773
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 122 (type EXCL) for 36 FireWire-PT-15-ReachabilityCardinality-2024-12
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 122 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-12
lola: result : true
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 143 (type EXCL) for 45 FireWire-PT-15-ReachabilityCardinality-2024-15
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 143 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-15
lola: result : true
lola: markings : 594
lola: fired transitions : 625
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 21 FireWire-PT-15-ReachabilityCardinality-2024-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 124 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-07
lola: result : true
lola: markings : 146
lola: fired transitions : 146
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 107 (type EXCL) for 18 FireWire-PT-15-ReachabilityCardinality-2024-06
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 107 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-06
lola: result : true
lola: markings : 199
lola: fired transitions : 201
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 146 (type EXCL) for 42 FireWire-PT-15-ReachabilityCardinality-2024-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-114.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 116 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 181622
lola: fired transitions : 318758
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 114 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 109 (type FNDP) for 30 FireWire-PT-15-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type EQUN) for 30 FireWire-PT-15-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SRCH) for 30 FireWire-PT-15-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 114 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-04
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 95 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 124699
lola: tried executions : 9620
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 932)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-15-ReachabilityCardinality-2024-00: EF true tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-01: AG false findpath
FireWire-PT-15-ReachabilityCardinality-2024-02: AG false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-03: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-04: EF false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-06: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-07: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-08: AG false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-09: EF true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-11: AG true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-12: EF true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-13: EF false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-15: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-15-ReachabilityCardinality-2024-05: EF 0 5 0 0 1 0 0 0
FireWire-PT-15-ReachabilityCardinality-2024-10: AG 0 2 3 0 1 0 0 0
FireWire-PT-15-ReachabilityCardinality-2024-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
109 EF FNDP 3/899 0/5 FireWire-PT-15-ReachabilityCardinality-2024-10 316268 t fired, 18064 attempts, .
119 EF STEQ 3/899 0/5 FireWire-PT-15-ReachabilityCardinality-2024-10 sara is running.
129 EF SRCH 3/899 1/5 FireWire-PT-15-ReachabilityCardinality-2024-10 234930 m, 46986 m/sec, 608162 t fired, .
146 EF EXCL 4/1199 1/32 FireWire-PT-15-ReachabilityCardinality-2024-14 107333 m, 21466 m/sec, 152056 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 129 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 237936
lola: fired transitions : 613501
lola: time used : 3.000000
lola: memory pages used : 1
lola: CANCELED task # 109 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 119 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 93 (type FNDP) for 15 FireWire-PT-15-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type EQUN) for 15 FireWire-PT-15-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SRCH) for 15 FireWire-PT-15-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-10
lola: result : unknown
lola: FINISHED task # 109 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 322045
lola: tried executions : 18393
lola: time used : 3.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 146 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-14
lola: result : false
lola: markings : 123362
lola: fired transitions : 176592
lola: time used : 4.000000
lola: memory pages used : 1
lola: LAUNCH task # 133 (type EXCL) for 15 FireWire-PT-15-ReachabilityCardinality-2024-05
lola: time limit : 3595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 110 (type EQUN) for FireWire-PT-15-ReachabilityCardinality-2024-05
lola: result : false
lola: CANCELED task # 93 (type FNDP) for FireWire-PT-15-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 132 (type SRCH) for FireWire-PT-15-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 133 (type EXCL) for FireWire-PT-15-ReachabilityCardinality-2024-05 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-15-ReachabilityCardinality-2024-00: EF true tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-01: AG false findpath
FireWire-PT-15-ReachabilityCardinality-2024-02: AG false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-03: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-04: EF false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-05: EF false state equation
FireWire-PT-15-ReachabilityCardinality-2024-06: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-07: AG false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-08: AG false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-09: EF true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-10: AG true tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-11: AG true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-12: EF true tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-13: EF false tandem / insertion
FireWire-PT-15-ReachabilityCardinality-2024-14: EF false tandem / relaxed
FireWire-PT-15-ReachabilityCardinality-2024-15: EF true tandem / relaxed


Time elapsed: 5 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-15"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FireWire-PT-15, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910400179"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-15.tgz
mv FireWire-PT-15 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;