fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r571-tall-171734910300139
Last Updated
July 7, 2024

About the Execution of 2023-gold for FireWire-PT-07

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
486.995 25320.00 71535.00 448.90 TTTFTFTFTFTFTFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910300139.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FireWire-PT-07, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910300139
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 8.3K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 8.9K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 97K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-00
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-01
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-02
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-03
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-04
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-05
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-06
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-07
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-08
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-09
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-10
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-11
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-12
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-13
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-14
FORMULA_NAME FireWire-PT-07-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717369373898

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-07
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 23:02:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 23:02:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 23:02:55] [INFO ] Load time of PNML (sax parser for PT used): 97 ms
[2024-06-02 23:02:55] [INFO ] Transformed 126 places.
[2024-06-02 23:02:55] [INFO ] Transformed 396 transitions.
[2024-06-02 23:02:55] [INFO ] Found NUPN structural information;
[2024-06-02 23:02:55] [INFO ] Parsed PT model containing 126 places and 396 transitions and 1471 arcs in 188 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 13 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 53 transitions
Reduce redundant transitions removed 53 transitions.
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 542 resets, run finished after 397 ms. (steps per millisecond=25 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 166 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 161 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 149 resets, run finished after 73 ms. (steps per millisecond=136 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 142 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 153 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 151 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 149 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 8) seen :0
Interrupted probabilistic random walk after 929201 steps, run timeout after 3001 ms. (steps per millisecond=309 ) properties seen :{1=1, 2=1, 3=1, 4=1, 7=1}
Probabilistic random walk after 929201 steps, saw 183178 distinct states, run finished after 3002 ms. (steps per millisecond=309 ) properties seen :5
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-07-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Running SMT prover for 3 properties.
[2024-06-02 23:02:59] [INFO ] Flow matrix only has 311 transitions (discarded 32 similar events)
// Phase 1: matrix 311 rows 126 cols
[2024-06-02 23:02:59] [INFO ] Computed 8 invariants in 17 ms
[2024-06-02 23:03:00] [INFO ] [Real]Absence check using 8 positive place invariants in 4 ms returned sat
[2024-06-02 23:03:00] [INFO ] After 193ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2024-06-02 23:03:00] [INFO ] [Nat]Absence check using 8 positive place invariants in 2 ms returned sat
[2024-06-02 23:03:00] [INFO ] After 136ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:00] [INFO ] State equation strengthened by 45 read => feed constraints.
[2024-06-02 23:03:00] [INFO ] After 104ms SMT Verify possible using 45 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:00] [INFO ] Deduced a trap composed of 44 places in 67 ms of which 6 ms to minimize.
[2024-06-02 23:03:00] [INFO ] Deduced a trap composed of 36 places in 48 ms of which 1 ms to minimize.
[2024-06-02 23:03:00] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 151 ms
[2024-06-02 23:03:00] [INFO ] Deduced a trap composed of 18 places in 34 ms of which 1 ms to minimize.
[2024-06-02 23:03:00] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 58 ms
[2024-06-02 23:03:00] [INFO ] After 410ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 79 ms.
[2024-06-02 23:03:00] [INFO ] After 721ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 25 ms.
Support contains 33 out of 126 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 126/126 places, 343/343 transitions.
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 126 transition count 340
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 4 place count 125 transition count 338
Iterating global reduction 1 with 1 rules applied. Total rules applied 5 place count 125 transition count 338
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 6 place count 125 transition count 337
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 8 place count 124 transition count 336
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -4
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 12 place count 122 transition count 340
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 16 place count 122 transition count 336
Drop transitions removed 8 transitions
Redundant transition composition rules discarded 8 transitions
Iterating global reduction 3 with 8 rules applied. Total rules applied 24 place count 122 transition count 328
Applied a total of 24 rules in 62 ms. Remains 122 /126 variables (removed 4) and now considering 328/343 (removed 15) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 63 ms. Remains : 122/126 places, 328/343 transitions.
Incomplete random walk after 10000 steps, including 545 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 157 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 155 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 128 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 902386 steps, run timeout after 3001 ms. (steps per millisecond=300 ) properties seen :{}
Probabilistic random walk after 902386 steps, saw 192414 distinct states, run finished after 3001 ms. (steps per millisecond=300 ) properties seen :0
Running SMT prover for 3 properties.
[2024-06-02 23:03:04] [INFO ] Flow matrix only has 302 transitions (discarded 26 similar events)
// Phase 1: matrix 302 rows 122 cols
[2024-06-02 23:03:04] [INFO ] Computed 8 invariants in 7 ms
[2024-06-02 23:03:04] [INFO ] [Real]Absence check using 8 positive place invariants in 3 ms returned sat
[2024-06-02 23:03:04] [INFO ] After 42ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2024-06-02 23:03:04] [INFO ] [Nat]Absence check using 8 positive place invariants in 2 ms returned sat
[2024-06-02 23:03:04] [INFO ] After 122ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:04] [INFO ] State equation strengthened by 46 read => feed constraints.
[2024-06-02 23:03:04] [INFO ] After 87ms SMT Verify possible using 46 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:04] [INFO ] Deduced a trap composed of 36 places in 39 ms of which 0 ms to minimize.
[2024-06-02 23:03:04] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 57 ms
[2024-06-02 23:03:04] [INFO ] Deduced a trap composed of 16 places in 26 ms of which 0 ms to minimize.
[2024-06-02 23:03:04] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 43 ms
[2024-06-02 23:03:04] [INFO ] After 261ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 58 ms.
[2024-06-02 23:03:04] [INFO ] After 492ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 13 ms.
Support contains 32 out of 122 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 122/122 places, 328/328 transitions.
Applied a total of 0 rules in 12 ms. Remains 122 /122 variables (removed 0) and now considering 328/328 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 122/122 places, 328/328 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 122/122 places, 328/328 transitions.
Applied a total of 0 rules in 11 ms. Remains 122 /122 variables (removed 0) and now considering 328/328 (removed 0) transitions.
[2024-06-02 23:03:04] [INFO ] Flow matrix only has 302 transitions (discarded 26 similar events)
[2024-06-02 23:03:04] [INFO ] Invariant cache hit.
[2024-06-02 23:03:04] [INFO ] Implicit Places using invariants in 61 ms returned []
[2024-06-02 23:03:04] [INFO ] Flow matrix only has 302 transitions (discarded 26 similar events)
[2024-06-02 23:03:04] [INFO ] Invariant cache hit.
[2024-06-02 23:03:04] [INFO ] State equation strengthened by 46 read => feed constraints.
[2024-06-02 23:03:05] [INFO ] Implicit Places using invariants and state equation in 204 ms returned []
Implicit Place search using SMT with State Equation took 267 ms to find 0 implicit places.
[2024-06-02 23:03:05] [INFO ] Redundant transitions in 20 ms returned []
[2024-06-02 23:03:05] [INFO ] Flow matrix only has 302 transitions (discarded 26 similar events)
[2024-06-02 23:03:05] [INFO ] Invariant cache hit.
[2024-06-02 23:03:05] [INFO ] Dead Transitions using invariants and state equation in 137 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 442 ms. Remains : 122/122 places, 328/328 transitions.
Graph (trivial) has 67 edges and 122 vertex of which 13 / 122 are part of one of the 5 SCC in 2 ms
Free SCC test removed 8 places
Drop transitions removed 38 transitions
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 73 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 113 transition count 254
Drop transitions removed 32 transitions
Redundant transition composition rules discarded 32 transitions
Iterating global reduction 0 with 32 rules applied. Total rules applied 35 place count 113 transition count 222
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 36 place count 113 transition count 221
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 37 place count 112 transition count 221
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 37 place count 112 transition count 220
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 39 place count 111 transition count 220
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 43 place count 109 transition count 218
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 44 place count 109 transition count 217
Free-agglomeration rule applied 3 times with reduction of 1 identical transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 47 place count 109 transition count 213
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 51 place count 106 transition count 212
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 52 place count 106 transition count 213
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 53 place count 105 transition count 213
Partial Free-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 4 with 4 rules applied. Total rules applied 57 place count 105 transition count 213
Applied a total of 57 rules in 50 ms. Remains 105 /122 variables (removed 17) and now considering 213/328 (removed 115) transitions.
Running SMT prover for 3 properties.
// Phase 1: matrix 213 rows 105 cols
[2024-06-02 23:03:05] [INFO ] Computed 8 invariants in 1 ms
[2024-06-02 23:03:05] [INFO ] [Real]Absence check using 8 positive place invariants in 1 ms returned sat
[2024-06-02 23:03:05] [INFO ] After 41ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2024-06-02 23:03:05] [INFO ] [Nat]Absence check using 8 positive place invariants in 2 ms returned sat
[2024-06-02 23:03:05] [INFO ] After 78ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:05] [INFO ] Deduced a trap composed of 30 places in 32 ms of which 1 ms to minimize.
[2024-06-02 23:03:05] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 47 ms
[2024-06-02 23:03:05] [INFO ] After 190ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 48 ms.
[2024-06-02 23:03:05] [INFO ] After 282ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
[2024-06-02 23:03:05] [INFO ] Export to MCC of 3 properties in file /home/mcc/execution/ReachabilityCardinality.sr.xml took 4 ms.
[2024-06-02 23:03:05] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 122 places, 328 transitions and 1225 arcs took 1 ms.
[2024-06-02 23:03:05] [INFO ] Flatten gal took : 53 ms
Total runtime 10379 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FireWire-PT-07
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
ReachabilityCardinality

FORMULA FireWire-PT-07-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-07-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-07-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717369399218

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/ReachabilityCardinality.xml
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 18 (type EXCL) for 6 FireWire-PT-07-ReachabilityCardinality-2024-11
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 13 (type FNDP) for 6 FireWire-PT-07-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 14 (type EQUN) for 6 FireWire-PT-07-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 17 (type SRCH) for 6 FireWire-PT-07-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/369/ReachabilityCardinality-14.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-07-ReachabilityCardinality-2024-02: EF 0 5 0 0 1 0 0 0
FireWire-PT-07-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
FireWire-PT-07-ReachabilityCardinality-2024-11: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 EF FNDP 5/900 0/5 FireWire-PT-07-ReachabilityCardinality-2024-11 668848 t fired, 16572 attempts, .
14 EF STEQ 5/900 0/5 FireWire-PT-07-ReachabilityCardinality-2024-11 sara is running.
17 EF SRCH 5/900 2/5 FireWire-PT-07-ReachabilityCardinality-2024-11 397541 m, 79508 m/sec, 1223813 t fired, .
18 EF EXCL 5/1200 2/32 FireWire-PT-07-ReachabilityCardinality-2024-11 248811 m, 49762 m/sec, 540363 t fired, .

Time elapsed: 5 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 3
lola: FINISHED task # 17 (type SRCH) for FireWire-PT-07-ReachabilityCardinality-2024-11
lola: result : true
lola: markings : 440781
lola: fired transitions : 1354632
lola: time used : 5.000000
lola: memory pages used : 2
lola: CANCELED task # 13 (type FNDP) for FireWire-PT-07-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 14 (type EQUN) for FireWire-PT-07-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 18 (type EXCL) for FireWire-PT-07-ReachabilityCardinality-2024-11 (obsolete)
lola: LAUNCH task # 26 (type EXCL) for 0 FireWire-PT-07-ReachabilityCardinality-2024-02
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 10 (type FNDP) for 3 FireWire-PT-07-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 11 (type EQUN) for 3 FireWire-PT-07-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 20 (type SRCH) for 3 FireWire-PT-07-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 13 (type FNDP) for FireWire-PT-07-ReachabilityCardinality-2024-11
lola: result : unknown
lola: fired transitions : 745677
lola: tried executions : 18202
lola: time used : 5.000000
lola: memory pages used : 0
lola: FINISHED task # 14 (type EQUN) for FireWire-PT-07-ReachabilityCardinality-2024-11
lola: result : unknown
sara: try reading problem file /home/mcc/execution/369/ReachabilityCardinality-11.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-07-ReachabilityCardinality-2024-11: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-07-ReachabilityCardinality-2024-02: EF 0 4 1 0 1 0 0 0
FireWire-PT-07-ReachabilityCardinality-2024-09: AG 0 2 3 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 EF FNDP 5/1198 0/5 FireWire-PT-07-ReachabilityCardinality-2024-09 556871 t fired, 37570 attempts, .
11 EF STEQ 5/1198 0/5 FireWire-PT-07-ReachabilityCardinality-2024-09 sara is running.
20 EF SRCH 5/1797 2/5 FireWire-PT-07-ReachabilityCardinality-2024-09 358467 m, 71693 m/sec, 1055969 t fired, .
26 EF EXCL 5/1797 2/32 FireWire-PT-07-ReachabilityCardinality-2024-02 257417 m, 51483 m/sec, 602855 t fired, .

Time elapsed: 10 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 3
lola: FINISHED task # 20 (type SRCH) for FireWire-PT-07-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 445040
lola: fired transitions : 1305958
lola: time used : 6.000000
lola: memory pages used : 2
lola: CANCELED task # 10 (type FNDP) for FireWire-PT-07-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 11 (type EQUN) for FireWire-PT-07-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 22 (type FNDP) for 0 FireWire-PT-07-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 23 (type EQUN) for 0 FireWire-PT-07-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 25 (type SRCH) for 0 FireWire-PT-07-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 10 (type FNDP) for FireWire-PT-07-ReachabilityCardinality-2024-09
lola: result : unknown
lola: fired transitions : 694765
lola: tried executions : 46580
lola: time used : 6.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 11 (type EQUN) for FireWire-PT-07-ReachabilityCardinality-2024-09
lola: result : unknown
sara: try reading problem file /home/mcc/execution/369/ReachabilityCardinality-23.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 26 (type EXCL) for FireWire-PT-07-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 355783
lola: fired transitions : 846291
lola: time used : 7.000000
lola: memory pages used : 2
lola: CANCELED task # 22 (type FNDP) for FireWire-PT-07-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 23 (type EQUN) for FireWire-PT-07-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 25 (type SRCH) for FireWire-PT-07-ReachabilityCardinality-2024-02 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-07-ReachabilityCardinality-2024-02: EF true tandem / relaxed
FireWire-PT-07-ReachabilityCardinality-2024-09: AG false tandem / insertion
FireWire-PT-07-ReachabilityCardinality-2024-11: AG false tandem / insertion


Time elapsed: 12 secs. Pages in use: 4

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-07"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FireWire-PT-07, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910300139"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-07.tgz
mv FireWire-PT-07 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;