Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910300130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FireWire-PT-05, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910300130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 6.1K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.7K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 107K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 91K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-00
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-01
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-02
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-03
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-04
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-05
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-06
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-07
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-08
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-09
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-10
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-11
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-12
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-13
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-14
FORMULA_NAME FireWire-PT-05-ReachabilityFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717369250815

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FireWire-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 23:00:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2024-06-02 23:00:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 23:00:52] [INFO ] Load time of PNML (sax parser for PT used): 62 ms
[2024-06-02 23:00:52] [INFO ] Transformed 114 places.
[2024-06-02 23:00:52] [INFO ] Transformed 373 transitions.
[2024-06-02 23:00:52] [INFO ] Found NUPN structural information;
[2024-06-02 23:00:52] [INFO ] Parsed PT model containing 114 places and 373 transitions and 1389 arcs in 129 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 11 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 57 transitions
Reduce redundant transitions removed 57 transitions.
Incomplete random walk after 10000 steps, including 534 resets, run finished after 452 ms. (steps per millisecond=22 ) properties (out of 16) seen :2
FORMULA FireWire-PT-05-ReachabilityFireability-2024-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 140 ms. (steps per millisecond=71 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 378 resets, run finished after 118 ms. (steps per millisecond=84 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 85 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 135 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 14) seen :1
FORMULA FireWire-PT-05-ReachabilityFireability-2024-01 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 132 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 153 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 13) seen :0
Running SMT prover for 13 properties.
[2024-06-02 23:00:54] [INFO ] Flow matrix only has 284 transitions (discarded 32 similar events)
// Phase 1: matrix 284 rows 114 cols
[2024-06-02 23:00:54] [INFO ] Computed 8 invariants in 12 ms
[2024-06-02 23:00:54] [INFO ] After 342ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:12
[2024-06-02 23:00:54] [INFO ] [Nat]Absence check using 8 positive place invariants in 4 ms returned sat
[2024-06-02 23:00:55] [INFO ] After 268ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :7
[2024-06-02 23:00:55] [INFO ] State equation strengthened by 40 read => feed constraints.
[2024-06-02 23:00:55] [INFO ] After 187ms SMT Verify possible using 40 Read/Feed constraints in natural domain returned unsat :6 sat :7
[2024-06-02 23:00:55] [INFO ] After 450ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :7
Attempting to minimize the solution found.
Minimization took 181 ms.
[2024-06-02 23:00:55] [INFO ] After 1003ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :7
FORMULA FireWire-PT-05-ReachabilityFireability-2024-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-05-ReachabilityFireability-2024-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-05-ReachabilityFireability-2024-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-05-ReachabilityFireability-2024-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-05-ReachabilityFireability-2024-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FireWire-PT-05-ReachabilityFireability-2024-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 13 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 53 ms.
Support contains 52 out of 114 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 114/114 places, 316/316 transitions.
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 114 transition count 312
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 5 place count 113 transition count 312
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 5 place count 113 transition count 311
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 7 place count 112 transition count 311
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 8 place count 111 transition count 309
Iterating global reduction 2 with 1 rules applied. Total rules applied 9 place count 111 transition count 309
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 10 place count 111 transition count 308
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 3 with 6 rules applied. Total rules applied 16 place count 111 transition count 302
Applied a total of 16 rules in 41 ms. Remains 111 /114 variables (removed 3) and now considering 302/316 (removed 14) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 41 ms. Remains : 111/114 places, 302/316 transitions.
Incomplete random walk after 10000 steps, including 628 resets, run finished after 230 ms. (steps per millisecond=43 ) properties (out of 7) seen :1
FORMULA FireWire-PT-05-ReachabilityFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 81 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 174 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 185 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2024-06-02 23:00:56] [INFO ] Flow matrix only has 278 transitions (discarded 24 similar events)
// Phase 1: matrix 278 rows 111 cols
[2024-06-02 23:00:56] [INFO ] Computed 8 invariants in 2 ms
[2024-06-02 23:00:56] [INFO ] After 47ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2024-06-02 23:00:56] [INFO ] [Nat]Absence check using 8 positive place invariants in 1 ms returned sat
[2024-06-02 23:00:56] [INFO ] After 209ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2024-06-02 23:00:56] [INFO ] State equation strengthened by 39 read => feed constraints.
[2024-06-02 23:00:56] [INFO ] After 171ms SMT Verify possible using 39 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2024-06-02 23:00:56] [INFO ] After 385ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 157 ms.
[2024-06-02 23:00:57] [INFO ] After 809ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Parikh walk visited 0 properties in 25 ms.
Support contains 52 out of 111 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 111/111 places, 302/302 transitions.
Applied a total of 0 rules in 9 ms. Remains 111 /111 variables (removed 0) and now considering 302/302 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 9 ms. Remains : 111/111 places, 302/302 transitions.
Incomplete random walk after 10000 steps, including 600 resets, run finished after 189 ms. (steps per millisecond=52 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 76 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 17 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 161 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 178 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 6) seen :0
Finished probabilistic random walk after 394108 steps, run visited all 6 properties in 1211 ms. (steps per millisecond=325 )
Probabilistic random walk after 394108 steps, saw 88525 distinct states, run finished after 1211 ms. (steps per millisecond=325 ) properties seen :6
FORMULA FireWire-PT-05-ReachabilityFireability-2024-15 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-14 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-09 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
FORMULA FireWire-PT-05-ReachabilityFireability-2024-00 FALSE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 6448 ms.
starting LoLA
BK_INPUT FireWire-PT-05
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability

FORMULA FireWire-PT-05-ReachabilityFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FireWire-PT-05-ReachabilityFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717369277762

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 FireWire-PT-05-ReachabilityFireability-2024-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for FireWire-PT-05-ReachabilityFireability-2024-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 FireWire-PT-05-ReachabilityFireability-2024-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 37 (type CNST) for FireWire-PT-05-ReachabilityFireability-2024-12
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 18 FireWire-PT-05-ReachabilityFireability-2024-06
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 18 FireWire-PT-05-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 18 FireWire-PT-05-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 51 (type SRCH) for 18 FireWire-PT-05-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 FireWire-PT-05-ReachabilityFireability-2024-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 10 (type CNST) for FireWire-PT-05-ReachabilityFireability-2024-03
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-49.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for FireWire-PT-05-ReachabilityFireability-2024-06
lola: result : false
lola: CANCELED task # 48 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-06 (obsolete)
lola: CANCELED task # 51 (type SRCH) for FireWire-PT-05-ReachabilityFireability-2024-06 (obsolete)
lola: CANCELED task # 52 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-06 (obsolete)
lola: LAUNCH task # 125 (type EXCL) for 42 FireWire-PT-05-ReachabilityFireability-2024-14
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 115 (type FNDP) for 15 FireWire-PT-05-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type EQUN) for 15 FireWire-PT-05-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SRCH) for 15 FireWire-PT-05-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 48 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-06
lola: result : unknown
lola: fired transitions : 291914
lola: tried executions : 18719
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 125 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-14
lola: result : true
lola: markings : 1140
lola: fired transitions : 1575
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 97 (type EXCL) for 21 FireWire-PT-05-ReachabilityFireability-2024-07
lola: time limit : 327 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-118.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 97 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-07
lola: result : true
lola: markings : 20930
lola: fired transitions : 53279
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 86 (type EXCL) for 12 FireWire-PT-05-ReachabilityFireability-2024-04
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 86 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-04
lola: result : true
lola: markings : 75975
lola: fired transitions : 229305
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 77 (type EXCL) for 33 FireWire-PT-05-ReachabilityFireability-2024-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 77 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-11
lola: result : true
lola: markings : 13223
lola: fired transitions : 32048
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 75 (type EXCL) for 27 FireWire-PT-05-ReachabilityFireability-2024-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 75 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-09
lola: result : true
lola: markings : 1130
lola: fired transitions : 1563
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 69 (type EXCL) for 30 FireWire-PT-05-ReachabilityFireability-2024-10
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-10
lola: result : true
lola: markings : 637
lola: fired transitions : 880
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 39 FireWire-PT-05-ReachabilityFireability-2024-13
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-13
lola: result : true
lola: markings : 807
lola: fired transitions : 1110
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 99 (type EXCL) for 3 FireWire-PT-05-ReachabilityFireability-2024-01
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 99 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-01
lola: result : true
lola: markings : 7250
lola: fired transitions : 14799
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 112 (type EXCL) for 0 FireWire-PT-05-ReachabilityFireability-2024-00
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 112 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-00
lola: result : true
lola: markings : 59
lola: fired transitions : 58
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 104 (type EXCL) for 24 FireWire-PT-05-ReachabilityFireability-2024-08
lola: time limit : 1198 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-05-ReachabilityFireability-2024-00: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-01: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-02: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-03: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-04: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-06: EF false state equation
FireWire-PT-05-ReachabilityFireability-2024-07: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-09: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-10: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-11: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-12: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-13: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-14: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-05-ReachabilityFireability-2024-05: AG 0 2 3 0 1 0 0 0
FireWire-PT-05-ReachabilityFireability-2024-08: AG 0 4 1 0 1 0 0 0
FireWire-PT-05-ReachabilityFireability-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF EXCL 0/1198 1/32 FireWire-PT-05-ReachabilityFireability-2024-08 2077 m, 415 m/sec, 5532 t fired, .
115 EF FNDP 3/896 0/5 FireWire-PT-05-ReachabilityFireability-2024-05 320067 t fired, 6209 attempts, .
118 EF STEQ 3/896 0/5 FireWire-PT-05-ReachabilityFireability-2024-05 sara is running.
121 EF SRCH 3/896 1/5 FireWire-PT-05-ReachabilityFireability-2024-05 214952 m, 42990 m/sec, 704131 t fired, .

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 118 (type EQUN) for FireWire-PT-05-ReachabilityFireability-2024-05
lola: result : false
lola: CANCELED task # 115 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-05 (obsolete)
lola: CANCELED task # 121 (type SRCH) for FireWire-PT-05-ReachabilityFireability-2024-05 (obsolete)
lola: LAUNCH task # 127 (type FNDP) for 45 FireWire-PT-05-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 45 FireWire-PT-05-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SRCH) for 45 FireWire-PT-05-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 115 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-05
lola: result : unknown
lola: fired transitions : 332069
lola: tried executions : 6393
lola: time used : 3.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-128.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 127 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-15
lola: result : true
lola: fired transitions : 15110
lola: tried executions : 593
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 128 (type EQUN) for FireWire-PT-05-ReachabilityFireability-2024-15 (obsolete)
lola: CANCELED task # 130 (type SRCH) for FireWire-PT-05-ReachabilityFireability-2024-15 (obsolete)
lola: LAUNCH task # 95 (type FNDP) for 24 FireWire-PT-05-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 24 FireWire-PT-05-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 103 (type SRCH) for 24 FireWire-PT-05-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 128 (type EQUN) for FireWire-PT-05-ReachabilityFireability-2024-15
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-101.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-05-ReachabilityFireability-2024-00: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-01: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-02: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-03: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-04: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-05: AG true state equation
FireWire-PT-05-ReachabilityFireability-2024-06: EF false state equation
FireWire-PT-05-ReachabilityFireability-2024-07: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-09: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-10: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-11: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-12: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-13: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-14: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-05-ReachabilityFireability-2024-08: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 5/1797 0/5 FireWire-PT-05-ReachabilityFireability-2024-08 664494 t fired, 13018 attempts, .
101 EF STEQ 5/3595 0/5 FireWire-PT-05-ReachabilityFireability-2024-08 sara is running.
103 EF SRCH 5/3595 2/5 FireWire-PT-05-ReachabilityFireability-2024-08 431917 m, 86383 m/sec, 1407814 t fired, .
104 EF EXCL 5/3595 1/32 FireWire-PT-05-ReachabilityFireability-2024-08 232618 m, 46108 m/sec, 695186 t fired, .

Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-05-ReachabilityFireability-2024-00: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-01: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-02: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-03: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-04: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-05: AG true state equation
FireWire-PT-05-ReachabilityFireability-2024-06: EF false state equation
FireWire-PT-05-ReachabilityFireability-2024-07: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-09: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-10: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-11: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-12: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-13: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-14: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FireWire-PT-05-ReachabilityFireability-2024-08: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 10/1792 0/5 FireWire-PT-05-ReachabilityFireability-2024-08 1386109 t fired, 24774 attempts, .
101 EF STEQ 10/3590 0/5 FireWire-PT-05-ReachabilityFireability-2024-08 sara is running.
103 EF SRCH 10/3590 3/5 FireWire-PT-05-ReachabilityFireability-2024-08 849018 m, 83420 m/sec, 2889152 t fired, .
104 EF EXCL 10/3595 2/32 FireWire-PT-05-ReachabilityFireability-2024-08 489313 m, 51339 m/sec, 1384085 t fired, .

Time elapsed: 15 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 103 (type SRCH) for FireWire-PT-05-ReachabilityFireability-2024-08
lola: result : false
lola: markings : 1055143
lola: fired transitions : 3698755
lola: time used : 12.000000
lola: memory pages used : 4
lola: CANCELED task # 95 (type FNDP) for FireWire-PT-05-ReachabilityFireability-2024-08 (obsolete)
lola: CANCELED task # 101 (type EQUN) for FireWire-PT-05-ReachabilityFireability-2024-08 (obsolete)
lola: CANCELED task # 104 (type EXCL) for FireWire-PT-05-ReachabilityFireability-2024-08 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FireWire-PT-05-ReachabilityFireability-2024-00: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-01: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-02: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-03: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-04: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-05: AG true state equation
FireWire-PT-05-ReachabilityFireability-2024-06: EF false state equation
FireWire-PT-05-ReachabilityFireability-2024-07: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-08: AG true tandem / insertion
FireWire-PT-05-ReachabilityFireability-2024-09: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-10: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-11: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-12: INITIAL false preprocessing
FireWire-PT-05-ReachabilityFireability-2024-13: AG false tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-14: EF true tandem / relaxed
FireWire-PT-05-ReachabilityFireability-2024-15: EF true findpath


Time elapsed: 17 secs. Pages in use: 7

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-05"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FireWire-PT-05, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910300130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-05.tgz
mv FireWire-PT-05 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;