About the Execution of 2023-gold for CO4-PT-16
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 284.420 | 11854.00 | 35788.00 | 315.80 | FTFFTFTFTFTFTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910200079.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is CO4-PT-16, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910200079
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 696K
-rw-r--r-- 1 mcc users 8.6K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 43K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 260K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-00
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-01
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-02
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-03
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-04
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-05
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-06
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-07
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-08
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-09
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-10
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-11
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-12
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-13
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-14
FORMULA_NAME CO4-PT-16-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717368773166
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CO4-PT-16
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 22:52:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 22:52:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 22:52:54] [INFO ] Load time of PNML (sax parser for PT used): 173 ms
[2024-06-02 22:52:54] [INFO ] Transformed 837 places.
[2024-06-02 22:52:54] [INFO ] Transformed 1122 transitions.
[2024-06-02 22:52:54] [INFO ] Found NUPN structural information;
[2024-06-02 22:52:54] [INFO ] Parsed PT model containing 837 places and 1122 transitions and 3052 arcs in 294 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 15 ms.
Working with output stream class java.io.PrintStream
Deduced a syphon composed of 116 places in 11 ms
Reduce places removed 116 places and 180 transitions.
FORMULA CO4-PT-16-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-16-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-16-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-16-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-16-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-16-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 182 resets, run finished after 324 ms. (steps per millisecond=30 ) properties (out of 10) seen :2
FORMULA CO4-PT-16-ReachabilityCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-16-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 39 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 35 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 41 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 38 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 8) seen :1
FORMULA CO4-PT-16-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 41 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 7) seen :1
FORMULA CO4-PT-16-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 38 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 942 rows 721 cols
[2024-06-02 22:52:55] [INFO ] Computed 12 invariants in 32 ms
[2024-06-02 22:52:56] [INFO ] After 363ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:5
[2024-06-02 22:52:56] [INFO ] [Nat]Absence check using 11 positive place invariants in 22 ms returned sat
[2024-06-02 22:52:56] [INFO ] [Nat]Absence check using 11 positive and 1 generalized place invariants in 0 ms returned sat
[2024-06-02 22:52:56] [INFO ] After 411ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :4
[2024-06-02 22:52:57] [INFO ] After 690ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :4
Attempting to minimize the solution found.
Minimization took 140 ms.
[2024-06-02 22:52:57] [INFO ] After 1110ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :4
FORMULA CO4-PT-16-ReachabilityCardinality-2024-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 4 different solutions.
TestFail conflict detected : techniques TOPOLOGICAL PARIKH_WALK answered differently (true)on formula CO4-PT-16-ReachabilityCardinality-2024-11
FORMULA CO4-PT-16-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
TestFail conflict detected : techniques TOPOLOGICAL PARIKH_WALK answered differently (false)on formula CO4-PT-16-ReachabilityCardinality-2024-06
Finished Parikh walk after 87 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=43 )
FORMULA CO4-PT-16-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 2 properties in 12 ms.
Support contains 5 out of 721 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 721/721 places, 942/942 transitions.
Graph (trivial) has 740 edges and 721 vertex of which 2 / 721 are part of one of the 1 SCC in 14 ms
Free SCC test removed 1 places
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Graph (complete) has 1392 edges and 720 vertex of which 675 are kept as prefixes of interest. Removing 45 places using SCC suffix rule.3 ms
Discarding 45 places :
Also discarding 20 output transitions
Drop transitions removed 20 transitions
Drop transitions removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Drop transitions removed 349 transitions
Trivial Post-agglo rules discarded 349 transitions
Performed 349 trivial Post agglomeration. Transition count delta: 349
Iterating post reduction 0 with 380 rules applied. Total rules applied 382 place count 675 transition count 540
Reduce places removed 349 places and 0 transitions.
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 1 with 376 rules applied. Total rules applied 758 place count 326 transition count 513
Reduce places removed 12 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 2 with 27 rules applied. Total rules applied 785 place count 314 transition count 498
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 3 with 9 rules applied. Total rules applied 794 place count 311 transition count 492
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 4 with 9 rules applied. Total rules applied 803 place count 308 transition count 486
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 5 with 10 rules applied. Total rules applied 813 place count 305 transition count 479
Reduce places removed 4 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 5 rules applied. Total rules applied 818 place count 301 transition count 478
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 818 place count 301 transition count 477
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 7 with 2 rules applied. Total rules applied 820 place count 300 transition count 477
Discarding 47 places :
Symmetric choice reduction at 7 with 47 rule applications. Total rules 867 place count 253 transition count 430
Iterating global reduction 7 with 47 rules applied. Total rules applied 914 place count 253 transition count 430
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 13 Pre rules applied. Total rules applied 914 place count 253 transition count 417
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 7 with 26 rules applied. Total rules applied 940 place count 240 transition count 417
Discarding 30 places :
Symmetric choice reduction at 7 with 30 rule applications. Total rules 970 place count 210 transition count 363
Iterating global reduction 7 with 30 rules applied. Total rules applied 1000 place count 210 transition count 363
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 7 with 7 rules applied. Total rules applied 1007 place count 210 transition count 356
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 1008 place count 209 transition count 356
Discarding 2 places :
Symmetric choice reduction at 9 with 2 rule applications. Total rules 1010 place count 207 transition count 354
Iterating global reduction 9 with 2 rules applied. Total rules applied 1012 place count 207 transition count 354
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 9 with 2 rules applied. Total rules applied 1014 place count 207 transition count 352
Performed 76 Post agglomeration using F-continuation condition with reduction of 10 identical transitions.
Deduced a syphon composed of 76 places in 0 ms
Reduce places removed 76 places and 0 transitions.
Iterating global reduction 10 with 152 rules applied. Total rules applied 1166 place count 131 transition count 266
Drop transitions removed 1 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 10 with 4 rules applied. Total rules applied 1170 place count 131 transition count 262
Performed 39 Post agglomeration using F-continuation condition.Transition count delta: -41
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 11 with 78 rules applied. Total rules applied 1248 place count 92 transition count 303
Drop transitions removed 39 transitions
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 59 transitions.
Iterating post reduction 11 with 59 rules applied. Total rules applied 1307 place count 92 transition count 244
Discarding 28 places :
Symmetric choice reduction at 12 with 28 rule applications. Total rules 1335 place count 64 transition count 160
Iterating global reduction 12 with 28 rules applied. Total rules applied 1363 place count 64 transition count 160
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 12 with 19 rules applied. Total rules applied 1382 place count 64 transition count 141
Discarding 7 places :
Symmetric choice reduction at 13 with 7 rule applications. Total rules 1389 place count 57 transition count 109
Iterating global reduction 13 with 7 rules applied. Total rules applied 1396 place count 57 transition count 109
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 13 with 5 rules applied. Total rules applied 1401 place count 57 transition count 104
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 14 with 2 rules applied. Total rules applied 1403 place count 56 transition count 113
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 14 with 3 rules applied. Total rules applied 1406 place count 56 transition count 110
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 15 with 7 rules applied. Total rules applied 1413 place count 56 transition count 103
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -15
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 15 with 2 rules applied. Total rules applied 1415 place count 55 transition count 118
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 15 with 3 rules applied. Total rules applied 1418 place count 55 transition count 115
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 16 with 7 rules applied. Total rules applied 1425 place count 55 transition count 108
Free-agglomeration rule applied 12 times.
Iterating global reduction 16 with 12 rules applied. Total rules applied 1437 place count 55 transition count 96
Reduce places removed 12 places and 0 transitions.
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 16 with 14 rules applied. Total rules applied 1451 place count 43 transition count 94
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 17 with 1 rules applied. Total rules applied 1452 place count 43 transition count 94
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 17 with 1 rules applied. Total rules applied 1453 place count 42 transition count 93
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 19 edges and 39 vertex of which 4 / 39 are part of one of the 2 SCC in 0 ms
Free SCC test removed 2 places
Iterating post reduction 17 with 4 rules applied. Total rules applied 1457 place count 37 transition count 93
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 5 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (trivial) has 23 edges and 36 vertex of which 6 / 36 are part of one of the 1 SCC in 0 ms
Free SCC test removed 5 places
Iterating post reduction 18 with 8 rules applied. Total rules applied 1465 place count 31 transition count 87
Drop transitions removed 15 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 19 with 23 rules applied. Total rules applied 1488 place count 31 transition count 64
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 20 with 2 rules applied. Total rules applied 1490 place count 30 transition count 63
Discarding 1 places :
Symmetric choice reduction at 20 with 1 rule applications. Total rules 1491 place count 29 transition count 59
Iterating global reduction 20 with 1 rules applied. Total rules applied 1492 place count 29 transition count 59
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 20 with 4 rules applied. Total rules applied 1496 place count 29 transition count 55
Discarding 1 places :
Symmetric choice reduction at 20 with 1 rule applications. Total rules 1497 place count 28 transition count 52
Iterating global reduction 20 with 1 rules applied. Total rules applied 1498 place count 28 transition count 52
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 1499 place count 28 transition count 51
Free-agglomeration rule applied 3 times.
Iterating global reduction 21 with 3 rules applied. Total rules applied 1502 place count 28 transition count 48
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 21 with 3 rules applied. Total rules applied 1505 place count 25 transition count 48
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 22 with 2 rules applied. Total rules applied 1507 place count 25 transition count 46
Applied a total of 1507 rules in 165 ms. Remains 25 /721 variables (removed 696) and now considering 46/942 (removed 896) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 166 ms. Remains : 25/721 places, 46/942 transitions.
Finished random walk after 57 steps, including 0 resets, run visited all 2 properties in 2 ms. (steps per millisecond=28 )
FORMULA CO4-PT-16-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-16-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 2866 ms.
starting LoLA
BK_INPUT CO4-PT-16
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA CO4-PT-16-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717368785020
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 180 transitions removed,116 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 CO4-PT-16-ReachabilityCardinality-2024-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 10 (type CNST) for CO4-PT-16-ReachabilityCardinality-2024-03
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 0 CO4-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 0 CO4-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 0 CO4-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 0 CO4-PT-16-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 CO4-PT-16-ReachabilityCardinality-2024-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 13 (type CNST) for CO4-PT-16-ReachabilityCardinality-2024-04
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-00
lola: result : false
lola: CANCELED task # 48 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 51 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 52 (type EXCL) for CO4-PT-16-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 124 (type EXCL) for 42 CO4-PT-16-ReachabilityCardinality-2024-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 125 (type FNDP) for 45 CO4-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type EQUN) for 45 CO4-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SRCH) for 45 CO4-PT-16-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 48 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 13183
lola: tried executions : 25
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 125 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-15
lola: result : true
lola: fired transitions : 3094
lola: tried executions : 73
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 127 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 129 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 67 (type FNDP) for 33 CO4-PT-16-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 33 CO4-PT-16-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 70 (type SRCH) for 33 CO4-PT-16-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-15
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-68.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 124 (type EXCL) for CO4-PT-16-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 15571
lola: fired transitions : 25726
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 100 (type EXCL) for 24 CO4-PT-16-ReachabilityCardinality-2024-08
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 100 (type EXCL) for CO4-PT-16-ReachabilityCardinality-2024-08
lola: result : true
lola: markings : 65349
lola: fired transitions : 107878
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 113 (type EXCL) for 30 CO4-PT-16-ReachabilityCardinality-2024-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-11
lola: result : false
lola: CANCELED task # 67 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 70 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-11 (obsolete)
lola: LAUNCH task # 134 (type FNDP) for 18 CO4-PT-16-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 18 CO4-PT-16-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 18 CO4-PT-16-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 67 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-11
lola: result : unknown
lola: fired transitions : 573219
lola: tried executions : 17397
lola: time used : 4.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CO4-PT-16-ReachabilityCardinality-2024-00: EF false state equation
CO4-PT-16-ReachabilityCardinality-2024-03: INITIAL false preprocessing
CO4-PT-16-ReachabilityCardinality-2024-04: INITIAL true preprocessing
CO4-PT-16-ReachabilityCardinality-2024-08: EF true tandem / relaxed
CO4-PT-16-ReachabilityCardinality-2024-11: EF false state equation
CO4-PT-16-ReachabilityCardinality-2024-14: AG false tandem / relaxed
CO4-PT-16-ReachabilityCardinality-2024-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CO4-PT-16-ReachabilityCardinality-2024-01: EF 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-02: AG 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-06: AG 0 2 3 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-07: EF 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-10: AG 0 4 1 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-12: EF 0 5 0 0 1 0 0 0
CO4-PT-16-ReachabilityCardinality-2024-13: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
113 EF EXCL 4/399 2/32 CO4-PT-16-ReachabilityCardinality-2024-10 281046 m, 56209 m/sec, 490753 t fired, .
134 EF FNDP 1/299 0/5 CO4-PT-16-ReachabilityCardinality-2024-06 732372 t fired, 1 attempts, .
135 EF STEQ 1/299 0/5 CO4-PT-16-ReachabilityCardinality-2024-06 sara is running.
137 EF SRCH 1/299 1/5 CO4-PT-16-ReachabilityCardinality-2024-06 163941 m, 32788 m/sec, 350562 t fired, .
Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 135 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-06
lola: result : false
lola: CANCELED task # 134 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 137 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 61 (type FNDP) for 39 CO4-PT-16-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 39 CO4-PT-16-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 64 (type SRCH) for 39 CO4-PT-16-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 134 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-06
lola: result : unknown
lola: fired transitions : 806744
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 62 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-13
lola: result : false
lola: CANCELED task # 61 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 64 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 54 (type FNDP) for 3 CO4-PT-16-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 3 CO4-PT-16-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SRCH) for 3 CO4-PT-16-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 66326
lola: tried executions : 3945
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 54 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-01
lola: result : true
lola: fired transitions : 106
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 57 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 75 (type FNDP) for 15 CO4-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 15 CO4-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SRCH) for 15 CO4-PT-16-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 75 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-05
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 78 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-05
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 76 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 36 CO4-PT-16-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 36 CO4-PT-16-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SRCH) for 36 CO4-PT-16-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-05
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: FINISHED task # 83 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-12
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 95 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 97 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 82 (type FNDP) for 6 CO4-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type EQUN) for 6 CO4-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SRCH) for 6 CO4-PT-16-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 82 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-02
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 86 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 121 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 89 (type FNDP) for 27 CO4-PT-16-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 27 CO4-PT-16-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SRCH) for 27 CO4-PT-16-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 89 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 92 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 114 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 85 (type FNDP) for 21 CO4-PT-16-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 21 CO4-PT-16-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SRCH) for 21 CO4-PT-16-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-86.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
lola: FINISHED task # 95 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-12
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 86 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-02
lola: result : true
lola: FINISHED task # 87 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-07
lola: result : false
lola: CANCELED task # 85 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 107 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 103 (type FNDP) for 30 CO4-PT-16-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type EQUN) for 30 CO4-PT-16-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SRCH) for 30 CO4-PT-16-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-07
lola: result : unknown
lola: fired transitions : 22381
lola: tried executions : 330
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 92 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-09
lola: result : true
lola: FINISHED task # 55 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-01
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 104 (type EQUN) for CO4-PT-16-ReachabilityCardinality-2024-10
lola: result : false
lola: CANCELED task # 103 (type FNDP) for CO4-PT-16-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 112 (type SRCH) for CO4-PT-16-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 113 (type EXCL) for CO4-PT-16-ReachabilityCardinality-2024-10 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CO4-PT-16-ReachabilityCardinality-2024-00: EF false state equation
CO4-PT-16-ReachabilityCardinality-2024-01: EF true findpath
CO4-PT-16-ReachabilityCardinality-2024-02: AG false findpath
CO4-PT-16-ReachabilityCardinality-2024-03: INITIAL false preprocessing
CO4-PT-16-ReachabilityCardinality-2024-04: INITIAL true preprocessing
CO4-PT-16-ReachabilityCardinality-2024-05: AG false findpath
CO4-PT-16-ReachabilityCardinality-2024-06: AG true state equation
CO4-PT-16-ReachabilityCardinality-2024-07: EF false state equation
CO4-PT-16-ReachabilityCardinality-2024-08: EF true tandem / relaxed
CO4-PT-16-ReachabilityCardinality-2024-09: AG false findpath
CO4-PT-16-ReachabilityCardinality-2024-10: AG true state equation
CO4-PT-16-ReachabilityCardinality-2024-11: EF false state equation
CO4-PT-16-ReachabilityCardinality-2024-12: EF true findpath
CO4-PT-16-ReachabilityCardinality-2024-13: AG true state equation
CO4-PT-16-ReachabilityCardinality-2024-14: AG false tandem / relaxed
CO4-PT-16-ReachabilityCardinality-2024-15: AG false findpath
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-16"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is CO4-PT-16, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910200079"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-16.tgz
mv CO4-PT-16 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;