fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r571-tall-171734910100024
Last Updated
July 7, 2024

About the Execution of 2023-gold for CO4-PT-05

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
231.972 5293.00 10696.00 351.00 FTFTFFTTFTFTFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r571-tall-171734910100024.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is CO4-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r571-tall-171734910100024
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.0K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 12K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 54K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-00
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-01
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-02
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-03
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-04
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-05
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-06
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-07
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-08
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-09
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-10
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-11
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-12
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-13
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-14
FORMULA_NAME CO4-PT-05-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717368596848

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CO4-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-06-02 22:49:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 22:49:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 22:49:58] [INFO ] Load time of PNML (sax parser for PT used): 54 ms
[2024-06-02 22:49:58] [INFO ] Transformed 101 places.
[2024-06-02 22:49:58] [INFO ] Transformed 253 transitions.
[2024-06-02 22:49:58] [INFO ] Found NUPN structural information;
[2024-06-02 22:49:58] [INFO ] Parsed PT model containing 101 places and 253 transitions and 723 arcs in 120 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 15 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 38 transitions
Reduce redundant transitions removed 38 transitions.
FORMULA CO4-PT-05-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-05-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-05-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-05-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-05-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 118 resets, run finished after 351 ms. (steps per millisecond=28 ) properties (out of 10) seen :6
FORMULA CO4-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-05-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-05-ReachabilityCardinality-2024-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-05-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA CO4-PT-05-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 13 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 4) seen :1
FORMULA CO4-PT-05-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 23 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2024-06-02 22:49:59] [INFO ] Flow matrix only has 160 transitions (discarded 55 similar events)
// Phase 1: matrix 160 rows 101 cols
[2024-06-02 22:49:59] [INFO ] Computed 5 invariants in 8 ms
[2024-06-02 22:49:59] [INFO ] After 172ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2024-06-02 22:49:59] [INFO ] [Nat]Absence check using 5 positive place invariants in 2 ms returned sat
[2024-06-02 22:49:59] [INFO ] After 86ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :1
[2024-06-02 22:49:59] [INFO ] State equation strengthened by 12 read => feed constraints.
[2024-06-02 22:49:59] [INFO ] After 21ms SMT Verify possible using 12 Read/Feed constraints in natural domain returned unsat :2 sat :1
[2024-06-02 22:49:59] [INFO ] After 51ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :1
Attempting to minimize the solution found.
Minimization took 20 ms.
[2024-06-02 22:49:59] [INFO ] After 244ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :1
FORMULA CO4-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA CO4-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 3 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 3 ms.
Support contains 18 out of 101 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 101/101 places, 215/215 transitions.
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 101 transition count 205
Reduce places removed 4 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 8 rules applied. Total rules applied 18 place count 97 transition count 201
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 22 place count 93 transition count 201
Discarding 36 places :
Symmetric choice reduction at 3 with 36 rule applications. Total rules 58 place count 57 transition count 133
Iterating global reduction 3 with 36 rules applied. Total rules applied 94 place count 57 transition count 133
Ensure Unique test removed 21 transitions
Reduce isomorphic transitions removed 21 transitions.
Iterating post reduction 3 with 21 rules applied. Total rules applied 115 place count 57 transition count 112
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 118 place count 54 transition count 106
Iterating global reduction 4 with 3 rules applied. Total rules applied 121 place count 54 transition count 106
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 122 place count 54 transition count 105
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 126 place count 52 transition count 103
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 127 place count 52 transition count 102
Drop transitions removed 10 transitions
Redundant transition composition rules discarded 10 transitions
Iterating global reduction 6 with 10 rules applied. Total rules applied 137 place count 52 transition count 92
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 139 place count 51 transition count 91
Free-agglomeration rule applied 1 times.
Iterating global reduction 6 with 1 rules applied. Total rules applied 140 place count 51 transition count 90
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 141 place count 50 transition count 90
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 7 with 2 rules applied. Total rules applied 143 place count 50 transition count 90
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 7 with 1 rules applied. Total rules applied 144 place count 49 transition count 89
Applied a total of 144 rules in 43 ms. Remains 49 /101 variables (removed 52) and now considering 89/215 (removed 126) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 44 ms. Remains : 49/101 places, 89/215 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=714 ) properties (out of 1) seen :0
Finished probabilistic random walk after 44004 steps, run visited all 1 properties in 64 ms. (steps per millisecond=687 )
Probabilistic random walk after 44004 steps, saw 9521 distinct states, run finished after 64 ms. (steps per millisecond=687 ) properties seen :1
FORMULA CO4-PT-05-ReachabilityCardinality-2024-07 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 1371 ms.
starting LoLA
BK_INPUT CO4-PT-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA CO4-PT-05-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CO4-PT-05-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717368602141

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type EXCL) for 0 CO4-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 50 (type FNDP) for 0 CO4-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 0 CO4-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 0 CO4-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-52.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 52 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-00
lola: result : false
lola: CANCELED task # 50 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 59 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 60 (type EXCL) for CO4-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 86 (type EXCL) for 15 CO4-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 135 (type FNDP) for 45 CO4-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type EQUN) for 45 CO4-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 138 (type SRCH) for 45 CO4-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 122897
lola: tried executions : 194
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 138 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-15
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 135 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 136 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 78 (type FNDP) for 12 CO4-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type EQUN) for 12 CO4-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SRCH) for 12 CO4-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 81 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-04
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 79 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 72 (type FNDP) for 3 CO4-PT-05-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 3 CO4-PT-05-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SRCH) for 3 CO4-PT-05-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-04
lola: result : true
lola: fired transitions : 15
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 97 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-01
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 73 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 105 (type FNDP) for 24 CO4-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type EQUN) for 24 CO4-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SRCH) for 24 CO4-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
lola: FINISHED task # 72 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-01
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 109 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 106 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-08 (obsolete)
lola: LAUNCH task # 122 (type FNDP) for 36 CO4-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type EQUN) for 36 CO4-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SRCH) for 36 CO4-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 105 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 132 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-12
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 122 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 129 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 18 CO4-PT-05-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 18 CO4-PT-05-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 18 CO4-PT-05-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 65 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-06
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 63 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 143 (type FNDP) for 39 CO4-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type EQUN) for 39 CO4-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SRCH) for 39 CO4-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-06
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 122 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-12
lola: result : unknown
lola: fired transitions : 19588
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 106 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-08
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
lola: FINISHED task # 73 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-01
lola: result : false
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
lola: FINISHED task # 146 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-13
lola: result : true
lola: markings : 3392
lola: fired transitions : 7724
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 143 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 144 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 27 CO4-PT-05-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 27 CO4-PT-05-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 27 CO4-PT-05-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 129 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-12
lola: result : false
lola: FINISHED task # 117 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 6
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 108 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 115 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 53 (type FNDP) for 21 CO4-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 21 CO4-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SRCH) for 21 CO4-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-144.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 143 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 4842
lola: tried executions : 4
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 108 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-09
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 53 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-07
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 75 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 48 (type FNDP) for 9 CO4-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 9 CO4-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SRCH) for 9 CO4-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-115.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 68 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-03
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 49 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-03 (obsolete)
lola: LAUNCH task # 123 (type FNDP) for 42 CO4-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 42 CO4-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SRCH) for 42 CO4-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-03
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: FINISHED task # 115 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-09
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 49 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-03
lola: result : true

lola: FINISHED task # 63 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-06
lola: result : true

lola: FINISHED task # 124 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-14
lola: result : false
lola: CANCELED task # 123 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 126 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-14 (obsolete)
lola: LAUNCH task # 112 (type FNDP) for 33 CO4-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 33 CO4-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 33 CO4-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-14
lola: result : unknown
lola: fired transitions : 40276
lola: tried executions : 4
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 120 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-11
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 112 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 113 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-11 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 91 (type FNDP) for 30 CO4-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 30 CO4-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type SRCH) for 30 CO4-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
sara: place or transition ordering is non-deterministic


sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 55 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-07
lola: result : true

lola: FINISHED task # 113 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-11
lola: result : true

lola: FINISHED task # 92 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-10
lola: result : false
lola: CANCELED task # 91 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 101 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 88 (type FNDP) for 6 CO4-PT-05-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 6 CO4-PT-05-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SRCH) for 6 CO4-PT-05-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 52942
lola: tried executions : 725
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 94 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 605
lola: fired transitions : 1496
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 89 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 71 (type FNDP) for 15 CO4-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type EQUN) for 15 CO4-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SRCH) for 15 CO4-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 136 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-15
lola: result : false
lola: FINISHED task # 88 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-02
lola: result : unknown
lola: fired transitions : 2518
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-83.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 86 (type EXCL) for CO4-PT-05-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 53122
lola: fired transitions : 102725
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for CO4-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 83 (type EQUN) for CO4-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 85 (type SRCH) for CO4-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CO4-PT-05-ReachabilityCardinality-2024-00: EF false state equation
CO4-PT-05-ReachabilityCardinality-2024-01: AG true tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-02: EF false tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-03: EF true tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-04: AG false tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-05: EF false tandem / relaxed
CO4-PT-05-ReachabilityCardinality-2024-06: EF true tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-07: EF true findpath
CO4-PT-05-ReachabilityCardinality-2024-08: AG false tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-09: EF true tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-10: EF false state equation
CO4-PT-05-ReachabilityCardinality-2024-11: EF true tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-12: EF false tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-13: AG false tandem / insertion
CO4-PT-05-ReachabilityCardinality-2024-14: EF false state equation
CO4-PT-05-ReachabilityCardinality-2024-15: AG true tandem / insertion


Time elapsed: 2 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is CO4-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r571-tall-171734910100024"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-05.tgz
mv CO4-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;