About the Execution of LTSMin+red for CO4-PT-04
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
299.651 | 4765.00 | 13294.00 | 130.60 | TTTFFFTFFTTFTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r553-tall-171734900700030.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is CO4-PT-04, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r553-tall-171734900700030
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 584K
-rw-r--r-- 1 mcc users 8.0K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 16K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 186K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 53K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-00
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-01
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-02
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-03
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-04
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-05
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-06
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-07
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-08
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-09
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-10
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-11
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-12
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-13
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-14
FORMULA_NAME CO4-PT-04-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717351334228
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CO4-PT-04
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-02 18:02:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-02 18:02:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-02 18:02:15] [INFO ] Load time of PNML (sax parser for PT used): 65 ms
[2024-06-02 18:02:15] [INFO ] Transformed 101 places.
[2024-06-02 18:02:15] [INFO ] Transformed 246 transitions.
[2024-06-02 18:02:15] [INFO ] Found NUPN structural information;
[2024-06-02 18:02:15] [INFO ] Parsed PT model containing 101 places and 246 transitions and 716 arcs in 159 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 23 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 35 transitions
Reduce redundant transitions removed 35 transitions.
FORMULA CO4-PT-04-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-04-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CO4-PT-04-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 40000 steps (11 resets) in 1717 ms. (23 steps per ms) remains 13/13 properties
BEST_FIRST walk for 40003 steps (8 resets) in 572 ms. (69 steps per ms) remains 13/13 properties
BEST_FIRST walk for 40003 steps (8 resets) in 750 ms. (53 steps per ms) remains 13/13 properties
BEST_FIRST walk for 40003 steps (8 resets) in 220 ms. (181 steps per ms) remains 12/13 properties
FORMULA CO4-PT-04-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
BEST_FIRST walk for 40004 steps (8 resets) in 108 ms. (367 steps per ms) remains 11/12 properties
FORMULA CO4-PT-04-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
BEST_FIRST walk for 40001 steps (8 resets) in 205 ms. (194 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40001 steps (8 resets) in 181 ms. (219 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40002 steps (8 resets) in 143 ms. (277 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (9 resets) in 158 ms. (251 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 68 ms. (579 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40003 steps (8 resets) in 155 ms. (256 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 113 ms. (350 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40003 steps (8 resets) in 94 ms. (421 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 80 ms. (493 steps per ms) remains 11/11 properties
[2024-06-02 18:02:17] [INFO ] Flow matrix only has 156 transitions (discarded 55 similar events)
// Phase 1: matrix 156 rows 101 cols
[2024-06-02 18:02:17] [INFO ] Computed 7 invariants in 11 ms
[2024-06-02 18:02:17] [INFO ] State equation strengthened by 12 read => feed constraints.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/97 variables, 97/97 constraints. Problems are: Problem set: 0 solved, 11 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/97 variables, 6/103 constraints. Problems are: Problem set: 0 solved, 11 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/97 variables, 0/103 constraints. Problems are: Problem set: 0 solved, 11 unsolved
Problem CO4-PT-04-ReachabilityCardinality-2024-05 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-05 FALSE TECHNIQUES SMT_REFINEMENT
Problem CO4-PT-04-ReachabilityCardinality-2024-07 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-07 FALSE TECHNIQUES SMT_REFINEMENT
Problem CO4-PT-04-ReachabilityCardinality-2024-11 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-11 FALSE TECHNIQUES SMT_REFINEMENT
At refinement iteration 3 (OVERLAPS) 1/98 variables, 1/104 constraints. Problems are: Problem set: 3 solved, 8 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/98 variables, 1/105 constraints. Problems are: Problem set: 3 solved, 8 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/98 variables, 0/105 constraints. Problems are: Problem set: 3 solved, 8 unsolved
At refinement iteration 6 (OVERLAPS) 155/253 variables, 98/203 constraints. Problems are: Problem set: 3 solved, 8 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/253 variables, 11/214 constraints. Problems are: Problem set: 3 solved, 8 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/253 variables, 0/214 constraints. Problems are: Problem set: 3 solved, 8 unsolved
Problem CO4-PT-04-ReachabilityCardinality-2024-08 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-08 FALSE TECHNIQUES SMT_REFINEMENT
Problem CO4-PT-04-ReachabilityCardinality-2024-14 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-14 FALSE TECHNIQUES SMT_REFINEMENT
At refinement iteration 9 (OVERLAPS) 3/256 variables, 3/217 constraints. Problems are: Problem set: 5 solved, 6 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/256 variables, 3/220 constraints. Problems are: Problem set: 5 solved, 6 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/256 variables, 0/220 constraints. Problems are: Problem set: 5 solved, 6 unsolved
At refinement iteration 12 (OVERLAPS) 1/257 variables, 1/221 constraints. Problems are: Problem set: 5 solved, 6 unsolved
At refinement iteration 13 (INCLUDED_ONLY) 0/257 variables, 0/221 constraints. Problems are: Problem set: 5 solved, 6 unsolved
At refinement iteration 14 (OVERLAPS) 0/257 variables, 0/221 constraints. Problems are: Problem set: 5 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 257/257 variables, and 221 constraints, problems are : Problem set: 5 solved, 6 unsolved in 948 ms.
Refiners :[Domain max(s): 101/101 constraints, Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 101/101 constraints, ReadFeed: 12/12 constraints, PredecessorRefiner: 11/11 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 6 unsolved
Problem CO4-PT-04-ReachabilityCardinality-2024-09 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-09 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 0 (INCLUDED_ONLY) 0/88 variables, 88/88 constraints. Problems are: Problem set: 6 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/88 variables, 4/92 constraints. Problems are: Problem set: 6 solved, 5 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/88 variables, 0/92 constraints. Problems are: Problem set: 6 solved, 5 unsolved
Problem CO4-PT-04-ReachabilityCardinality-2024-06 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-06 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 3 (OVERLAPS) 8/96 variables, 3/95 constraints. Problems are: Problem set: 7 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/96 variables, 8/103 constraints. Problems are: Problem set: 7 solved, 4 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/96 variables, 0/103 constraints. Problems are: Problem set: 7 solved, 4 unsolved
At refinement iteration 6 (OVERLAPS) 154/250 variables, 96/199 constraints. Problems are: Problem set: 7 solved, 4 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/250 variables, 11/210 constraints. Problems are: Problem set: 7 solved, 4 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/250 variables, 0/210 constraints. Problems are: Problem set: 7 solved, 4 unsolved
Problem CO4-PT-04-ReachabilityCardinality-2024-01 is UNSAT
FORMULA CO4-PT-04-ReachabilityCardinality-2024-01 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 9 (OVERLAPS) 6/256 variables, 5/215 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/256 variables, 5/220 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/256 variables, 3/223 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/256 variables, 0/223 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 13 (OVERLAPS) 1/257 variables, 1/224 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/257 variables, 0/224 constraints. Problems are: Problem set: 8 solved, 3 unsolved
At refinement iteration 15 (OVERLAPS) 0/257 variables, 0/224 constraints. Problems are: Problem set: 8 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Int declared 257/257 variables, and 224 constraints, problems are : Problem set: 8 solved, 3 unsolved in 504 ms.
Refiners :[Domain max(s): 101/101 constraints, Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 101/101 constraints, ReadFeed: 12/12 constraints, PredecessorRefiner: 3/11 constraints, Known Traps: 0/0 constraints]
After SMT, in 1602ms problems are : Problem set: 8 solved, 3 unsolved
FORMULA CO4-PT-04-ReachabilityCardinality-2024-12 TRUE TECHNIQUES PARIKH_WALK
FORMULA CO4-PT-04-ReachabilityCardinality-2024-02 TRUE TECHNIQUES PARIKH_WALK
Parikh walk visited 2 properties in 70 ms.
Support contains 30 out of 101 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 101/101 places, 211/211 transitions.
Graph (complete) has 274 edges and 101 vertex of which 100 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Drop transitions (Empty/Sink Transition effects.) removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 0 with 3 rules applied. Total rules applied 4 place count 100 transition count 207
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 6 place count 98 transition count 207
Discarding 25 places :
Symmetric choice reduction at 2 with 25 rule applications. Total rules 31 place count 73 transition count 162
Iterating global reduction 2 with 25 rules applied. Total rules applied 56 place count 73 transition count 162
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 70 place count 73 transition count 148
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 76 place count 70 transition count 145
Drop transitions (Empty/Sink Transition effects.) removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 3 with 15 rules applied. Total rules applied 91 place count 70 transition count 130
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 92 place count 69 transition count 130
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 92 place count 69 transition count 129
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 94 place count 68 transition count 129
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 95 place count 67 transition count 128
Iterating global reduction 5 with 1 rules applied. Total rules applied 96 place count 67 transition count 128
Drop transitions (Redundant composition of simpler transitions.) removed 11 transitions
Redundant transition composition rules discarded 11 transitions
Iterating global reduction 5 with 11 rules applied. Total rules applied 107 place count 67 transition count 117
Free-agglomeration rule applied 3 times.
Iterating global reduction 5 with 3 rules applied. Total rules applied 110 place count 67 transition count 114
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 5 with 3 rules applied. Total rules applied 113 place count 64 transition count 114
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 6 with 2 rules applied. Total rules applied 115 place count 64 transition count 112
Partial Free-agglomeration rule applied 1 times.
Drop transitions (Partial Free agglomeration) removed 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 116 place count 64 transition count 112
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 117 place count 63 transition count 110
Iterating global reduction 6 with 1 rules applied. Total rules applied 118 place count 63 transition count 110
Applied a total of 118 rules in 66 ms. Remains 63 /101 variables (removed 38) and now considering 110/211 (removed 101) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 74 ms. Remains : 63/101 places, 110/211 transitions.
RANDOM walk for 40000 steps (8 resets) in 266 ms. (149 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40003 steps (8 resets) in 203 ms. (196 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 4644 steps, run visited all 1 properties in 21 ms. (steps per millisecond=221 )
Probabilistic random walk after 4644 steps, saw 2009 distinct states, run finished after 24 ms. (steps per millisecond=193 ) properties seen :1
FORMULA CO4-PT-04-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
All properties solved without resorting to model-checking.
Total runtime 3667 ms.
ITS solved all properties within timeout
BK_STOP 1717351338993
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-04"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is CO4-PT-04, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r553-tall-171734900700030"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-04.tgz
mv CO4-PT-04 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;