About the Execution of LoLA for FireWire-PT-18
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 1779424.00 | 0.00 | 0.00 | T???T??????????? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899800306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-18, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899800306
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 8.3K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 10K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.1K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 168K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-00
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-01
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-02
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-03
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-04
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-05
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-06
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-07
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-08
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-09
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-10
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-11
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-12
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-13
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-14
FORMULA_NAME FireWire-PT-18-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717425398155
starting LoLA
BK_EXAMINATION: CTLFireability
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-18-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-18-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717427177579
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 FireWire-PT-18-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for FireWire-PT-18-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9903
[[35mlola[0m][I] fired transitions : 23216
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 FireWire-PT-18-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type FNDP) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 85 (type FNDP) for 20 FireWire-PT-18-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 86 (type EQUN) for 20 FireWire-PT-18-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 86 (type EQUN) for FireWire-PT-18-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 85 (type FNDP) for FireWire-PT-18-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 84 (type EQUN) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type FNDP) for FireWire-PT-18-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 286
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 84 (type EQUN) for FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 81 (type EQUN) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 89 (type EQUN) for FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 91 (type EQUN) for 9 FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 81 (type EQUN) for FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 91 (type EQUN) for FireWire-PT-18-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-04: EF true state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-03: DISJ 0 3 1 0 8 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 4 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-08: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 CTL EXCL 4/179 5/2000 FireWire-PT-18-CTLFireability-2024-11 866696 m, 173339 m/sec, 2330791 t fired, .
[[35mlola[0m][.] 73 EF FNDP 4/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 30667 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-04: EF true state equation[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-03: DISJ 0 3 1 0 8 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 4 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-08: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 CTL EXCL 9/179 9/2000 FireWire-PT-18-CTLFireability-2024-11 1798287 m, 186318 m/sec, 5109761 t fired, .
[[35mlola[0m][.] 73 EF FNDP 9/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 66191 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-04: EF true state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-03: DISJ 0 3 1 0 8 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 4 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-08: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 CTL EXCL 14/179 14/2000 FireWire-PT-18-CTLFireability-2024-11 2724728 m, 185288 m/sec, 7892436 t fired, .
[[35mlola[0m][.] 73 EF FNDP 14/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 101731 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 14
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[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-04: EF true state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-03: DISJ 0 3 1 0 8 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 4 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-08: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 CTL EXCL 19/179 18/2000 FireWire-PT-18-CTLFireability-2024-11 3659047 m, 186863 m/sec, 10663491 t fired, .
[[35mlola[0m][.] 73 EF FNDP 19/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 137236 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-18-CTLFireability-2024-00: CTL true CTL model checker[0m
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[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-03: DISJ 0 3 1 0 8 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 4 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-08: AFAG 0 1 0 0 1 0 0 0
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[[35mlola[0m][.]
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[[35mlola[0m][.] 54 CTL EXCL 159/179 114/2000 FireWire-PT-18-CTLFireability-2024-11 23690802 m, 189931 m/sec, 83758582 t fired, .
[[35mlola[0m][.] 73 EF FNDP 159/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 1124491 attempts, .
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[[35mlola[0m][.] 54 CTL EXCL 164/179 117/2000 FireWire-PT-18-CTLFireability-2024-11 24448496 m, 151538 m/sec, 86370197 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 169/179 120/2000 FireWire-PT-18-CTLFireability-2024-11 25146908 m, 139682 m/sec, 89003363 t fired, .
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[[35mlola[0m][I] result : false
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[[35mlola[0m][.] 57 CTL EXCL 5/212 2/2000 FireWire-PT-18-CTLFireability-2024-12 409985 m, 81997 m/sec, 1793383 t fired, .
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[[35mlola[0m][.] 57 CTL EXCL 50/212 17/2000 FireWire-PT-18-CTLFireability-2024-12 3552781 m, 78629 m/sec, 17603734 t fired, .
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[[35mlola[0m][.] 57 CTL EXCL 185/212 49/2000 FireWire-PT-18-CTLFireability-2024-12 11208446 m, 50849 m/sec, 58101753 t fired, .
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[[35mlola[0m][.] 57 CTL EXCL 190/212 50/2000 FireWire-PT-18-CTLFireability-2024-12 11489323 m, 56175 m/sec, 59375344 t fired, .
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[[35mlola[0m][.] 57 CTL EXCL 200/212 53/2000 FireWire-PT-18-CTLFireability-2024-12 12098222 m, 69987 m/sec, 62254494 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 634/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 4214828 attempts, .
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[[35mlola[0m][.] 77 EF EXCL 15/329 6/2000 FireWire-PT-18-CTLFireability-2024-03 1560746 m, 102436 m/sec, 3448722 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 985/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 6731919 attempts, .
[[35mlola[0m][.] 77 EF EXCL 20/329 8/2000 FireWire-PT-18-CTLFireability-2024-03 2082443 m, 104339 m/sec, 4451225 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 25/329 9/2000 FireWire-PT-18-CTLFireability-2024-03 2596781 m, 102867 m/sec, 5505811 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 30/329 11/2000 FireWire-PT-18-CTLFireability-2024-03 3108387 m, 102321 m/sec, 6555676 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 35/329 13/2000 FireWire-PT-18-CTLFireability-2024-03 3644343 m, 107191 m/sec, 7449548 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 40/329 15/2000 FireWire-PT-18-CTLFireability-2024-03 4177482 m, 106627 m/sec, 8345046 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 45/329 17/2000 FireWire-PT-18-CTLFireability-2024-03 4706615 m, 105826 m/sec, 9239861 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 50/329 19/2000 FireWire-PT-18-CTLFireability-2024-03 5229896 m, 104656 m/sec, 10301303 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 55/329 20/2000 FireWire-PT-18-CTLFireability-2024-03 5739130 m, 101846 m/sec, 11458595 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 60/329 22/2000 FireWire-PT-18-CTLFireability-2024-03 6232161 m, 98606 m/sec, 12597530 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 65/329 24/2000 FireWire-PT-18-CTLFireability-2024-03 6744360 m, 102439 m/sec, 13607031 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 70/329 26/2000 FireWire-PT-18-CTLFireability-2024-03 7257856 m, 102699 m/sec, 14622314 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 75/329 27/2000 FireWire-PT-18-CTLFireability-2024-03 7780225 m, 104473 m/sec, 15723830 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 80/329 29/2000 FireWire-PT-18-CTLFireability-2024-03 8276520 m, 99259 m/sec, 16847288 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 85/329 30/2000 FireWire-PT-18-CTLFireability-2024-03 8611224 m, 66940 m/sec, 17670857 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 95/329 32/2000 FireWire-PT-18-CTLFireability-2024-03 9132529 m, 51148 m/sec, 18626875 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 1065/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 7264209 attempts, .
[[35mlola[0m][.] 77 EF EXCL 100/329 34/2000 FireWire-PT-18-CTLFireability-2024-03 9616352 m, 96764 m/sec, 19605859 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 105/329 35/2000 FireWire-PT-18-CTLFireability-2024-03 10126726 m, 102074 m/sec, 20622845 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 110/329 37/2000 FireWire-PT-18-CTLFireability-2024-03 10572848 m, 89224 m/sec, 21632938 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 115/329 39/2000 FireWire-PT-18-CTLFireability-2024-03 11091064 m, 103643 m/sec, 22671853 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 120/329 41/2000 FireWire-PT-18-CTLFireability-2024-03 11605072 m, 102801 m/sec, 23683542 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 125/329 42/2000 FireWire-PT-18-CTLFireability-2024-03 12128260 m, 104637 m/sec, 24781511 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 140/329 48/2000 FireWire-PT-18-CTLFireability-2024-03 13685098 m, 101167 m/sec, 28015416 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 145/329 50/2000 FireWire-PT-18-CTLFireability-2024-03 14196232 m, 102226 m/sec, 29113331 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 150/329 51/2000 FireWire-PT-18-CTLFireability-2024-03 14710234 m, 102800 m/sec, 30127107 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 155/329 53/2000 FireWire-PT-18-CTLFireability-2024-03 15217811 m, 101515 m/sec, 31171393 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 160/329 55/2000 FireWire-PT-18-CTLFireability-2024-03 15711693 m, 98776 m/sec, 32221304 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 165/329 56/2000 FireWire-PT-18-CTLFireability-2024-03 16224088 m, 102479 m/sec, 33238086 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 170/329 58/2000 FireWire-PT-18-CTLFireability-2024-03 16719776 m, 99137 m/sec, 34297861 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 1150/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 7877866 attempts, .
[[35mlola[0m][.] 77 EF EXCL 185/329 63/2000 FireWire-PT-18-CTLFireability-2024-03 18266358 m, 100828 m/sec, 37469332 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 190/329 65/2000 FireWire-PT-18-CTLFireability-2024-03 18761248 m, 98978 m/sec, 38656581 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 195/329 67/2000 FireWire-PT-18-CTLFireability-2024-03 19268063 m, 101363 m/sec, 39675719 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 200/329 69/2000 FireWire-PT-18-CTLFireability-2024-03 19762342 m, 98855 m/sec, 40684319 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 205/329 70/2000 FireWire-PT-18-CTLFireability-2024-03 20277887 m, 103109 m/sec, 41793910 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 210/329 72/2000 FireWire-PT-18-CTLFireability-2024-03 20780974 m, 100617 m/sec, 42856927 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 220/329 76/2000 FireWire-PT-18-CTLFireability-2024-03 21783810 m, 99006 m/sec, 45017915 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 225/329 77/2000 FireWire-PT-18-CTLFireability-2024-03 22276631 m, 98564 m/sec, 46048670 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 1195/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 8200840 attempts, .
[[35mlola[0m][.] 77 EF EXCL 230/329 79/2000 FireWire-PT-18-CTLFireability-2024-03 22771061 m, 98886 m/sec, 46955097 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 1200/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 8236044 attempts, .
[[35mlola[0m][.] 77 EF EXCL 235/329 81/2000 FireWire-PT-18-CTLFireability-2024-03 23251453 m, 96078 m/sec, 48068630 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 240/329 82/2000 FireWire-PT-18-CTLFireability-2024-03 23747700 m, 99249 m/sec, 48971441 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 245/329 84/2000 FireWire-PT-18-CTLFireability-2024-03 24259652 m, 102390 m/sec, 49928492 t fired, .
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[[35mlola[0m][.] 77 EF EXCL 250/329 86/2000 FireWire-PT-18-CTLFireability-2024-03 24771366 m, 102342 m/sec, 50983921 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] 73 EF FNDP 1235/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 8487154 attempts, .
[[35mlola[0m][.] 77 EF EXCL 270/329 93/2000 FireWire-PT-18-CTLFireability-2024-03 26749382 m, 102302 m/sec, 55563046 t fired, .
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[[35mlola[0m][.] 73 EF FNDP 1240/3597 0/5 FireWire-PT-18-CTLFireability-2024-03 8523125 attempts, .
[[35mlola[0m][.] 77 EF EXCL 275/329 94/2000 FireWire-PT-18-CTLFireability-2024-03 27253367 m, 100797 m/sec, 56620240 t fired, .
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[[35mlola[0m][I] result : true
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[[35mlola[0m][W] CANCELED task # 73 (type FNDP) for FireWire-PT-18-CTLFireability-2024-03 (obsolete)
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 FireWire-PT-18-CTLFireability-2024-08
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[[35mlola[0m][I] result : unknown
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[[35mlola[0m][.] 45 CTL EXCL 3/471 3/2000 FireWire-PT-18-CTLFireability-2024-08 530805 m, 106161 m/sec, 1963604 t fired, .
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[[35mlola[0m][.] 45 CTL EXCL 8/471 7/2000 FireWire-PT-18-CTLFireability-2024-08 1518854 m, 197609 m/sec, 6586439 t fired, .
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[[35mlola[0m][.] 45 CTL EXCL 13/471 11/2000 FireWire-PT-18-CTLFireability-2024-08 2434230 m, 183075 m/sec, 11141153 t fired, .
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[[35mlola[0m][.] 45 CTL EXCL 18/471 15/2000 FireWire-PT-18-CTLFireability-2024-08 3368955 m, 186945 m/sec, 15588485 t fired, .
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[[35mlola[0m][.] 45 CTL EXCL 23/471 20/2000 FireWire-PT-18-CTLFireability-2024-08 4479955 m, 222200 m/sec, 19986364 t fired, .
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5257097
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[[35mlola[0m][.] 7 CTL EXCL 2/582 2/2000 FireWire-PT-18-CTLFireability-2024-02 417514 m, 83502 m/sec, 1923266 t fired, .
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[[35mlola[0m][.] 7 CTL EXCL 7/582 6/2000 FireWire-PT-18-CTLFireability-2024-02 1295423 m, 175581 m/sec, 6629128 t fired, .
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[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-07: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FireWire-PT-18-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 7 CTL EXCL 507/582 306/2000 FireWire-PT-18-CTLFireability-2024-02 72264684 m, 1541 m/sec, 410912130 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 57: 408 Killed $BK_TOOL --conf=$LOLA_CONF $LOLA_EXAM $LOLA_VERDICT $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-18"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-18, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899800306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-18.tgz
mv FireWire-PT-18 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;