About the Execution of LoLA for FireWire-PT-17
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.735 | 1133067.00 | 1766520.00 | 3795.80 | F???FF?F??F????F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899800300.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-17, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899800300
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 7.8K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 7.8K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 153K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-17-LTLFireability-00
FORMULA_NAME FireWire-PT-17-LTLFireability-01
FORMULA_NAME FireWire-PT-17-LTLFireability-02
FORMULA_NAME FireWire-PT-17-LTLFireability-03
FORMULA_NAME FireWire-PT-17-LTLFireability-04
FORMULA_NAME FireWire-PT-17-LTLFireability-05
FORMULA_NAME FireWire-PT-17-LTLFireability-06
FORMULA_NAME FireWire-PT-17-LTLFireability-07
FORMULA_NAME FireWire-PT-17-LTLFireability-08
FORMULA_NAME FireWire-PT-17-LTLFireability-09
FORMULA_NAME FireWire-PT-17-LTLFireability-10
FORMULA_NAME FireWire-PT-17-LTLFireability-11
FORMULA_NAME FireWire-PT-17-LTLFireability-12
FORMULA_NAME FireWire-PT-17-LTLFireability-13
FORMULA_NAME FireWire-PT-17-LTLFireability-14
FORMULA_NAME FireWire-PT-17-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717423771079
starting LoLA
BK_EXAMINATION: LTLFireability
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-17-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-17-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-17-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-17-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-17-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-17-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717424904146
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 23 FireWire-PT-17-LTLFireability-05
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 24 (type EXCL) for FireWire-PT-17-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 13
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 61 (type EXCL) for 0 FireWire-PT-17-LTLFireability-00
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 0 FireWire-PT-17-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type EXCL) for FireWire-PT-17-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 15
[[35mlola[0m][I] fired transitions : 15
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for FireWire-PT-17-LTLFireability-00 (obsolete)
[[35mlola[0m][I] LAUNCH task # 43 (type CNST) for 42 FireWire-PT-17-LTLFireability-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 43 (type CNST) for FireWire-PT-17-LTLFireability-10
[[35mlola[0m][I] result : false
[*** LOG ERROR #0001 ***] [2024-06-03 14:09:32] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 30 (type EXCL) for 29 FireWire-PT-17-LTLFireability-07
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 30 (type EXCL) for FireWire-PT-17-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 FireWire-PT-17-LTLFireability-15
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for FireWire-PT-17-LTLFireability-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for FireWire-PT-17-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 FireWire-PT-17-LTLFireability-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type FNDP) for 26 FireWire-PT-17-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 26 FireWire-PT-17-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type FNDP) for 16 FireWire-PT-17-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type FNDP) for FireWire-PT-17-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for FireWire-PT-17-LTLFireability-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for FireWire-PT-17-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 40004
[[35mlola[0m][I] fired transitions : 124861
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 FireWire-PT-17-LTLFireability-12
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for FireWire-PT-17-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 FireWire-PT-17-LTLFireability-11
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for FireWire-PT-17-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 92861
[[35mlola[0m][I] fired transitions : 286939
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 FireWire-PT-17-LTLFireability-09
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for FireWire-PT-17-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 32 FireWire-PT-17-LTLFireability-08
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for FireWire-PT-17-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 FireWire-PT-17-LTLFireability-03
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for FireWire-PT-17-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 FireWire-PT-17-LTLFireability-02
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-00: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-04: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-17-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-06: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 4/899 4/2000 FireWire-PT-17-LTLFireability-02 560886 m, 112177 m/sec, 2000663 t fired, .
[[35mlola[0m][.] 66 EF FNDP 5/3599 0/5 FireWire-PT-17-LTLFireability-06 43436 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-00: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-04: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-17-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-06: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 9/899 9/2000 FireWire-PT-17-LTLFireability-02 1177632 m, 123349 m/sec, 4607848 t fired, .
[[35mlola[0m][.] 66 EF FNDP 10/3599 0/5 FireWire-PT-17-LTLFireability-06 91041 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-00: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-04: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-17-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-06: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 14/899 13/2000 FireWire-PT-17-LTLFireability-02 1773238 m, 119121 m/sec, 7175048 t fired, .
[[35mlola[0m][.] 66 EF FNDP 15/3599 0/5 FireWire-PT-17-LTLFireability-06 139479 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-00: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-04: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-17-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-17-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 57: 408 Killed $BK_TOOL --conf=$LOLA_CONF $LOLA_EXAM $LOLA_VERDICT $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-17"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-17, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899800300"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-17.tgz
mv FireWire-PT-17 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;