About the Execution of LoLA for FireWire-PT-17
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16195.955 | 2656195.00 | 2901538.00 | 7024.90 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899800298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-17, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899800298
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 7.8K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 7.8K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 153K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-00
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-01
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-02
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-03
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-04
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-05
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-06
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-07
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-08
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-09
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-10
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-11
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-12
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-13
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-14
FORMULA_NAME FireWire-PT-17-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717423006194
starting LoLA
BK_EXAMINATION: CTLFireability
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
BK_STOP 1717425662389
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 23 FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type FNDP) for 13 FireWire-PT-17-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 13 FireWire-PT-17-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type FNDP) for 23 FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type FNDP) for FireWire-PT-17-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 58 (type EQUN) for FireWire-PT-17-CTLFireability-2024-03 (obsolete)
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 23 FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for FireWire-PT-17-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-03: DISJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 4/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 40426 attempts, .
[[35mlola[0m][.] 62 EF EXCL 4/211 3/2000 FireWire-PT-17-CTLFireability-2024-05 590366 m, 118073 m/sec, 1604744 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-03: DISJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 9/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 87306 attempts, .
[[35mlola[0m][.] 62 EF EXCL 9/211 4/2000 FireWire-PT-17-CTLFireability-2024-05 1133924 m, 108711 m/sec, 3435890 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-03: DISJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 14/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 134723 attempts, .
[[35mlola[0m][.] 62 EF EXCL 14/211 6/2000 FireWire-PT-17-CTLFireability-2024-05 1670795 m, 107374 m/sec, 5223147 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-03: DISJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 19/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 182595 attempts, .
[[35mlola[0m][.] 62 EF EXCL 19/211 8/2000 FireWire-PT-17-CTLFireability-2024-05 2247007 m, 115242 m/sec, 6808777 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-03: DISJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 24/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 230569 attempts, .
[[35mlola[0m][.] 62 EF EXCL 24/211 10/2000 FireWire-PT-17-CTLFireability-2024-05 2776026 m, 105803 m/sec, 8665230 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-05: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 EF FNDP 29/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 278481 attempts, .
[[35mlola[0m][.] 62 EF EXCL 29/211 12/2000 FireWire-PT-17-CTLFireability-2024-05 3276056 m, 100006 m/sec, 10685867 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-02: DISJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 60 EF FNDP 34/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 326104 attempts, .
[[35mlola[0m][.] 62 EF EXCL 34/211 14/2000 FireWire-PT-17-CTLFireability-2024-05 3824674 m, 109723 m/sec, 12522235 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 39/211 16/2000 FireWire-PT-17-CTLFireability-2024-05 4364350 m, 107935 m/sec, 14386821 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 44/211 17/2000 FireWire-PT-17-CTLFireability-2024-05 4902482 m, 107626 m/sec, 16245674 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 49/211 19/2000 FireWire-PT-17-CTLFireability-2024-05 5423531 m, 104209 m/sec, 18115741 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 54/211 21/2000 FireWire-PT-17-CTLFireability-2024-05 5944319 m, 104157 m/sec, 19997464 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 59/211 23/2000 FireWire-PT-17-CTLFireability-2024-05 6467651 m, 104666 m/sec, 21883140 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 79/211 30/2000 FireWire-PT-17-CTLFireability-2024-05 8700474 m, 112214 m/sec, 28467965 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 84/211 32/2000 FireWire-PT-17-CTLFireability-2024-05 9261373 m, 112179 m/sec, 30049663 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 124/211 47/2000 FireWire-PT-17-CTLFireability-2024-05 13522049 m, 99283 m/sec, 43112874 t fired, .
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[[35mlola[0m][.] 62 EF EXCL 129/211 49/2000 FireWire-PT-17-CTLFireability-2024-05 13989055 m, 93401 m/sec, 45056109 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 169/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1619044 attempts, .
[[35mlola[0m][.] 62 EF EXCL 169/211 63/2000 FireWire-PT-17-CTLFireability-2024-05 18066592 m, 105883 m/sec, 58941668 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 174/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1667016 attempts, .
[[35mlola[0m][.] 62 EF EXCL 174/211 64/2000 FireWire-PT-17-CTLFireability-2024-05 18610371 m, 108755 m/sec, 60554759 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 179/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1715124 attempts, .
[[35mlola[0m][.] 62 EF EXCL 179/211 66/2000 FireWire-PT-17-CTLFireability-2024-05 19157707 m, 109467 m/sec, 62117544 t fired, .
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[[35mlola[0m][.] FireWire-PT-17-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 60 EF FNDP 184/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1763130 attempts, .
[[35mlola[0m][.] 62 EF EXCL 184/211 68/2000 FireWire-PT-17-CTLFireability-2024-05 19697973 m, 108053 m/sec, 63733051 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 189/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1811207 attempts, .
[[35mlola[0m][.] 62 EF EXCL 189/211 70/2000 FireWire-PT-17-CTLFireability-2024-05 20240313 m, 108468 m/sec, 65334491 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 194/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1859229 attempts, .
[[35mlola[0m][.] 62 EF EXCL 194/211 72/2000 FireWire-PT-17-CTLFireability-2024-05 20786997 m, 109336 m/sec, 66904206 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 199/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1907121 attempts, .
[[35mlola[0m][.] 62 EF EXCL 199/211 74/2000 FireWire-PT-17-CTLFireability-2024-05 21326521 m, 107904 m/sec, 68481824 t fired, .
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[[35mlola[0m][.] 60 EF FNDP 204/3596 0/5 FireWire-PT-17-CTLFireability-2024-05 1954961 attempts, .
[[35mlola[0m][.] 62 EF EXCL 204/211 76/2000 FireWire-PT-17-CTLFireability-2024-05 21896129 m, 113921 m/sec, 70030121 t fired, .
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[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 22479356
[[35mlola[0m][I] fired transitions : 71434954
[[35mlola[0m][I] time used : 209
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[[35mlola[0m][W] CANCELED task # 60 (type FNDP) for FireWire-PT-17-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 FireWire-PT-17-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 211 sec
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[[35mlola[0m][I] FINISHED task # 60 (type FNDP) for FireWire-PT-17-CTLFireability-2024-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 2002252
[[35mlola[0m][I] time used : 209
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for FireWire-PT-17-CTLFireability-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 369
[[35mlola[0m][I] fired transitions : 477
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 FireWire-PT-17-CTLFireability-2024-14
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[[35mlola[0m][.] 51 CTL EXCL 0/225 1/2000 FireWire-PT-17-CTLFireability-2024-14 7854 m, 1570 m/sec, 34570 t fired, .
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[[35mlola[0m][I] FINISHED task # 30 (type EXCL) for FireWire-PT-17-CTLFireability-2024-07
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-17"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-17, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899800298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-17.tgz
mv FireWire-PT-17 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;