MCC'2024- Execution of r551-tall-171734899800291

About the Execution of LoLA for FireWire-PT-16

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
888.684	31137.00	31903.00	97.80	FFTFFFFFTTTFFFFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899800291.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-16, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899800291
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 8.1K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.3K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 113K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 84K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-16-LTLCardinality-00
FORMULA_NAME FireWire-PT-16-LTLCardinality-01
FORMULA_NAME FireWire-PT-16-LTLCardinality-02
FORMULA_NAME FireWire-PT-16-LTLCardinality-03
FORMULA_NAME FireWire-PT-16-LTLCardinality-04
FORMULA_NAME FireWire-PT-16-LTLCardinality-05
FORMULA_NAME FireWire-PT-16-LTLCardinality-06
FORMULA_NAME FireWire-PT-16-LTLCardinality-07
FORMULA_NAME FireWire-PT-16-LTLCardinality-08
FORMULA_NAME FireWire-PT-16-LTLCardinality-09
FORMULA_NAME FireWire-PT-16-LTLCardinality-10
FORMULA_NAME FireWire-PT-16-LTLCardinality-11
FORMULA_NAME FireWire-PT-16-LTLCardinality-12
FORMULA_NAME FireWire-PT-16-LTLCardinality-13
FORMULA_NAME FireWire-PT-16-LTLCardinality-14
FORMULA_NAME FireWire-PT-16-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717422914110

starting LoLA
BK_EXAMINATION: LTLCardinality
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-16-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-16-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-16-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-16-LTLCardinality-08: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-16-LTLCardinality-09: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-16-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-12: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-16-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 31 secs. Pages in use: 28

BK_STOP 1717422945247

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 FireWire-PT-16-LTLCardinality-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for FireWire-PT-16-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 FireWire-PT-16-LTLCardinality-11
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for FireWire-PT-16-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 187
[[35mlola[0m][I] fired transitions : 272
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 FireWire-PT-16-LTLCardinality-13
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 FireWire-PT-16-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for FireWire-PT-16-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1901
[[35mlola[0m][I] fired transitions : 3644
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 FireWire-PT-16-LTLCardinality-14
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for FireWire-PT-16-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for FireWire-PT-16-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 46435
[[35mlola[0m][I] fired transitions : 143507
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 36 FireWire-PT-16-LTLCardinality-12
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for FireWire-PT-16-LTLCardinality-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 FireWire-PT-16-LTLCardinality-10
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for FireWire-PT-16-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 FireWire-PT-16-LTLCardinality-09
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for FireWire-PT-16-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 FireWire-PT-16-LTLCardinality-08
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for FireWire-PT-16-LTLCardinality-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 FireWire-PT-16-LTLCardinality-07
[[35mlola[0m][I] time limit : 513 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for FireWire-PT-16-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 FireWire-PT-16-LTLCardinality-05
[[35mlola[0m][I] time limit : 598 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-08: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 5/598 7/2000 FireWire-PT-16-LTLCardinality-05 981150 m, 196230 m/sec, 3693196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-08: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 10/598 14/2000 FireWire-PT-16-LTLCardinality-05 1875148 m, 178799 m/sec, 7659547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-08: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-16-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 15/598 20/2000 FireWire-PT-16-LTLCardinality-05 2779663 m, 180903 m/sec, 11589163 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
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[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-00: INITIAL false preprocessing[0m
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[[35mlola[0m][.] [1m[31mFireWire-PT-16-LTLCardinality-07: LTL false LTL model checker[0m
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[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-16-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 16 LTL EXCL 20/598 26/2000 FireWire-PT-16-LTLCardinality-05 3569097 m, 157886 m/sec, 15333580 t fired, .
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3977999
[[35mlola[0m][I] fired transitions : 17561301
[[35mlola[0m][I] time used : 23
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[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 FireWire-PT-16-LTLCardinality-02
[[35mlola[0m][I] time limit : 713 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for FireWire-PT-16-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 FireWire-PT-16-LTLCardinality-01
[[35mlola[0m][I] time limit : 892 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for FireWire-PT-16-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 FireWire-PT-16-LTLCardinality-15
[[35mlola[0m][I] time limit : 1189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for FireWire-PT-16-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 305
[[35mlola[0m][I] fired transitions : 502
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 FireWire-PT-16-LTLCardinality-03
[[35mlola[0m][I] time limit : 1784 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for FireWire-PT-16-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 632
[[35mlola[0m][I] fired transitions : 1087
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 FireWire-PT-16-LTLCardinality-06
[[35mlola[0m][I] time limit : 3569 sec
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[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for FireWire-PT-16-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 345
[[35mlola[0m][I] fired transitions : 562
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-16"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-16, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899800291"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-16.tgz
mv FireWire-PT-16 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;