About the Execution of LoLA for FireWire-PT-12
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5757.896 | 3600000.00 | 302816.00 | 11608.80 | ??F?F??TT??????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899700259.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-12, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899700259
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 6.7K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 108K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 125K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-12-LTLCardinality-00
FORMULA_NAME FireWire-PT-12-LTLCardinality-01
FORMULA_NAME FireWire-PT-12-LTLCardinality-02
FORMULA_NAME FireWire-PT-12-LTLCardinality-03
FORMULA_NAME FireWire-PT-12-LTLCardinality-04
FORMULA_NAME FireWire-PT-12-LTLCardinality-05
FORMULA_NAME FireWire-PT-12-LTLCardinality-06
FORMULA_NAME FireWire-PT-12-LTLCardinality-07
FORMULA_NAME FireWire-PT-12-LTLCardinality-08
FORMULA_NAME FireWire-PT-12-LTLCardinality-09
FORMULA_NAME FireWire-PT-12-LTLCardinality-10
FORMULA_NAME FireWire-PT-12-LTLCardinality-11
FORMULA_NAME FireWire-PT-12-LTLCardinality-12
FORMULA_NAME FireWire-PT-12-LTLCardinality-13
FORMULA_NAME FireWire-PT-12-LTLCardinality-14
FORMULA_NAME FireWire-PT-12-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717416999128
starting LoLA
BK_EXAMINATION: LTLCardinality
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-12-LTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-12-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-12-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-12-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 26 (type CNST) for 25 FireWire-PT-12-LTLCardinality-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 26 (type CNST) for FireWire-PT-12-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 FireWire-PT-12-LTLCardinality-02
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for FireWire-PT-12-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 FireWire-PT-12-LTLCardinality-08
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for FireWire-PT-12-LTLCardinality-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 FireWire-PT-12-LTLCardinality-04
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for FireWire-PT-12-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1503
[[35mlola[0m][I] fired transitions : 2969
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 FireWire-PT-12-LTLCardinality-01
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 15 FireWire-PT-12-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for FireWire-PT-12-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 5/256 6/2000 FireWire-PT-12-LTLCardinality-01 857071 m, 171414 m/sec, 3892314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 10/256 12/2000 FireWire-PT-12-LTLCardinality-01 1690168 m, 166619 m/sec, 7888078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 15/256 18/2000 FireWire-PT-12-LTLCardinality-01 2626350 m, 187236 m/sec, 11667591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 20/256 25/2000 FireWire-PT-12-LTLCardinality-01 3601251 m, 194980 m/sec, 15390957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 25/256 30/2000 FireWire-PT-12-LTLCardinality-01 4432408 m, 166231 m/sec, 18610836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-12-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-12-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-05: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-12-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 FireWire-PT-12-LTLCardinality-14
[[35mlola[0m][I] time limit : 277 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for FireWire-PT-12-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 FireWire-PT-12-LTLCardinality-13
[[35mlola[0m][I] time limit : 302 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for FireWire-PT-12-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 FireWire-PT-12-LTLCardinality-11
[[35mlola[0m][I] time limit : 333 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for FireWire-PT-12-LTLCardinality-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 34 FireWire-PT-12-LTLCardinality-10
[[35mlola[0m][I] time limit : 370 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for FireWire-PT-12-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 34 FireWire-PT-12-LTLCardinality-10
[[35mlola[0m][I] time limit : 416 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for FireWire-PT-12-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 FireWire-PT-12-LTLCardinality-06
[[35mlola[0m][I] time limit : 475 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for FireWire-PT-12-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 15 FireWire-PT-12-LTLCardinality-05
[[35mlola[0m][I] time limit : 555 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 18 (type EXCL) for FireWire-PT-12-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
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[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 FireWire-PT-12-LTLCardinality-03
[[35mlola[0m][I] time limit : 832 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for FireWire-PT-12-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 FireWire-PT-12-LTLCardinality-00
[[35mlola[0m][I] time limit : 1110 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for FireWire-PT-12-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 FireWire-PT-12-LTLCardinality-09
[[35mlola[0m][I] time limit : 1665 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for FireWire-PT-12-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 FireWire-PT-12-LTLCardinality-12
[[35mlola[0m][I] time limit : 3330 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for FireWire-PT-12-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-12"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-12, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899700259"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-12.tgz
mv FireWire-PT-12 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;