About the Execution of LoLA for FireWire-PT-07
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
958.432 | 36801.00 | 55890.00 | 202.40 | FFFFTFFTFTTFFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899600219.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-07, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899600219
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 8.3K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 8.9K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 97K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-07-LTLCardinality-00
FORMULA_NAME FireWire-PT-07-LTLCardinality-01
FORMULA_NAME FireWire-PT-07-LTLCardinality-02
FORMULA_NAME FireWire-PT-07-LTLCardinality-03
FORMULA_NAME FireWire-PT-07-LTLCardinality-04
FORMULA_NAME FireWire-PT-07-LTLCardinality-05
FORMULA_NAME FireWire-PT-07-LTLCardinality-06
FORMULA_NAME FireWire-PT-07-LTLCardinality-07
FORMULA_NAME FireWire-PT-07-LTLCardinality-08
FORMULA_NAME FireWire-PT-07-LTLCardinality-09
FORMULA_NAME FireWire-PT-07-LTLCardinality-10
FORMULA_NAME FireWire-PT-07-LTLCardinality-11
FORMULA_NAME FireWire-PT-07-LTLCardinality-12
FORMULA_NAME FireWire-PT-07-LTLCardinality-13
FORMULA_NAME FireWire-PT-07-LTLCardinality-14
FORMULA_NAME FireWire-PT-07-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717415583183
starting LoLA
BK_EXAMINATION: LTLCardinality
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-07-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-07-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-04: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-07: CONJ true CONJ[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-09: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 36 secs. Pages in use: 20
BK_STOP 1717415619984
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 47 (type CNST) for 46 FireWire-PT-07-LTLCardinality-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 59 (type CNST) for 58 FireWire-PT-07-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 59 (type CNST) for FireWire-PT-07-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 47 (type CNST) for FireWire-PT-07-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 FireWire-PT-07-LTLCardinality-00
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 39 FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 29 FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type FNDP) for 19 FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 19 FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 3 (type EXCL) for FireWire-PT-07-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 15819
[[35mlola[0m][I] fired transitions : 44498
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 FireWire-PT-07-LTLCardinality-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for FireWire-PT-07-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 FireWire-PT-07-LTLCardinality-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for FireWire-PT-07-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 FireWire-PT-07-LTLCardinality-12
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for FireWire-PT-07-LTLCardinality-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 FireWire-PT-07-LTLCardinality-11
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-05: CONJ 0 2 1 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 LTL EXCL 4/276 8/2000 FireWire-PT-07-LTLCardinality-11 1063024 m, 212604 m/sec, 4767921 t fired, .
[[35mlola[0m][.] 75 EF FNDP 5/3595 0/5 FireWire-PT-07-LTLCardinality-05 13814 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-05: CONJ 0 2 1 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 LTL EXCL 9/276 13/2000 FireWire-PT-07-LTLCardinality-11 1840087 m, 155412 m/sec, 9599457 t fired, .
[[35mlola[0m][.] 75 EF FNDP 10/3595 0/5 FireWire-PT-07-LTLCardinality-05 28454 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-05: CONJ 0 2 1 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 LTL EXCL 14/276 19/2000 FireWire-PT-07-LTLCardinality-11 2824882 m, 196959 m/sec, 14176199 t fired, .
[[35mlola[0m][.] 75 EF FNDP 15/3595 0/5 FireWire-PT-07-LTLCardinality-05 43109 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for FireWire-PT-07-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2952608
[[35mlola[0m][I] fired transitions : 15208194
[[35mlola[0m][I] time used : 15
[[35mlola[0m][I] memory pages used : 20
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 39 FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 FireWire-PT-07-LTLCardinality-08
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for FireWire-PT-07-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 29 FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] time limit : 357 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 19 FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] time limit : 397 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 FireWire-PT-07-LTLCardinality-04
[[35mlola[0m][I] time limit : 447 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for FireWire-PT-07-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 FireWire-PT-07-LTLCardinality-03
[[35mlola[0m][I] time limit : 511 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for FireWire-PT-07-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 FireWire-PT-07-LTLCardinality-02
[[35mlola[0m][I] time limit : 596 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for FireWire-PT-07-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 85
[[35mlola[0m][I] fired transitions : 148
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 FireWire-PT-07-LTLCardinality-01
[[35mlola[0m][I] time limit : 715 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 75 (type FNDP) for FireWire-PT-07-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 52231
[[35mlola[0m][I] time used : 18
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-04: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 4/894 7/2000 FireWire-PT-07-LTLCardinality-01 981301 m, 196260 m/sec, 4327743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-04: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 9/894 12/2000 FireWire-PT-07-LTLCardinality-01 1825476 m, 168835 m/sec, 9408323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-04: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-07-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-07-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-07: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] FireWire-PT-07-LTLCardinality-09: CONJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 14/894 19/2000 FireWire-PT-07-LTLCardinality-01 2823576 m, 199620 m/sec, 14161576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for FireWire-PT-07-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2952497
[[35mlola[0m][I] fired transitions : 15207913
[[35mlola[0m][I] time used : 15
[[35mlola[0m][I] memory pages used : 20
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 29 FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] time limit : 1188 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for FireWire-PT-07-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 39 FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] time limit : 1782 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for FireWire-PT-07-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 27 (type EXCL) for 26 FireWire-PT-07-LTLCardinality-06
[[35mlola[0m][I] time limit : 3564 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 27 (type EXCL) for FireWire-PT-07-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 75
[[35mlola[0m][I] fired transitions : 133
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-07"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-07, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899600219"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-07.tgz
mv FireWire-PT-07 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;