About the Execution of LoLA for FireWire-PT-06
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1101.796 | 85879.00 | 92427.00 | 340.50 | TTFTTFTTTFFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899600209.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-06, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899600209
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 6.8K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.9K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 109K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 90K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-00
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-01
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-02
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-03
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-04
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-05
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-06
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-07
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-08
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-09
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-10
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-11
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-12
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-13
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-14
FORMULA_NAME FireWire-PT-06-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717415429140
starting LoLA
BK_EXAMINATION: CTLCardinality
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-06-CTLCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-06-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-02: DISJ false DISJ[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-12: CONJ false tscc_search[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 85 secs. Pages in use: 19
BK_STOP 1717415515019
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 17 (type CNST) for 16 FireWire-PT-06-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 17 (type CNST) for FireWire-PT-06-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 FireWire-PT-06-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EQUN) for 50 FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 50 FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 72 (type FNDP) for 50 FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 84 (type EQUN) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 87 (type EQUN) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 87 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 50 FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 2 0 0 6 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-14: CONJ 0 2 1 0 5 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-15: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 4/189 6/2000 FireWire-PT-06-CTLCardinality-2024-13 1225963 m, 245192 m/sec, 5330118 t fired, .
[[35mlola[0m][.] 72 EF FNDP 4/3591 0/5 FireWire-PT-06-CTLCardinality-2024-14 50377 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 72 (type FNDP) for FireWire-PT-06-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 50947
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1516067
[[35mlola[0m][I] fired transitions : 6582770
[[35mlola[0m][I] time used : 6
[[35mlola[0m][I] memory pages used : 7
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 57 FireWire-PT-06-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 57 FireWire-PT-06-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 FireWire-PT-06-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 73
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 FireWire-PT-06-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 305446
[[35mlola[0m][I] fired transitions : 2873017
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 FireWire-PT-06-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 FireWire-PT-06-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 64
[[35mlola[0m][I] fired transitions : 122
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 FireWire-PT-06-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 2 0 0 6 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 1/358 1/2000 FireWire-PT-06-CTLCardinality-2024-06 176730 m, 35346 m/sec, 1068955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 2 0 0 6 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 6/358 5/2000 FireWire-PT-06-CTLCardinality-2024-06 952293 m, 155112 m/sec, 5692512 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
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[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 2 0 0 6 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 11/358 8/2000 FireWire-PT-06-CTLCardinality-2024-06 1690649 m, 147671 m/sec, 10028151 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1873366
[[35mlola[0m][I] fired transitions : 11258819
[[35mlola[0m][I] time used : 13
[[35mlola[0m][I] memory pages used : 9
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 FireWire-PT-06-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 396 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 9 (type EXCL) for 6 FireWire-PT-06-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 446 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 9 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 FireWire-PT-06-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 510 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9902
[[35mlola[0m][I] fired transitions : 26788
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 595 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 1 1 0 6 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 75 AGEF EXCL 3/595 4/2000 FireWire-PT-06-CTLCardinality-2024-12 942674 m, 188534 m/sec, 4436770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 75 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1090651
[[35mlola[0m][I] fired transitions : 5217197
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 5
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 40 FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 713 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 AGEF EXCL 4/713 4/2000 FireWire-PT-06-CTLCardinality-2024-12 1009813 m, 201962 m/sec, 4675543 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 AGEF EXCL 9/713 9/2000 FireWire-PT-06-CTLCardinality-2024-12 2066744 m, 211386 m/sec, 9360875 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
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[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-09: CTL false CTL model checker[0m
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[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-12: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 AGEF EXCL 14/713 13/2000 FireWire-PT-06-CTLCardinality-2024-12 3133703 m, 213391 m/sec, 13967973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3185271
[[35mlola[0m][I] fired transitions : 14281372
[[35mlola[0m][I] time used : 15
[[35mlola[0m][I] memory pages used : 13
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 6 FireWire-PT-06-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 887 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 FireWire-PT-06-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 1183 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 23621
[[35mlola[0m][I] fired transitions : 110134
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 FireWire-PT-06-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 1775 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for FireWire-PT-06-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3860
[[35mlola[0m][I] fired transitions : 16814
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 FireWire-PT-06-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 3551 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-02: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-06-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-05: CTL false CTL model checker[0m
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[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-12: CONJ false tscc_search[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-14: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-06-CTLCardinality-2024-15: CONJ false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-06-CTLCardinality-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 26 CTL EXCL 4/3551 3/2000 FireWire-PT-06-CTLCardinality-2024-07 560582 m, 112116 m/sec, 5280053 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 14/3551 8/2000 FireWire-PT-06-CTLCardinality-2024-07 1766671 m, 113577 m/sec, 16376965 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 19/3551 10/2000 FireWire-PT-06-CTLCardinality-2024-07 2307543 m, 108174 m/sec, 21694998 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 24/3551 13/2000 FireWire-PT-06-CTLCardinality-2024-07 2892061 m, 116903 m/sec, 27040526 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 34/3551 18/2000 FireWire-PT-06-CTLCardinality-2024-07 4034429 m, 113568 m/sec, 37560835 t fired, .
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[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4256302
[[35mlola[0m][I] fired transitions : 39654529
[[35mlola[0m][I] time used : 36
[[35mlola[0m][I] memory pages used : 19
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-06"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-06, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899600209"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-06.tgz
mv FireWire-PT-06 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;