About the Execution of LoLA for FireWire-PT-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
636.147 | 13884.00 | 14687.00 | 85.00 | TFFTFFFFFFTTFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899600203.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FireWire-PT-05, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899600203
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 6.1K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 9.7K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 107K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 91K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FireWire-PT-05-LTLCardinality-00
FORMULA_NAME FireWire-PT-05-LTLCardinality-01
FORMULA_NAME FireWire-PT-05-LTLCardinality-02
FORMULA_NAME FireWire-PT-05-LTLCardinality-03
FORMULA_NAME FireWire-PT-05-LTLCardinality-04
FORMULA_NAME FireWire-PT-05-LTLCardinality-05
FORMULA_NAME FireWire-PT-05-LTLCardinality-06
FORMULA_NAME FireWire-PT-05-LTLCardinality-07
FORMULA_NAME FireWire-PT-05-LTLCardinality-08
FORMULA_NAME FireWire-PT-05-LTLCardinality-09
FORMULA_NAME FireWire-PT-05-LTLCardinality-10
FORMULA_NAME FireWire-PT-05-LTLCardinality-11
FORMULA_NAME FireWire-PT-05-LTLCardinality-12
FORMULA_NAME FireWire-PT-05-LTLCardinality-13
FORMULA_NAME FireWire-PT-05-LTLCardinality-14
FORMULA_NAME FireWire-PT-05-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717415369231
starting LoLA
BK_EXAMINATION: LTLCardinality
BK_TIME_CONFINEMENT: 3600
BK_MEMORY_CONFINEMENT: 16384
BK_BIN_PATH: /home/mcc/BenchKit/bin/
current directory: /home/mcc/execution
FORMULA FireWire-PT-05-LTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FireWire-PT-05-LTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mFireWire-PT-05-LTLCardinality-00: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-01: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-05-LTLCardinality-03: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-06: CONJ false findpath[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-05-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-05-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-12: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mFireWire-PT-05-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mFireWire-PT-05-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 14 secs. Pages in use: 18
BK_STOP 1717415383115
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 14 (type CNST) for 13 FireWire-PT-05-LTLCardinality-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 58 (type CNST) for 57 FireWire-PT-05-LTLCardinality-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 58 (type CNST) for FireWire-PT-05-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 14 (type CNST) for FireWire-PT-05-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 FireWire-PT-05-LTLCardinality-05
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for FireWire-PT-05-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 FireWire-PT-05-LTLCardinality-00
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type EQUN) for 44 FireWire-PT-05-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type FNDP) for 22 FireWire-PT-05-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 22 FireWire-PT-05-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type FNDP) for FireWire-PT-05-LTLCardinality-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for FireWire-PT-05-LTLCardinality-06 (obsolete)
[[35mlola[0m][I] FINISHED task # 66 (type EQUN) for FireWire-PT-05-LTLCardinality-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for FireWire-PT-05-LTLCardinality-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-05-LTLCardinality-03: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-06: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-12: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 5/256 9/2000 FireWire-PT-05-LTLCardinality-00 1309701 m, 261940 m/sec, 5141939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 8 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFireWire-PT-05-LTLCardinality-03: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-06: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mFireWire-PT-05-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-12: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FireWire-PT-05-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 10/256 17/2000 FireWire-PT-05-LTLCardinality-00 2600096 m, 258079 m/sec, 10560284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for FireWire-PT-05-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2647313
[[35mlola[0m][I] fired transitions : 10769596
[[35mlola[0m][I] time used : 10
[[35mlola[0m][I] memory pages used : 18
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 FireWire-PT-05-LTLCardinality-14
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for FireWire-PT-05-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 FireWire-PT-05-LTLCardinality-13
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for FireWire-PT-05-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 44 FireWire-PT-05-LTLCardinality-12
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for FireWire-PT-05-LTLCardinality-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 85
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 FireWire-PT-05-LTLCardinality-10
[[35mlola[0m][I] time limit : 398 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for FireWire-PT-05-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 35 FireWire-PT-05-LTLCardinality-09
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 36 (type EXCL) for FireWire-PT-05-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 33
[[35mlola[0m][I] fired transitions : 50
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 FireWire-PT-05-LTLCardinality-08
[[35mlola[0m][I] time limit : 512 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for FireWire-PT-05-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 30 (type EXCL) for 29 FireWire-PT-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 597 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 30 (type EXCL) for FireWire-PT-05-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 62166
[[35mlola[0m][I] fired transitions : 267442
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 FireWire-PT-05-LTLCardinality-04
[[35mlola[0m][I] time limit : 717 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for FireWire-PT-05-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 FireWire-PT-05-LTLCardinality-02
[[35mlola[0m][I] time limit : 896 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for FireWire-PT-05-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 FireWire-PT-05-LTLCardinality-01
[[35mlola[0m][I] time limit : 1195 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for FireWire-PT-05-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 25
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 FireWire-PT-05-LTLCardinality-11
[[35mlola[0m][I] time limit : 3586 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for FireWire-PT-05-LTLCardinality-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FireWire-PT-05"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FireWire-PT-05, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899600203"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FireWire-PT-05.tgz
mv FireWire-PT-05 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;