fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r551-tall-171734899400124
Last Updated
July 7, 2024

About the Execution of LoLA for CO4-PT-16

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16208.420 2133452.00 2160240.00 6979.10 ??F???T????????T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899400124.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CO4-PT-16, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899400124
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 696K
-rw-r--r-- 1 mcc users 8.6K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 43K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 260K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-16-LTLFireability-00
FORMULA_NAME CO4-PT-16-LTLFireability-01
FORMULA_NAME CO4-PT-16-LTLFireability-02
FORMULA_NAME CO4-PT-16-LTLFireability-03
FORMULA_NAME CO4-PT-16-LTLFireability-04
FORMULA_NAME CO4-PT-16-LTLFireability-05
FORMULA_NAME CO4-PT-16-LTLFireability-06
FORMULA_NAME CO4-PT-16-LTLFireability-07
FORMULA_NAME CO4-PT-16-LTLFireability-08
FORMULA_NAME CO4-PT-16-LTLFireability-09
FORMULA_NAME CO4-PT-16-LTLFireability-10
FORMULA_NAME CO4-PT-16-LTLFireability-11
FORMULA_NAME CO4-PT-16-LTLFireability-12
FORMULA_NAME CO4-PT-16-LTLFireability-13
FORMULA_NAME CO4-PT-16-LTLFireability-14
FORMULA_NAME CO4-PT-16-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717404921225

FORMULA CO4-PT-16-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717407054677

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 180 transitions removed,116 places removed
[lola][I] LAUNCH task # 19 (type CNST) for 18 CO4-PT-16-LTLFireability-06
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 19 (type CNST) for CO4-PT-16-LTLFireability-06
[lola][I] result : true
[lola][I] LAUNCH task # 46 (type CNST) for 45 CO4-PT-16-LTLFireability-15
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 46 (type CNST) for CO4-PT-16-LTLFireability-15
[lola][I] result : true
[lola][I] LAUNCH task # 7 (type CNST) for 6 CO4-PT-16-LTLFireability-02
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 7 (type CNST) for CO4-PT-16-LTLFireability-02
[lola][I] result : false
[lola][I] LAUNCH task # 25 (type EXCL) for 24 CO4-PT-16-LTLFireability-08
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 52 (type EQUN) for 9 CO4-PT-16-LTLFireability-03
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 57 (type EQUN) for 42 CO4-PT-16-LTLFireability-14
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 52 (type EQUN) for CO4-PT-16-LTLFireability-03
[lola][I] result : true
[lola][I] FINISHED task # 57 (type EQUN) for CO4-PT-16-LTLFireability-14
[lola][I] result : true
[lola][I] FINISHED task # 25 (type EXCL) for CO4-PT-16-LTLFireability-08
[lola][I] result : false
[lola][I] markings : 32205
[lola][I] fired transitions : 195013
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 40 (type EXCL) for 39 CO4-PT-16-LTLFireability-13
[lola][I] time limit : 299 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 40 (type EXCL) for CO4-PT-16-LTLFireability-13
[lola][I] result : false
[lola][I] markings : 52
[lola][I] fired transitions : 52
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 CO4-PT-16-LTLFireability-12
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 37 (type EXCL) for CO4-PT-16-LTLFireability-12
[lola][I] result : false
[lola][I] markings : 52
[lola][I] fired transitions : 52
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 CO4-PT-16-LTLFireability-11
[lola][I] time limit : 359 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for CO4-PT-16-LTLFireability-11
[lola][I] result : false
[lola][I] markings : 212
[lola][I] fired transitions : 217
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 28 (type EXCL) for 27 CO4-PT-16-LTLFireability-09
[lola][I] time limit : 399 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 4/399 3/2000 CO4-PT-16-LTLFireability-09 357697 m, 71539 m/sec, 1507054 t fired, .
[lola][.]
[lola][.] Time elapsed: 6 secs. Pages in use: 3
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 9/399 6/2000 CO4-PT-16-LTLFireability-09 780655 m, 84591 m/sec, 3277423 t fired, .
[lola][.]
[lola][.] Time elapsed: 11 secs. Pages in use: 6
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 14/399 9/2000 CO4-PT-16-LTLFireability-09 1216022 m, 87073 m/sec, 5016925 t fired, .
[lola][.]
[lola][.] Time elapsed: 16 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 19/399 12/2000 CO4-PT-16-LTLFireability-09 1585991 m, 73993 m/sec, 6716973 t fired, .
[lola][.]
[lola][.] Time elapsed: 21 secs. Pages in use: 12
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 24/399 14/2000 CO4-PT-16-LTLFireability-09 1955612 m, 73924 m/sec, 8274774 t fired, .
[lola][.]
[lola][.] Time elapsed: 26 secs. Pages in use: 14
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 29/399 17/2000 CO4-PT-16-LTLFireability-09 2370773 m, 83032 m/sec, 10162535 t fired, .
[lola][.]
[lola][.] Time elapsed: 31 secs. Pages in use: 17
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-13: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-15: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] CO4-PT-16-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] CO4-PT-16-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] CO4-PT-16-LTLFireability-14: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 28 LTL EXCL 34/399 19/2000 CO4-PT-16-LTLFireability-09 2734350 m, 72715 m/sec, 11855336 t fired, .
[lola][.]
[lola][.] Time elapsed: 36 secs. Pages in use: 19
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] CO4-PT-16-LTLFireability-02: INITIAL false preprocessing
[lola][.] CO4-PT-16-LTLFireability-06: INITIAL true preprocessing
[lola][.] CO4-PT-16-LTLFireability-08: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-11: LTL false LTL model checker
[lola][.] CO4-PT-16-LTLFireability-12: LTL false LTL model checker
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[lola][.] 28 LTL EXCL 39/399 22/2000 CO4-PT-16-LTLFireability-09 3058853 m, 64900 m/sec, 13497959 t fired, .
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[lola][.] 28 LTL EXCL 44/399 24/2000 CO4-PT-16-LTLFireability-09 3380200 m, 64269 m/sec, 15257061 t fired, .
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[lola][.] 28 LTL EXCL 49/399 26/2000 CO4-PT-16-LTLFireability-09 3694279 m, 62815 m/sec, 16900810 t fired, .
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[lola][.] 28 LTL EXCL 54/399 28/2000 CO4-PT-16-LTLFireability-09 3973973 m, 55938 m/sec, 18499802 t fired, .
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[lola][.] 28 LTL EXCL 59/399 30/2000 CO4-PT-16-LTLFireability-09 4227502 m, 50705 m/sec, 19961661 t fired, .
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[lola][.] 28 LTL EXCL 64/399 32/2000 CO4-PT-16-LTLFireability-09 4570164 m, 68532 m/sec, 21620088 t fired, .
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[lola][.] 28 LTL EXCL 69/399 35/2000 CO4-PT-16-LTLFireability-09 4880719 m, 62111 m/sec, 23290394 t fired, .
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[lola][.] 28 LTL EXCL 74/399 37/2000 CO4-PT-16-LTLFireability-09 5206193 m, 65094 m/sec, 24912531 t fired, .
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[lola][.] 28 LTL EXCL 79/399 39/2000 CO4-PT-16-LTLFireability-09 5531323 m, 65026 m/sec, 26552995 t fired, .
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[lola][.] 28 LTL EXCL 99/399 47/2000 CO4-PT-16-LTLFireability-09 6625721 m, 68494 m/sec, 32428008 t fired, .
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[lola][.] 28 LTL EXCL 104/399 49/2000 CO4-PT-16-LTLFireability-09 6926616 m, 60179 m/sec, 34166331 t fired, .
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[lola][.] 28 LTL EXCL 109/399 51/2000 CO4-PT-16-LTLFireability-09 7194455 m, 53567 m/sec, 35732533 t fired, .
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[lola][.] 28 LTL EXCL 114/399 52/2000 CO4-PT-16-LTLFireability-09 7452832 m, 51675 m/sec, 37316458 t fired, .
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[lola][.] 28 LTL EXCL 119/399 54/2000 CO4-PT-16-LTLFireability-09 7709864 m, 51406 m/sec, 38973886 t fired, .
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[lola][.] 28 LTL EXCL 124/399 56/2000 CO4-PT-16-LTLFireability-09 7966716 m, 51370 m/sec, 40608598 t fired, .
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[lola][.] 28 LTL EXCL 129/399 58/2000 CO4-PT-16-LTLFireability-09 8210772 m, 48811 m/sec, 42105195 t fired, .
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[lola][.] 28 LTL EXCL 134/399 59/2000 CO4-PT-16-LTLFireability-09 8412463 m, 40338 m/sec, 43756613 t fired, .
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[lola][.] 28 LTL EXCL 159/399 70/2000 CO4-PT-16-LTLFireability-09 9900360 m, 63528 m/sec, 51508090 t fired, .
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[lola][.] 28 LTL EXCL 164/399 71/2000 CO4-PT-16-LTLFireability-09 10158543 m, 51636 m/sec, 52971194 t fired, .
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[lola][.] 28 LTL EXCL 169/399 73/2000 CO4-PT-16-LTLFireability-09 10406874 m, 49666 m/sec, 54293786 t fired, .
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[lola][.] 28 LTL EXCL 174/399 75/2000 CO4-PT-16-LTLFireability-09 10642020 m, 47029 m/sec, 55513308 t fired, .
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[lola][.] 28 LTL EXCL 179/399 77/2000 CO4-PT-16-LTLFireability-09 10979818 m, 67559 m/sec, 57304895 t fired, .
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[lola][.] 28 LTL EXCL 219/399 91/2000 CO4-PT-16-LTLFireability-09 12971438 m, 42344 m/sec, 69774908 t fired, .
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[lola][.] 28 LTL EXCL 224/399 93/2000 CO4-PT-16-LTLFireability-09 13290388 m, 63790 m/sec, 71432695 t fired, .
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[lola][.] 28 LTL EXCL 229/399 95/2000 CO4-PT-16-LTLFireability-09 13600089 m, 61940 m/sec, 73099490 t fired, .
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[lola][.] 28 LTL EXCL 234/399 98/2000 CO4-PT-16-LTLFireability-09 13924695 m, 64921 m/sec, 74717841 t fired, .
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[lola][.] 28 LTL EXCL 239/399 100/2000 CO4-PT-16-LTLFireability-09 14242891 m, 63639 m/sec, 76323208 t fired, .
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[lola][.] 28 LTL EXCL 279/399 115/2000 CO4-PT-16-LTLFireability-09 16429328 m, 51708 m/sec, 88779081 t fired, .
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[lola][.] 28 LTL EXCL 284/399 117/2000 CO4-PT-16-LTLFireability-09 16688383 m, 51811 m/sec, 90430991 t fired, .
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[lola][.] 28 LTL EXCL 289/399 119/2000 CO4-PT-16-LTLFireability-09 16937952 m, 49913 m/sec, 91956629 t fired, .
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[lola][.] 28 LTL EXCL 294/399 120/2000 CO4-PT-16-LTLFireability-09 17138068 m, 40023 m/sec, 93613648 t fired, .
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[lola][.] 28 LTL EXCL 299/399 122/2000 CO4-PT-16-LTLFireability-09 17363040 m, 44994 m/sec, 94861805 t fired, .
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[lola][.] 28 LTL EXCL 339/399 138/2000 CO4-PT-16-LTLFireability-09 19749374 m, 68463 m/sec, 107407752 t fired, .
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[lola][.] 28 LTL EXCL 344/399 140/2000 CO4-PT-16-LTLFireability-09 20047083 m, 59541 m/sec, 109114393 t fired, .
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[lola][.] 28 LTL EXCL 349/399 142/2000 CO4-PT-16-LTLFireability-09 20316255 m, 53834 m/sec, 110687012 t fired, .
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[lola][.] 28 LTL EXCL 354/399 144/2000 CO4-PT-16-LTLFireability-09 20577938 m, 52336 m/sec, 112317083 t fired, .
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[lola][.] 28 LTL EXCL 359/399 146/2000 CO4-PT-16-LTLFireability-09 20837839 m, 51980 m/sec, 114003167 t fired, .
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[lola][.] 28 LTL EXCL 399/399 161/2000 CO4-PT-16-LTLFireability-09 23012630 m, 60397 m/sec, 126395771 t fired, .
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[lola][.] 22 LTL EXCL 5/399 4/2000 CO4-PT-16-LTLFireability-07 454828 m, 90965 m/sec, 1867020 t fired, .
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[lola][.] 22 LTL EXCL 10/399 6/2000 CO4-PT-16-LTLFireability-07 869447 m, 82923 m/sec, 3727191 t fired, .
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[lola][.] 22 LTL EXCL 15/399 9/2000 CO4-PT-16-LTLFireability-07 1306239 m, 87358 m/sec, 5550676 t fired, .
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[lola][.] 22 LTL EXCL 20/399 12/2000 CO4-PT-16-LTLFireability-07 1776674 m, 94087 m/sec, 7364511 t fired, .
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[lola][.] 22 LTL EXCL 25/399 15/2000 CO4-PT-16-LTLFireability-07 2207995 m, 86264 m/sec, 9164159 t fired, .
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[lola][.] 22 LTL EXCL 30/399 18/2000 CO4-PT-16-LTLFireability-07 2618042 m, 82009 m/sec, 10984028 t fired, .
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[lola][.] 22 LTL EXCL 35/399 21/2000 CO4-PT-16-LTLFireability-07 3005789 m, 77549 m/sec, 12736709 t fired, .
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[lola][.] 22 LTL EXCL 45/399 26/2000 CO4-PT-16-LTLFireability-07 3770300 m, 74738 m/sec, 16003046 t fired, .
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[lola][.] 22 LTL EXCL 50/399 29/2000 CO4-PT-16-LTLFireability-07 4196423 m, 85224 m/sec, 17877197 t fired, .
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[lola][.] 22 LTL EXCL 55/399 31/2000 CO4-PT-16-LTLFireability-07 4600394 m, 80794 m/sec, 19824544 t fired, .
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[lola][.] 22 LTL EXCL 60/399 34/2000 CO4-PT-16-LTLFireability-07 4993483 m, 78617 m/sec, 21653469 t fired, .
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[lola][.] 22 LTL EXCL 65/399 37/2000 CO4-PT-16-LTLFireability-07 5356840 m, 72671 m/sec, 23375167 t fired, .
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[lola][.] 22 LTL EXCL 70/399 39/2000 CO4-PT-16-LTLFireability-07 5703612 m, 69354 m/sec, 25067266 t fired, .
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[lola][.] 22 LTL EXCL 75/399 41/2000 CO4-PT-16-LTLFireability-07 6036316 m, 66540 m/sec, 26812334 t fired, .
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[lola][.] 22 LTL EXCL 80/399 43/2000 CO4-PT-16-LTLFireability-07 6376497 m, 68036 m/sec, 28639135 t fired, .
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[lola][.] 22 LTL EXCL 85/399 46/2000 CO4-PT-16-LTLFireability-07 6710732 m, 66847 m/sec, 30497296 t fired, .
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[lola][.] 22 LTL EXCL 90/399 48/2000 CO4-PT-16-LTLFireability-07 7045543 m, 66962 m/sec, 32282011 t fired, .
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[lola][.] 22 LTL EXCL 95/399 50/2000 CO4-PT-16-LTLFireability-07 7364686 m, 63828 m/sec, 33937300 t fired, .
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[lola][.] 22 LTL EXCL 110/399 56/2000 CO4-PT-16-LTLFireability-07 8187330 m, 50344 m/sec, 38904444 t fired, .
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[lola][.] 22 LTL EXCL 115/399 58/2000 CO4-PT-16-LTLFireability-07 8544574 m, 71448 m/sec, 40515441 t fired, .
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[lola][.] 22 LTL EXCL 121/399 61/2000 CO4-PT-16-LTLFireability-07 8906552 m, 72395 m/sec, 42258115 t fired, .
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[lola][.] 22 LTL EXCL 126/399 63/2000 CO4-PT-16-LTLFireability-07 9227110 m, 64111 m/sec, 44027601 t fired, .
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[lola][.] 22 LTL EXCL 131/399 65/2000 CO4-PT-16-LTLFireability-07 9544432 m, 63464 m/sec, 45779008 t fired, .
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[lola][.] 22 LTL EXCL 136/399 67/2000 CO4-PT-16-LTLFireability-07 9884566 m, 68026 m/sec, 47506889 t fired, .
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[lola][.] 22 LTL EXCL 141/399 69/2000 CO4-PT-16-LTLFireability-07 10221842 m, 67455 m/sec, 49227761 t fired, .
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[lola][.] 22 LTL EXCL 151/399 74/2000 CO4-PT-16-LTLFireability-07 10897748 m, 65712 m/sec, 52587159 t fired, .
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[lola][.] 22 LTL EXCL 171/399 81/2000 CO4-PT-16-LTLFireability-07 12006756 m, 54378 m/sec, 58657990 t fired, .
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[lola][.] 22 LTL EXCL 176/399 83/2000 CO4-PT-16-LTLFireability-07 12274844 m, 53617 m/sec, 60032640 t fired, .
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[lola][.] 22 LTL EXCL 181/399 85/2000 CO4-PT-16-LTLFireability-07 12553522 m, 55735 m/sec, 61548388 t fired, .
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[lola][.] 22 LTL EXCL 186/399 87/2000 CO4-PT-16-LTLFireability-07 12905652 m, 70426 m/sec, 63432615 t fired, .
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[lola][.] 22 LTL EXCL 191/399 90/2000 CO4-PT-16-LTLFireability-07 13229784 m, 64826 m/sec, 65337547 t fired, .
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[lola][.] 22 LTL EXCL 196/399 92/2000 CO4-PT-16-LTLFireability-07 13540868 m, 62216 m/sec, 67107174 t fired, .
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[lola][.] 22 LTL EXCL 201/399 94/2000 CO4-PT-16-LTLFireability-07 13844274 m, 60681 m/sec, 68811923 t fired, .
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[lola][.] 22 LTL EXCL 206/399 96/2000 CO4-PT-16-LTLFireability-07 14130716 m, 57288 m/sec, 70487574 t fired, .
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[lola][.] 22 LTL EXCL 211/399 98/2000 CO4-PT-16-LTLFireability-07 14409952 m, 55847 m/sec, 72148107 t fired, .
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[lola][.] 22 LTL EXCL 231/399 105/2000 CO4-PT-16-LTLFireability-07 15514976 m, 55934 m/sec, 79227654 t fired, .
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[lola][.] 22 LTL EXCL 236/399 107/2000 CO4-PT-16-LTLFireability-07 15775044 m, 52013 m/sec, 80849005 t fired, .
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[lola][.] 22 LTL EXCL 241/399 109/2000 CO4-PT-16-LTLFireability-07 16025730 m, 50137 m/sec, 82422782 t fired, .
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[lola][.] 22 LTL EXCL 246/399 110/2000 CO4-PT-16-LTLFireability-07 16294622 m, 53778 m/sec, 84042926 t fired, .
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[lola][.] 22 LTL EXCL 251/399 112/2000 CO4-PT-16-LTLFireability-07 16509750 m, 43025 m/sec, 85714692 t fired, .
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[lola][.] 22 LTL EXCL 256/399 113/2000 CO4-PT-16-LTLFireability-07 16706832 m, 39416 m/sec, 87385514 t fired, .
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[lola][.] 22 LTL EXCL 261/399 115/2000 CO4-PT-16-LTLFireability-07 16934560 m, 45545 m/sec, 88692185 t fired, .
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[lola][.] 22 LTL EXCL 271/399 119/2000 CO4-PT-16-LTLFireability-07 17575982 m, 69675 m/sec, 92047419 t fired, .
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[lola][.] 22 LTL EXCL 291/399 128/2000 CO4-PT-16-LTLFireability-07 18854882 m, 65748 m/sec, 98793550 t fired, .
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[lola][.] 22 LTL EXCL 296/399 130/2000 CO4-PT-16-LTLFireability-07 19183108 m, 65645 m/sec, 100423137 t fired, .
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[lola][.] 22 LTL EXCL 301/399 132/2000 CO4-PT-16-LTLFireability-07 19502516 m, 63881 m/sec, 102030331 t fired, .
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[lola][.] 22 LTL EXCL 306/399 134/2000 CO4-PT-16-LTLFireability-07 19783562 m, 56209 m/sec, 103539814 t fired, .
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[lola][.] 22 LTL EXCL 311/399 136/2000 CO4-PT-16-LTLFireability-07 20043716 m, 52030 m/sec, 105043784 t fired, .
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[lola][.] 22 LTL EXCL 351/399 151/2000 CO4-PT-16-LTLFireability-07 22397566 m, 61305 m/sec, 117938886 t fired, .
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[lola][.] 22 LTL EXCL 356/399 153/2000 CO4-PT-16-LTLFireability-07 22683612 m, 57209 m/sec, 119601798 t fired, .
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[lola][.] 22 LTL EXCL 361/399 155/2000 CO4-PT-16-LTLFireability-07 22966632 m, 56604 m/sec, 121250154 t fired, .
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[lola][.] 22 LTL EXCL 366/399 157/2000 CO4-PT-16-LTLFireability-07 23232460 m, 53165 m/sec, 122910939 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 399 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-16"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CO4-PT-16, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899400124"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-16.tgz
mv CO4-PT-16 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;