About the Execution of LoLA for CO4-PT-16
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
10703.411 | 1407586.00 | 1419025.00 | 3706.10 | TTFFFTTFFTFFFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899400123.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CO4-PT-16, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899400123
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 696K
-rw-r--r-- 1 mcc users 8.6K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 43K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 260K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-16-LTLCardinality-00
FORMULA_NAME CO4-PT-16-LTLCardinality-01
FORMULA_NAME CO4-PT-16-LTLCardinality-02
FORMULA_NAME CO4-PT-16-LTLCardinality-03
FORMULA_NAME CO4-PT-16-LTLCardinality-04
FORMULA_NAME CO4-PT-16-LTLCardinality-05
FORMULA_NAME CO4-PT-16-LTLCardinality-06
FORMULA_NAME CO4-PT-16-LTLCardinality-07
FORMULA_NAME CO4-PT-16-LTLCardinality-08
FORMULA_NAME CO4-PT-16-LTLCardinality-09
FORMULA_NAME CO4-PT-16-LTLCardinality-10
FORMULA_NAME CO4-PT-16-LTLCardinality-11
FORMULA_NAME CO4-PT-16-LTLCardinality-12
FORMULA_NAME CO4-PT-16-LTLCardinality-13
FORMULA_NAME CO4-PT-16-LTLCardinality-14
FORMULA_NAME CO4-PT-16-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717404788197
FORMULA CO4-PT-16-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-16-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-00: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-05: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-07: LTL/CTL false LTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-12: AG false findpath[0m
[[35mlola[0m] [1m[31mCO4-PT-16-LTLCardinality-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-16-LTLCardinality-15: LTL true LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1407 secs. Pages in use: 512
BK_STOP 1717406195783
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 180 transitions removed,116 places removed
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 CO4-PT-16-LTLCardinality-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 CO4-PT-16-LTLCardinality-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 CO4-PT-16-LTLCardinality-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for CO4-PT-16-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for CO4-PT-16-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for CO4-PT-16-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 CO4-PT-16-LTLCardinality-05
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 49 (type FNDP) for 36 CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 50 (type EQUN) for 36 CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for CO4-PT-16-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 CO4-PT-16-LTLCardinality-10
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for CO4-PT-16-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 52
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 CO4-PT-16-LTLCardinality-08
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for CO4-PT-16-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 52
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 CO4-PT-16-LTLCardinality-04
[[35mlola[0m][I] time limit : 357 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for CO4-PT-16-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 52
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 CO4-PT-16-LTLCardinality-00
[[35mlola[0m][I] time limit : 397 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for CO4-PT-16-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 36 CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] time limit : 447 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type FNDP) for CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 50 (type EQUN) for CO4-PT-16-LTLCardinality-12 (obsolete)
[[35mlola[0m][W] CANCELED task # 51 (type EXCL) for CO4-PT-16-LTLCardinality-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 CO4-PT-16-LTLCardinality-07
[[35mlola[0m][I] time limit : 511 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for CO4-PT-16-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 52
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 CO4-PT-16-LTLCardinality-14
[[35mlola[0m][I] time limit : 596 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for CO4-PT-16-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 CO4-PT-16-LTLCardinality-13
[[35mlola[0m][I] time limit : 715 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for CO4-PT-16-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 52
[[35mlola[0m][I] fired transitions : 52
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 50 (type EQUN) for CO4-PT-16-LTLCardinality-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 CO4-PT-16-LTLCardinality-06
[[35mlola[0m][I] time limit : 894 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for CO4-PT-16-LTLCardinality-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 CO4-PT-16-LTLCardinality-15
[[35mlola[0m][I] time limit : 1192 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for CO4-PT-16-LTLCardinality-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 CO4-PT-16-LTLCardinality-03
[[35mlola[0m][I] time limit : 1789 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for CO4-PT-16-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12955
[[35mlola[0m][I] fired transitions : 27636
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 CO4-PT-16-LTLCardinality-02
[[35mlola[0m][I] time limit : 3578 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-07: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-15: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CO4-PT-16-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 4/3578 3/2000 CO4-PT-16-LTLCardinality-02 374476 m, 74895 m/sec, 1594917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mCO4-PT-16-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-07: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mCO4-PT-16-LTLCardinality-08: LTL/CTL false LTL model checker[0m
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[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-16"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CO4-PT-16, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899400123"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-16.tgz
mv CO4-PT-16 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;