fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r551-tall-171734899200044
Last Updated
July 7, 2024

About the Execution of LoLA for CO4-PT-06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
76.535 271.00 130.00 0.00 FFFFFFTFFFFTFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899200044.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CO4-PT-06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899200044
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 5.9K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 7.5K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 76K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 97K Jun 2 16:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-06-LTLFireability-00
FORMULA_NAME CO4-PT-06-LTLFireability-01
FORMULA_NAME CO4-PT-06-LTLFireability-02
FORMULA_NAME CO4-PT-06-LTLFireability-03
FORMULA_NAME CO4-PT-06-LTLFireability-04
FORMULA_NAME CO4-PT-06-LTLFireability-05
FORMULA_NAME CO4-PT-06-LTLFireability-06
FORMULA_NAME CO4-PT-06-LTLFireability-07
FORMULA_NAME CO4-PT-06-LTLFireability-08
FORMULA_NAME CO4-PT-06-LTLFireability-09
FORMULA_NAME CO4-PT-06-LTLFireability-10
FORMULA_NAME CO4-PT-06-LTLFireability-11
FORMULA_NAME CO4-PT-06-LTLFireability-12
FORMULA_NAME CO4-PT-06-LTLFireability-13
FORMULA_NAME CO4-PT-06-LTLFireability-14
FORMULA_NAME CO4-PT-06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717397294200

FORMULA CO4-PT-06-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-06-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] CO4-PT-06-LTLFireability-00: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-01: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-02: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-03: INITIAL false preprocessing
[lola] CO4-PT-06-LTLFireability-04: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-05: CONJ false LTL model checker
[lola] CO4-PT-06-LTLFireability-06: LTL true LTL model checker
[lola] CO4-PT-06-LTLFireability-07: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-08: CONJ false preprocessing
[lola] CO4-PT-06-LTLFireability-09: CONJ false LTL model checker
[lola] CO4-PT-06-LTLFireability-10: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-11: LTL true LTL model checker
[lola] CO4-PT-06-LTLFireability-12: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-13: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-14: LTL false LTL model checker
[lola] CO4-PT-06-LTLFireability-15: LTL false LTL model checker
[lola]
[lola] Time elapsed: 0 secs. Pages in use: 1

BK_STOP 1717397294471

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 120 transitions removed,100 places removed
[lola][I] LAUNCH task # 10 (type CNST) for 9 CO4-PT-06-LTLFireability-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 10 (type CNST) for CO4-PT-06-LTLFireability-03
[lola][I] result : false
[lola][I] LAUNCH task # 1 (type EXCL) for 0 CO4-PT-06-LTLFireability-00
[lola][I] time limit : 112 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for CO4-PT-06-LTLFireability-00
[lola][I] result : false
[lola][I] markings : 2360
[lola][I] fired transitions : 4583
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 24 (type EXCL) for 15 CO4-PT-06-LTLFireability-05
[lola][I] time limit : 116 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 24 (type EXCL) for CO4-PT-06-LTLFireability-05
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 CO4-PT-06-LTLFireability-04
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for CO4-PT-06-LTLFireability-04
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 54 (type EXCL) for 53 CO4-PT-06-LTLFireability-11
[lola][I] time limit : 138 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 54 (type EXCL) for CO4-PT-06-LTLFireability-11
[lola][I] result : true
[lola][I] markings : 19
[lola][I] fired transitions : 22
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 63 (type EXCL) for 62 CO4-PT-06-LTLFireability-14
[lola][I] time limit : 150 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 35 (type CNST) for 32 CO4-PT-06-LTLFireability-08
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 35 (type CNST) for CO4-PT-06-LTLFireability-08
[lola][I] result : false
[lola][I] FINISHED task # 63 (type EXCL) for CO4-PT-06-LTLFireability-14
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 46 (type EXCL) for 43 CO4-PT-06-LTLFireability-09
[lola][I] time limit : 225 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 46 (type EXCL) for CO4-PT-06-LTLFireability-09
[lola][I] result : false
[lola][I] markings : 29
[lola][I] fired transitions : 35
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 27 (type EXCL) for 26 CO4-PT-06-LTLFireability-06
[lola][I] time limit : 300 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 27 (type EXCL) for CO4-PT-06-LTLFireability-06
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 57 (type EXCL) for 56 CO4-PT-06-LTLFireability-12
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 57 (type EXCL) for CO4-PT-06-LTLFireability-12
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 8
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 51 (type EXCL) for 50 CO4-PT-06-LTLFireability-10
[lola][I] time limit : 600 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 51 (type EXCL) for CO4-PT-06-LTLFireability-10
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 60 (type EXCL) for 59 CO4-PT-06-LTLFireability-13
[lola][I] time limit : 720 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 60 (type EXCL) for CO4-PT-06-LTLFireability-13
[lola][I] result : false
[lola][I] markings : 567
[lola][I] fired transitions : 966
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 66 (type EXCL) for 65 CO4-PT-06-LTLFireability-15
[lola][I] time limit : 900 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 66 (type EXCL) for CO4-PT-06-LTLFireability-15
[lola][I] result : false
[lola][I] markings : 25
[lola][I] fired transitions : 25
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 CO4-PT-06-LTLFireability-01
[lola][I] time limit : 1200 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for CO4-PT-06-LTLFireability-01
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 CO4-PT-06-LTLFireability-02
[lola][I] time limit : 1800 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for CO4-PT-06-LTLFireability-02
[lola][I] result : false
[lola][I] markings : 24
[lola][I] fired transitions : 24
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 30 (type EXCL) for 29 CO4-PT-06-LTLFireability-07
[lola][I] time limit : 3600 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 30 (type EXCL) for CO4-PT-06-LTLFireability-07
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 8
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CO4-PT-06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899200044"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-06.tgz
mv CO4-PT-06 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;