About the Execution of LoLA for CO4-PT-02
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2226.796 | 145046.00 | 148096.00 | 303.40 | FTFTTFFTTTFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r551-tall-171734899100009.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CO4-PT-02, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r551-tall-171734899100009
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 548K
-rw-r--r-- 1 mcc users 6.7K Jun 2 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Jun 2 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Jun 2 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K Jun 2 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Jun 2 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Jun 2 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Jun 2 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Jun 2 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Jun 2 16:33 NewModel
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 116K Jun 2 17:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Jun 2 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 102K Jun 2 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Jun 2 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K Jun 2 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 equiv_col
-rw-r--r-- 1 mcc users 3 Jun 2 16:33 instance
-rw-r--r-- 1 mcc users 6 Jun 2 16:33 iscolored
-rw-r--r-- 1 mcc users 74K Jun 2 16:33 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-00
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-01
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-02
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-03
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-04
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-05
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-06
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-07
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-08
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-09
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-10
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-11
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-12
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-13
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-14
FORMULA_NAME CO4-PT-02-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717397138172
FORMULA CO4-PT-02-CTLCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CO4-PT-02-CTLCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-00: EFAG false tscc_search[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-01: DISJ true CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-02: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-06: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-07: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-09: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-10: AGAF false state space /EFEG[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-12: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[32mCO4-PT-02-CTLCardinality-2024-13: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mCO4-PT-02-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 145 secs. Pages in use: 10
BK_STOP 1717397283218
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 0 CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 0 CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 0 CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 36 (type CNST) for 35 CO4-PT-02-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 36 (type CNST) for CO4-PT-02-CTLCardinality-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 25 CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 25 CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 81 (type FNDP) for 44 CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 87 (type EQUN) for 44 CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 86 (type EQUN) for 3 CO4-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 81 (type FNDP) for CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 87 (type EQUN) for CO4-PT-02-CTLCardinality-2024-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 84 (type EQUN) for 38 CO4-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 90 (type EQUN) for 38 CO4-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type EQUN) for CO4-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 87 (type EQUN) for CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 90 (type EQUN) for CO4-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 86 (type EQUN) for CO4-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for CO4-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 186715
[[35mlola[0m][I] fired transitions : 1223429
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 80 (type EXCL) for 3 CO4-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 80 (type EXCL) for CO4-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 CO4-PT-02-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for CO4-PT-02-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 CO4-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-00: EFAG false tscc_search[0m
[[35mlola[0m][.] [1m[32mCO4-PT-02-CTLCardinality-2024-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-01: DISJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-12: CONJ 0 2 0 0 5 0 0 1
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 5/239 3/2000 CO4-PT-02-CTLCardinality-2024-13 673210 m, 134642 m/sec, 5629737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-00: EFAG false tscc_search[0m
[[35mlola[0m][.] [1m[32mCO4-PT-02-CTLCardinality-2024-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-01: DISJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-12: CONJ 0 2 0 0 5 0 0 1
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 10/239 6/2000 CO4-PT-02-CTLCardinality-2024-13 1296466 m, 124651 m/sec, 11980518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-00: EFAG false tscc_search[0m
[[35mlola[0m][.] [1m[32mCO4-PT-02-CTLCardinality-2024-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-01: DISJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-12: CONJ 0 2 0 0 5 0 0 1
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 15/239 9/2000 CO4-PT-02-CTLCardinality-2024-13 1988215 m, 138349 m/sec, 18461642 t fired, .
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[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for CO4-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2392106
[[35mlola[0m][I] fired transitions : 22681596
[[35mlola[0m][I] time used : 18
[[35mlola[0m][I] memory pages used : 10
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 44 CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for CO4-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 39926
[[35mlola[0m][I] fired transitions : 125619
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 CO4-PT-02-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 42 CTL EXCL 2/298 2/2000 CO4-PT-02-CTLCardinality-2024-11 405454 m, 81090 m/sec, 2242298 t fired, .
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[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for CO4-PT-02-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1151108
[[35mlola[0m][I] fired transitions : 6748716
[[35mlola[0m][I] time used : 5
[[35mlola[0m][I] memory pages used : 5
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 CO4-PT-02-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for CO4-PT-02-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 25 CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 357 sec
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[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 CO4-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 397 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 2/397 2/2000 CO4-PT-02-CTLCardinality-2024-06 445925 m, 89185 m/sec, 2028329 t fired, .
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[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for CO4-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 990275
[[35mlola[0m][I] fired transitions : 5821796
[[35mlola[0m][I] time used : 5
[[35mlola[0m][I] memory pages used : 5
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 CO4-PT-02-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 446 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-06: CTL false CTL model checker[0m
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[[35mlola[0m][.] [1m[32mCO4-PT-02-CTLCardinality-2024-09: INITIAL true preprocessing[0m
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[[35mlola[0m][.] [1m[31mCO4-PT-02-CTLCardinality-2024-12: CONJ false CTL model checker[0m
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 2/446 1/2000 CO4-PT-02-CTLCardinality-2024-05 78466 m, 15693 m/sec, 377999 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 7/446 2/2000 CO4-PT-02-CTLCardinality-2024-05 308255 m, 45957 m/sec, 1715535 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 12/446 3/2000 CO4-PT-02-CTLCardinality-2024-05 503485 m, 39046 m/sec, 3349161 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 17/446 3/2000 CO4-PT-02-CTLCardinality-2024-05 689341 m, 37171 m/sec, 4537042 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 22/446 4/2000 CO4-PT-02-CTLCardinality-2024-05 865854 m, 35302 m/sec, 6229886 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 27/446 5/2000 CO4-PT-02-CTLCardinality-2024-05 1051026 m, 37034 m/sec, 7435371 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 32/446 6/2000 CO4-PT-02-CTLCardinality-2024-05 1232742 m, 36343 m/sec, 9305209 t fired, .
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[[35mlola[0m][.] 20 CTL EXCL 37/446 6/2000 CO4-PT-02-CTLCardinality-2024-05 1413419 m, 36135 m/sec, 10420213 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 42/446 7/2000 CO4-PT-02-CTLCardinality-2024-05 1599191 m, 37154 m/sec, 12261842 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 47/446 8/2000 CO4-PT-02-CTLCardinality-2024-05 1788632 m, 37888 m/sec, 13456809 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 52/446 9/2000 CO4-PT-02-CTLCardinality-2024-05 1986809 m, 39635 m/sec, 14862952 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 57/446 9/2000 CO4-PT-02-CTLCardinality-2024-05 2170556 m, 36749 m/sec, 16517223 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 20 CTL EXCL 62/446 10/2000 CO4-PT-02-CTLCardinality-2024-05 2359220 m, 37732 m/sec, 17758840 t fired, .
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[[35mlola[0m][.] 17 CTL EXCL 4/501 3/2000 CO4-PT-02-CTLCardinality-2024-04 643191 m, 128638 m/sec, 5148997 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 9/501 6/2000 CO4-PT-02-CTLCardinality-2024-04 1282881 m, 127938 m/sec, 11465774 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-01: DISJ 0 1 0 0 4 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 17 CTL EXCL 14/501 9/2000 CO4-PT-02-CTLCardinality-2024-04 1952161 m, 133856 m/sec, 17375909 t fired, .
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[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for CO4-PT-02-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2392106
[[35mlola[0m][I] fired transitions : 21949181
[[35mlola[0m][I] time used : 18
[[35mlola[0m][I] memory pages used : 10
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 CO4-PT-02-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 581 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 14 CTL EXCL 1/581 2/2000 CO4-PT-02-CTLCardinality-2024-03 264284 m, 52856 m/sec, 1400797 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 14 CTL EXCL 6/581 5/2000 CO4-PT-02-CTLCardinality-2024-03 1071855 m, 161514 m/sec, 7582654 t fired, .
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-07: CONJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-10: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 14 CTL EXCL 11/581 8/2000 CO4-PT-02-CTLCardinality-2024-03 1790332 m, 143695 m/sec, 13465662 t fired, .
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[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for CO4-PT-02-CTLCardinality-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2392106
[[35mlola[0m][I] fired transitions : 18507489
[[35mlola[0m][I] time used : 15
[[35mlola[0m][I] memory pages used : 10
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 CO4-PT-02-CTLCardinality-2024-02
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[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for CO4-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 261
[[35mlola[0m][I] fired transitions : 447
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 78 (type EXCL) for 38 CO4-PT-02-CTLCardinality-2024-10
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[[35mlola[0m][I] FINISHED task # 78 (type EXCL) for CO4-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 13
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 25 CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 1158 sec
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[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for CO4-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 461
[[35mlola[0m][I] fired transitions : 1719
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 CO4-PT-02-CTLCardinality-2024-01
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[[35mlola[0m][.] CO4-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 8 CTL EXCL 1/1737 1/2000 CO4-PT-02-CTLCardinality-2024-01 176795 m, 35359 m/sec, 1362121 t fired, .
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[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for CO4-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 601635
[[35mlola[0m][I] fired transitions : 5156493
[[35mlola[0m][I] time used : 3
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[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 CO4-PT-02-CTLCardinality-2024-14
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[[35mlola[0m][.] 59 CTL EXCL 3/3471 2/2000 CO4-PT-02-CTLCardinality-2024-14 269963 m, 53992 m/sec, 3729208 t fired, .
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[[35mlola[0m][.] 59 CTL EXCL 8/3471 3/2000 CO4-PT-02-CTLCardinality-2024-14 728494 m, 91706 m/sec, 10592388 t fired, .
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[[35mlola[0m][.] 59 CTL EXCL 13/3471 5/2000 CO4-PT-02-CTLCardinality-2024-14 1200619 m, 94425 m/sec, 17390404 t fired, .
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[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 16
[[35mlola[0m][I] memory pages used : 6
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CO4-PT-02"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CO4-PT-02, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r551-tall-171734899100009"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CO4-PT-02.tgz
mv CO4-PT-02 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;