About the Execution of LTSMin+red for UtilityControlRoom-PT-Z4T4N06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 584.884 | 49767.00 | 75076.00 | 397.90 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r544-smll-171701111100258.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-PT-Z4T4N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701111100258
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 34K Apr 13 05:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 173K Apr 13 05:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 73K Apr 13 05:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 292K Apr 13 05:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 26K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 21K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 64K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 84K Apr 13 05:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 433K Apr 13 05:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 170K Apr 13 05:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 636K Apr 13 05:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.8K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 191K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717278117453
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N06
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 21:41:59] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 21:41:59] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 21:41:59] [INFO ] Load time of PNML (sax parser for PT used): 130 ms
[2024-06-01 21:41:59] [INFO ] Transformed 228 places.
[2024-06-01 21:41:59] [INFO ] Transformed 450 transitions.
[2024-06-01 21:41:59] [INFO ] Parsed PT model containing 228 places and 450 transitions and 1446 arcs in 295 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 44 ms.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
[2024-06-01 21:41:59] [INFO ] Reduced 18 identical enabling conditions.
Ensure Unique test removed 96 transitions
Reduce redundant transitions removed 96 transitions.
Support contains 228 out of 228 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 18 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
// Phase 1: matrix 354 rows 228 cols
[2024-06-01 21:41:59] [INFO ] Computed 15 invariants in 31 ms
[2024-06-01 21:42:00] [INFO ] Implicit Places using invariants in 314 ms returned []
[2024-06-01 21:42:00] [INFO ] Invariant cache hit.
[2024-06-01 21:42:00] [INFO ] Implicit Places using invariants and state equation in 343 ms returned []
Implicit Place search using SMT with State Equation took 705 ms to find 0 implicit places.
Running 348 sub problems to find dead transitions.
[2024-06-01 21:42:00] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/222 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/222 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 2 (OVERLAPS) 6/228 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/228 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 4 (OVERLAPS) 354/582 variables, 228/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/582 variables, 0/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 6 (OVERLAPS) 0/582 variables, 0/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
No progress, stopping.
After SMT solving in domain Real declared 582/582 variables, and 243 constraints, problems are : Problem set: 0 solved, 348 unsolved in 16596 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 228/228 constraints, PredecessorRefiner: 348/348 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 348 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/222 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/222 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 2 (OVERLAPS) 6/228 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/228 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 4 (OVERLAPS) 354/582 variables, 228/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/582 variables, 348/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/582 variables, 0/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 7 (OVERLAPS) 0/582 variables, 0/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
No progress, stopping.
After SMT solving in domain Int declared 582/582 variables, and 591 constraints, problems are : Problem set: 0 solved, 348 unsolved in 24574 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 228/228 constraints, PredecessorRefiner: 348/348 constraints, Known Traps: 0/0 constraints]
After SMT, in 41786ms problems are : Problem set: 0 solved, 348 unsolved
Search for dead transitions found 0 dead transitions in 41946ms
Finished structural reductions in LTL mode , in 1 iterations and 42708 ms. Remains : 228/228 places, 354/354 transitions.
Support contains 228 out of 228 places after structural reductions.
[2024-06-01 21:42:42] [INFO ] Flatten gal took : 110 ms
[2024-06-01 21:42:43] [INFO ] Flatten gal took : 80 ms
[2024-06-01 21:42:43] [INFO ] Input system was already deterministic with 354 transitions.
Reduction of identical properties reduced properties to check from 56 to 53
RANDOM walk for 40000 steps (8 resets) in 1885 ms. (21 steps per ms) remains 3/53 properties
BEST_FIRST walk for 40004 steps (8 resets) in 198 ms. (201 steps per ms) remains 2/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 53 ms. (740 steps per ms) remains 1/2 properties
BEST_FIRST walk for 17123 steps (4 resets) in 22 ms. (744 steps per ms) remains 0/1 properties
[2024-06-01 21:42:44] [INFO ] Flatten gal took : 41 ms
[2024-06-01 21:42:44] [INFO ] Flatten gal took : 46 ms
[2024-06-01 21:42:44] [INFO ] Input system was already deterministic with 354 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 4 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 228/228 places, 354/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 24 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 37 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 228 transition count 258
Reduce places removed 96 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 120 rules applied. Total rules applied 216 place count 132 transition count 234
Applied a total of 216 rules in 44 ms. Remains 132 /228 variables (removed 96) and now considering 234/354 (removed 120) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 44 ms. Remains : 132/228 places, 234/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 14 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 228/228 places, 354/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 19 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 21 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 18 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 156/228 places, 282/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 14 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 228/228 places, 354/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 16 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 18 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 12 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 156/228 places, 282/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 9 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 156/228 places, 282/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 14 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 228 transition count 258
Reduce places removed 96 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 120 rules applied. Total rules applied 216 place count 132 transition count 234
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 228 place count 126 transition count 228
Applied a total of 228 rules in 45 ms. Remains 126 /228 variables (removed 102) and now considering 228/354 (removed 126) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 126/228 places, 228/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 228 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 95 transitions
Trivial Post-agglo rules discarded 95 transitions
Performed 95 trivial Post agglomeration. Transition count delta: 95
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 228 transition count 259
Reduce places removed 95 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 119 rules applied. Total rules applied 214 place count 133 transition count 235
Performed 23 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 23 Pre rules applied. Total rules applied 214 place count 133 transition count 212
Deduced a syphon composed of 23 places in 0 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 2 with 46 rules applied. Total rules applied 260 place count 110 transition count 212
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 262 place count 108 transition count 164
Iterating global reduction 2 with 2 rules applied. Total rules applied 264 place count 108 transition count 164
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 276 place count 96 transition count 152
Iterating global reduction 2 with 12 rules applied. Total rules applied 288 place count 96 transition count 152
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 299 place count 85 transition count 130
Iterating global reduction 2 with 11 rules applied. Total rules applied 310 place count 85 transition count 130
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 320 place count 75 transition count 110
Iterating global reduction 2 with 10 rules applied. Total rules applied 330 place count 75 transition count 110
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 340 place count 75 transition count 100
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 352 place count 69 transition count 94
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 362 place count 64 transition count 89
Applied a total of 362 rules in 35 ms. Remains 64 /228 variables (removed 164) and now considering 89/354 (removed 265) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 64/228 places, 89/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 4 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 4 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 89 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Performed 95 Post agglomeration using F-continuation condition.Transition count delta: 95
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 228 transition count 259
Reduce places removed 95 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 119 rules applied. Total rules applied 214 place count 133 transition count 235
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 214 place count 133 transition count 211
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 262 place count 109 transition count 211
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 263 place count 108 transition count 187
Iterating global reduction 2 with 1 rules applied. Total rules applied 264 place count 108 transition count 187
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 270 place count 102 transition count 181
Iterating global reduction 2 with 6 rules applied. Total rules applied 276 place count 102 transition count 181
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 282 place count 96 transition count 169
Iterating global reduction 2 with 6 rules applied. Total rules applied 288 place count 96 transition count 169
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 294 place count 90 transition count 151
Iterating global reduction 2 with 6 rules applied. Total rules applied 300 place count 90 transition count 151
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 306 place count 90 transition count 145
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 318 place count 84 transition count 139
Applied a total of 318 rules in 28 ms. Remains 84 /228 variables (removed 144) and now considering 139/354 (removed 215) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 84/228 places, 139/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 139 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 95 transitions
Trivial Post-agglo rules discarded 95 transitions
Performed 95 trivial Post agglomeration. Transition count delta: 95
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 228 transition count 259
Reduce places removed 95 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 119 rules applied. Total rules applied 214 place count 133 transition count 235
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 214 place count 133 transition count 211
Deduced a syphon composed of 24 places in 1 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 262 place count 109 transition count 211
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 264 place count 107 transition count 163
Iterating global reduction 2 with 2 rules applied. Total rules applied 266 place count 107 transition count 163
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 278 place count 95 transition count 151
Iterating global reduction 2 with 12 rules applied. Total rules applied 290 place count 95 transition count 151
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 302 place count 83 transition count 127
Iterating global reduction 2 with 12 rules applied. Total rules applied 314 place count 83 transition count 127
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 325 place count 72 transition count 105
Iterating global reduction 2 with 11 rules applied. Total rules applied 336 place count 72 transition count 105
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 2 with 11 rules applied. Total rules applied 347 place count 72 transition count 94
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 359 place count 66 transition count 88
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 13 rules applied. Total rules applied 372 place count 59 transition count 82
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 3 with 24 rules applied. Total rules applied 396 place count 47 transition count 70
Applied a total of 396 rules in 24 ms. Remains 47 /228 variables (removed 181) and now considering 70/354 (removed 284) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 47/228 places, 70/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 3 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 3 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Performed 93 Post agglomeration using F-continuation condition.Transition count delta: 93
Iterating post reduction 0 with 93 rules applied. Total rules applied 93 place count 228 transition count 261
Reduce places removed 93 places and 0 transitions.
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 1 with 116 rules applied. Total rules applied 209 place count 135 transition count 238
Performed 22 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 22 Pre rules applied. Total rules applied 209 place count 135 transition count 216
Deduced a syphon composed of 22 places in 1 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 2 with 44 rules applied. Total rules applied 253 place count 113 transition count 216
Partial Post-agglomeration rule applied 7 times.
Drop transitions (Partial Post agglomeration) removed 7 transitions
Iterating global reduction 2 with 7 rules applied. Total rules applied 260 place count 113 transition count 216
Applied a total of 260 rules in 22 ms. Remains 113 /228 variables (removed 115) and now considering 216/354 (removed 138) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 113/228 places, 216/354 transitions.
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 8 ms
[2024-06-01 21:42:45] [INFO ] Flatten gal took : 9 ms
[2024-06-01 21:42:45] [INFO ] Input system was already deterministic with 216 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 69 places :
Symmetric choice reduction at 0 with 69 rule applications. Total rules 69 place count 159 transition count 285
Iterating global reduction 0 with 69 rules applied. Total rules applied 138 place count 159 transition count 285
Applied a total of 138 rules in 5 ms. Remains 159 /228 variables (removed 69) and now considering 285/354 (removed 69) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 159/228 places, 285/354 transitions.
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:42:46] [INFO ] Input system was already deterministic with 285 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 70 places :
Symmetric choice reduction at 0 with 70 rule applications. Total rules 70 place count 158 transition count 284
Iterating global reduction 0 with 70 rules applied. Total rules applied 140 place count 158 transition count 284
Applied a total of 140 rules in 5 ms. Remains 158 /228 variables (removed 70) and now considering 284/354 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 158/228 places, 284/354 transitions.
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 9 ms
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:42:46] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 71 places :
Symmetric choice reduction at 0 with 71 rule applications. Total rules 71 place count 157 transition count 283
Iterating global reduction 0 with 71 rules applied. Total rules applied 142 place count 157 transition count 283
Applied a total of 142 rules in 5 ms. Remains 157 /228 variables (removed 71) and now considering 283/354 (removed 71) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 157/228 places, 283/354 transitions.
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 9 ms
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:42:46] [INFO ] Input system was already deterministic with 283 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 93 transitions
Trivial Post-agglo rules discarded 93 transitions
Performed 93 trivial Post agglomeration. Transition count delta: 93
Iterating post reduction 0 with 93 rules applied. Total rules applied 93 place count 228 transition count 261
Reduce places removed 93 places and 0 transitions.
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 1 with 116 rules applied. Total rules applied 209 place count 135 transition count 238
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 209 place count 135 transition count 214
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 257 place count 111 transition count 214
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 258 place count 110 transition count 190
Iterating global reduction 2 with 1 rules applied. Total rules applied 259 place count 110 transition count 190
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 265 place count 104 transition count 184
Iterating global reduction 2 with 6 rules applied. Total rules applied 271 place count 104 transition count 184
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 277 place count 98 transition count 172
Iterating global reduction 2 with 6 rules applied. Total rules applied 283 place count 98 transition count 172
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 287 place count 94 transition count 160
Iterating global reduction 2 with 4 rules applied. Total rules applied 291 place count 94 transition count 160
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 295 place count 94 transition count 156
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 307 place count 88 transition count 150
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 13 rules applied. Total rules applied 320 place count 81 transition count 144
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Deduced a syphon composed of 18 places in 0 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 3 with 36 rules applied. Total rules applied 356 place count 63 transition count 126
Applied a total of 356 rules in 23 ms. Remains 63 /228 variables (removed 165) and now considering 126/354 (removed 228) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 63/228 places, 126/354 transitions.
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 5 ms
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 5 ms
[2024-06-01 21:42:46] [INFO ] Input system was already deterministic with 126 transitions.
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 32 ms
[2024-06-01 21:42:46] [INFO ] Flatten gal took : 35 ms
[2024-06-01 21:42:46] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 41 ms.
[2024-06-01 21:42:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 228 places, 354 transitions and 1062 arcs took 8 ms.
Total runtime 47574 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-00
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-01
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-02
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-03
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-04
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-05
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-06
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-07
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-08
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-09
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-10
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-11
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-12
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-13
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-14
Could not compute solution for formula : UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-15
BK_STOP 1717278167220
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/519/ctl_0_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/519/ctl_1_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/519/ctl_2_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/519/ctl_3_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/519/ctl_4_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/519/ctl_5_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/519/ctl_6_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/519/ctl_7_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/519/ctl_8_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/519/ctl_9_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/519/ctl_10_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/519/ctl_11_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/519/ctl_12_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/519/ctl_13_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/519/ctl_14_
ctl formula name UtilityControlRoom-PT-Z4T4N06-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/519/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-PT-Z4T4N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701111100258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N06.tgz
mv UtilityControlRoom-PT-Z4T4N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;