Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r544-smll-171701111000210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-PT-Z2T4N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701111000210
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 31K Apr 13 05:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 164K Apr 13 05:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 47K Apr 13 05:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 216K Apr 13 05:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 05:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 13 05:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113K Apr 13 05:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 487K Apr 13 05:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.5K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 116K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717273943937

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T4N10
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 20:32:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 20:32:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 20:32:26] [INFO ] Load time of PNML (sax parser for PT used): 138 ms
[2024-06-01 20:32:26] [INFO ] Transformed 174 places.
[2024-06-01 20:32:26] [INFO ] Transformed 270 transitions.
[2024-06-01 20:32:26] [INFO ] Parsed PT model containing 174 places and 270 transitions and 850 arcs in 330 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 44 ms.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
[2024-06-01 20:32:26] [INFO ] Reduced 10 identical enabling conditions.
Ensure Unique test removed 40 transitions
Reduce redundant transitions removed 40 transitions.
Support contains 174 out of 174 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Applied a total of 0 rules in 17 ms. Remains 174 /174 variables (removed 0) and now considering 230/230 (removed 0) transitions.
// Phase 1: matrix 230 rows 174 cols
[2024-06-01 20:32:26] [INFO ] Computed 23 invariants in 29 ms
[2024-06-01 20:32:27] [INFO ] Implicit Places using invariants in 457 ms returned []
[2024-06-01 20:32:27] [INFO ] Invariant cache hit.
[2024-06-01 20:32:27] [INFO ] Implicit Places using invariants and state equation in 275 ms returned []
Implicit Place search using SMT with State Equation took 792 ms to find 0 implicit places.
Running 220 sub problems to find dead transitions.
[2024-06-01 20:32:27] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/164 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/164 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 2 (OVERLAPS) 10/174 variables, 21/23 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/174 variables, 0/23 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 4 (OVERLAPS) 230/404 variables, 174/197 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/404 variables, 0/197 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 6 (OVERLAPS) 0/404 variables, 0/197 constraints. Problems are: Problem set: 0 solved, 220 unsolved
No progress, stopping.
After SMT solving in domain Real declared 404/404 variables, and 197 constraints, problems are : Problem set: 0 solved, 220 unsolved in 9957 ms.
Refiners :[Positive P Invariants (semi-flows): 23/23 constraints, State Equation: 174/174 constraints, PredecessorRefiner: 220/220 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 220 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/164 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/164 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 2 (OVERLAPS) 10/174 variables, 21/23 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/174 variables, 0/23 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 4 (OVERLAPS) 230/404 variables, 174/197 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/404 variables, 220/417 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/404 variables, 0/417 constraints. Problems are: Problem set: 0 solved, 220 unsolved
At refinement iteration 7 (OVERLAPS) 0/404 variables, 0/417 constraints. Problems are: Problem set: 0 solved, 220 unsolved
No progress, stopping.
After SMT solving in domain Int declared 404/404 variables, and 417 constraints, problems are : Problem set: 0 solved, 220 unsolved in 12174 ms.
Refiners :[Positive P Invariants (semi-flows): 23/23 constraints, State Equation: 174/174 constraints, PredecessorRefiner: 220/220 constraints, Known Traps: 0/0 constraints]
After SMT, in 22558ms problems are : Problem set: 0 solved, 220 unsolved
Search for dead transitions found 0 dead transitions in 22590ms
Finished structural reductions in LTL mode , in 1 iterations and 23432 ms. Remains : 174/174 places, 230/230 transitions.
Support contains 174 out of 174 places after structural reductions.
[2024-06-01 20:32:50] [INFO ] Flatten gal took : 81 ms
[2024-06-01 20:32:50] [INFO ] Flatten gal took : 81 ms
[2024-06-01 20:32:51] [INFO ] Input system was already deterministic with 230 transitions.
Reduction of identical properties reduced properties to check from 69 to 65
RANDOM walk for 40000 steps (8 resets) in 2086 ms. (19 steps per ms) remains 0/65 properties
[2024-06-01 20:32:51] [INFO ] Flatten gal took : 28 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 35 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 230 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Applied a total of 0 rules in 3 ms. Remains 174 /174 variables (removed 0) and now considering 230/230 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 174/174 places, 230/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 16 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 19 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 230 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 15 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 17 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 19 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 5 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 13 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Applied a total of 0 rules in 4 ms. Remains 174 /174 variables (removed 0) and now considering 230/230 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 174/174 places, 230/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 16 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 230 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 20 Pre rules applied. Total rules applied 0 place count 174 transition count 210
Deduced a syphon composed of 20 places in 1 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 0 with 40 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 32 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 12 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 13 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Performed 40 Post agglomeration using F-continuation condition.Transition count delta: 40
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 174 transition count 190
Reduce places removed 40 places and 0 transitions.
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 1 with 60 rules applied. Total rules applied 100 place count 134 transition count 170
Applied a total of 100 rules in 17 ms. Remains 134 /174 variables (removed 40) and now considering 170/230 (removed 60) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 134/174 places, 170/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 9 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 11 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 5 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 11 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 12 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 9 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 11 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 14 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 6 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:52] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:52] [INFO ] Input system was already deterministic with 210 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 155 transition count 211
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 155 transition count 211
Applied a total of 38 rules in 5 ms. Remains 155 /174 variables (removed 19) and now considering 211/230 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 155/174 places, 211/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 11 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 211 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 158 transition count 214
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 158 transition count 214
Applied a total of 32 rules in 4 ms. Remains 158 /174 variables (removed 16) and now considering 214/230 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 158/174 places, 214/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 214 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 155 transition count 211
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 155 transition count 211
Applied a total of 38 rules in 5 ms. Remains 155 /174 variables (removed 19) and now considering 211/230 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 155/174 places, 211/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 13 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 211 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 155 transition count 211
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 155 transition count 211
Applied a total of 38 rules in 5 ms. Remains 155 /174 variables (removed 19) and now considering 211/230 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 155/174 places, 211/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 211 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 40 transitions
Trivial Post-agglo rules discarded 40 transitions
Performed 40 trivial Post agglomeration. Transition count delta: 40
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 174 transition count 190
Reduce places removed 40 places and 0 transitions.
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 1 with 60 rules applied. Total rules applied 100 place count 134 transition count 170
Performed 19 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 19 Pre rules applied. Total rules applied 100 place count 134 transition count 151
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 2 with 38 rules applied. Total rules applied 138 place count 115 transition count 151
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 139 place count 114 transition count 131
Iterating global reduction 2 with 1 rules applied. Total rules applied 140 place count 114 transition count 131
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 150 place count 104 transition count 121
Iterating global reduction 2 with 10 rules applied. Total rules applied 160 place count 104 transition count 121
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 169 place count 95 transition count 103
Iterating global reduction 2 with 9 rules applied. Total rules applied 178 place count 95 transition count 103
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 187 place count 86 transition count 94
Iterating global reduction 2 with 9 rules applied. Total rules applied 196 place count 86 transition count 94
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 2 with 9 rules applied. Total rules applied 205 place count 86 transition count 85
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 9 Pre rules applied. Total rules applied 205 place count 86 transition count 76
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 3 with 18 rules applied. Total rules applied 223 place count 77 transition count 76
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 3 with 21 rules applied. Total rules applied 244 place count 66 transition count 66
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 3 with 18 rules applied. Total rules applied 262 place count 57 transition count 57
Applied a total of 262 rules in 43 ms. Remains 57 /174 variables (removed 117) and now considering 57/230 (removed 173) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 43 ms. Remains : 57/174 places, 57/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 2 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 2 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 57 transitions.
Starting structural reductions in LTL mode, iteration 0 : 174/174 places, 230/230 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 154 transition count 210
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 154 transition count 210
Applied a total of 40 rules in 4 ms. Remains 154 /174 variables (removed 20) and now considering 210/230 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 154/174 places, 210/230 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:32:53] [INFO ] Input system was already deterministic with 210 transitions.
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:32:53] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:32:53] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 35 ms.
[2024-06-01 20:32:53] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 174 places, 230 transitions and 690 arcs took 8 ms.
Total runtime 27677 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-00
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-01
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-02
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-03
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-04
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-05
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-06
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-07
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-08
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-09
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-10
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-11
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-12
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-13
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-14
Could not compute solution for formula : UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-15

BK_STOP 1717273974200

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/520/ctl_0_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/520/ctl_1_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/520/ctl_2_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/520/ctl_3_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/520/ctl_4_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/520/ctl_5_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/520/ctl_6_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/520/ctl_7_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/520/ctl_8_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/520/ctl_9_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/520/ctl_10_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/520/ctl_11_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/520/ctl_12_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/520/ctl_13_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/520/ctl_14_
ctl formula name UtilityControlRoom-PT-Z2T4N10-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/520/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-PT-Z2T4N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701111000210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N10.tgz
mv UtilityControlRoom-PT-Z2T4N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;