Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r544-smll-171701110900162.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-PT-Z2T3N08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701110900162
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 28K Apr 13 05:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 13 05:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 25K Apr 13 05:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 120K Apr 13 05:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 38K Apr 13 05:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 210K Apr 13 05:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 46K Apr 13 05:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 198K Apr 13 05:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 93K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717272041313

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T3N08
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 20:00:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 20:00:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 20:00:43] [INFO ] Load time of PNML (sax parser for PT used): 193 ms
[2024-06-01 20:00:43] [INFO ] Transformed 140 places.
[2024-06-01 20:00:43] [INFO ] Transformed 216 transitions.
[2024-06-01 20:00:43] [INFO ] Parsed PT model containing 140 places and 216 transitions and 680 arcs in 542 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 29 ms.
[2024-06-01 20:00:43] [INFO ] Reduced 8 identical enabling conditions.
[2024-06-01 20:00:43] [INFO ] Reduced 8 identical enabling conditions.
[2024-06-01 20:00:43] [INFO ] Reduced 8 identical enabling conditions.
Ensure Unique test removed 32 transitions
Reduce redundant transitions removed 32 transitions.
Support contains 140 out of 140 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Applied a total of 0 rules in 15 ms. Remains 140 /140 variables (removed 0) and now considering 184/184 (removed 0) transitions.
// Phase 1: matrix 184 rows 140 cols
[2024-06-01 20:00:43] [INFO ] Computed 19 invariants in 25 ms
[2024-06-01 20:00:44] [INFO ] Implicit Places using invariants in 318 ms returned []
[2024-06-01 20:00:44] [INFO ] Invariant cache hit.
[2024-06-01 20:00:44] [INFO ] Implicit Places using invariants and state equation in 238 ms returned []
Implicit Place search using SMT with State Equation took 602 ms to find 0 implicit places.
Running 176 sub problems to find dead transitions.
[2024-06-01 20:00:44] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/132 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/132 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 2 (OVERLAPS) 8/140 variables, 17/19 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/140 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 4 (OVERLAPS) 184/324 variables, 140/159 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/324 variables, 0/159 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 6 (OVERLAPS) 0/324 variables, 0/159 constraints. Problems are: Problem set: 0 solved, 176 unsolved
No progress, stopping.
After SMT solving in domain Real declared 324/324 variables, and 159 constraints, problems are : Problem set: 0 solved, 176 unsolved in 5907 ms.
Refiners :[Positive P Invariants (semi-flows): 19/19 constraints, State Equation: 140/140 constraints, PredecessorRefiner: 176/176 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 176 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/132 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/132 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 2 (OVERLAPS) 8/140 variables, 17/19 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/140 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 4 (OVERLAPS) 184/324 variables, 140/159 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/324 variables, 176/335 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/324 variables, 0/335 constraints. Problems are: Problem set: 0 solved, 176 unsolved
At refinement iteration 7 (OVERLAPS) 0/324 variables, 0/335 constraints. Problems are: Problem set: 0 solved, 176 unsolved
No progress, stopping.
After SMT solving in domain Int declared 324/324 variables, and 335 constraints, problems are : Problem set: 0 solved, 176 unsolved in 7079 ms.
Refiners :[Positive P Invariants (semi-flows): 19/19 constraints, State Equation: 140/140 constraints, PredecessorRefiner: 176/176 constraints, Known Traps: 0/0 constraints]
After SMT, in 13252ms problems are : Problem set: 0 solved, 176 unsolved
Search for dead transitions found 0 dead transitions in 13279ms
Finished structural reductions in LTL mode , in 1 iterations and 13930 ms. Remains : 140/140 places, 184/184 transitions.
Support contains 140 out of 140 places after structural reductions.
[2024-06-01 20:00:58] [INFO ] Flatten gal took : 60 ms
[2024-06-01 20:00:58] [INFO ] Flatten gal took : 39 ms
[2024-06-01 20:00:58] [INFO ] Input system was already deterministic with 184 transitions.
Reduction of identical properties reduced properties to check from 65 to 63
RANDOM walk for 37943 steps (8 resets) in 2034 ms. (18 steps per ms) remains 0/63 properties
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 18 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 184 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Applied a total of 0 rules in 3 ms. Remains 140 /140 variables (removed 0) and now considering 184/184 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 140/140 places, 184/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 16 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 19 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 124 transition count 168
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 124 transition count 168
Applied a total of 32 rules in 12 ms. Remains 124 /140 variables (removed 16) and now considering 168/184 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 124/140 places, 168/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 168 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 124 transition count 168
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 124 transition count 168
Applied a total of 32 rules in 10 ms. Remains 124 /140 variables (removed 16) and now considering 168/184 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 124/140 places, 168/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 13 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 168 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 124 transition count 168
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 124 transition count 168
Applied a total of 32 rules in 5 ms. Remains 124 /140 variables (removed 16) and now considering 168/184 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 124/140 places, 168/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 9 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 168 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 140 transition count 152
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 48 rules applied. Total rules applied 80 place count 108 transition count 136
Applied a total of 80 rules in 26 ms. Remains 108 /140 variables (removed 32) and now considering 136/184 (removed 48) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 108/140 places, 136/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 136 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Applied a total of 0 rules in 9 ms. Remains 140 /140 variables (removed 0) and now considering 184/184 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 140/140 places, 184/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Applied a total of 0 rules in 2 ms. Remains 140 /140 variables (removed 0) and now considering 184/184 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 140/140 places, 184/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 10 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 11 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 124 transition count 168
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 124 transition count 168
Applied a total of 32 rules in 5 ms. Remains 124 /140 variables (removed 16) and now considering 168/184 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 124/140 places, 168/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 168 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 126 transition count 170
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 126 transition count 170
Applied a total of 28 rules in 10 ms. Remains 126 /140 variables (removed 14) and now considering 170/184 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 126/140 places, 170/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 124 transition count 168
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 124 transition count 168
Applied a total of 32 rules in 12 ms. Remains 124 /140 variables (removed 16) and now considering 168/184 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 124/140 places, 168/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 168 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 125 transition count 169
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 125 transition count 169
Applied a total of 30 rules in 6 ms. Remains 125 /140 variables (removed 15) and now considering 169/184 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 125/140 places, 169/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 169 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Performed 31 Post agglomeration using F-continuation condition.Transition count delta: 31
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 140 transition count 153
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 47 rules applied. Total rules applied 78 place count 109 transition count 137
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 13 Pre rules applied. Total rules applied 78 place count 109 transition count 124
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 104 place count 96 transition count 124
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 105 place count 96 transition count 124
Applied a total of 105 rules in 25 ms. Remains 96 /140 variables (removed 44) and now considering 124/184 (removed 60) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 96/140 places, 124/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 6 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 6 ms
[2024-06-01 20:00:59] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 125 transition count 169
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 125 transition count 169
Applied a total of 30 rules in 5 ms. Remains 125 /140 variables (removed 15) and now considering 169/184 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 125/140 places, 169/184 transitions.
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:00:59] [INFO ] Flatten gal took : 9 ms
[2024-06-01 20:01:00] [INFO ] Input system was already deterministic with 169 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Iterating post reduction 0 with 29 rules applied. Total rules applied 29 place count 140 transition count 155
Reduce places removed 29 places and 0 transitions.
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 1 with 44 rules applied. Total rules applied 73 place count 111 transition count 140
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 73 place count 111 transition count 126
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 101 place count 97 transition count 126
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 102 place count 96 transition count 125
Iterating global reduction 2 with 1 rules applied. Total rules applied 103 place count 96 transition count 125
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 14 rules applied. Total rules applied 117 place count 89 transition count 118
Applied a total of 117 rules in 23 ms. Remains 89 /140 variables (removed 51) and now considering 118/184 (removed 66) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 89/140 places, 118/184 transitions.
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 5 ms
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 6 ms
[2024-06-01 20:01:00] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Performed 28 Post agglomeration using F-continuation condition.Transition count delta: 28
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 140 transition count 156
Reduce places removed 28 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 42 rules applied. Total rules applied 70 place count 112 transition count 142
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 13 Pre rules applied. Total rules applied 70 place count 112 transition count 129
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 96 place count 99 transition count 129
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 98 place count 97 transition count 127
Iterating global reduction 2 with 2 rules applied. Total rules applied 100 place count 97 transition count 127
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 112 place count 91 transition count 121
Applied a total of 112 rules in 17 ms. Remains 91 /140 variables (removed 49) and now considering 121/184 (removed 63) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 91/140 places, 121/184 transitions.
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 6 ms
[2024-06-01 20:01:00] [INFO ] Input system was already deterministic with 121 transitions.
Starting structural reductions in LTL mode, iteration 0 : 140/140 places, 184/184 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 126 transition count 170
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 126 transition count 170
Applied a total of 28 rules in 3 ms. Remains 126 /140 variables (removed 14) and now considering 170/184 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 126/140 places, 170/184 transitions.
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 7 ms
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 8 ms
[2024-06-01 20:01:00] [INFO ] Input system was already deterministic with 170 transitions.
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:01:00] [INFO ] Flatten gal took : 14 ms
[2024-06-01 20:01:00] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 19 ms.
[2024-06-01 20:01:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 140 places, 184 transitions and 552 arcs took 6 ms.
Total runtime 17215 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-00
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-01
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-02
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-03
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-04
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-05
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-06
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-07
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-08
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-09
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-10
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-11
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-12
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-13
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-14
Could not compute solution for formula : UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-15

BK_STOP 1717272060790

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/514/ctl_0_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/514/ctl_1_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/514/ctl_2_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/514/ctl_3_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/514/ctl_4_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/514/ctl_5_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/514/ctl_6_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/514/ctl_7_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/514/ctl_8_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/514/ctl_9_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/514/ctl_10_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/514/ctl_11_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/514/ctl_12_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/514/ctl_13_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/514/ctl_14_
ctl formula name UtilityControlRoom-PT-Z2T3N08-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/514/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T3N08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-PT-Z2T3N08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701110900162"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T3N08.tgz
mv UtilityControlRoom-PT-Z2T3N08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;