About the Execution of LTSMin+red for UtilityControlRoom-COL-Z4T4N08
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
764.331 | 71873.00 | 103647.00 | 349.70 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r544-smll-171701110800130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-COL-Z4T4N08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701110800130
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 8.3K Apr 13 05:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Apr 13 05:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Apr 13 05:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 13 05:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 06:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 102K Apr 13 06:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 06:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Apr 13 06:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 29K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717267115388
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z4T4N08
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 18:38:37] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 18:38:37] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 18:38:37] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 18:38:37] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 18:38:38] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1018 ms
[2024-06-01 18:38:38] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 302 PT places and 600.0 transition bindings in 24 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
[2024-06-01 18:38:38] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 6 ms.
[2024-06-01 18:38:38] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 10 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
RANDOM walk for 529 steps (0 resets) in 27 ms. (18 steps per ms) remains 0/14 properties
[2024-06-01 18:38:38] [INFO ] Flatten gal took : 35 ms
[2024-06-01 18:38:38] [INFO ] Flatten gal took : 6 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(8), Z(4), Z(4)] of place MovetoZ breaks symmetries in sort Z
[2024-06-01 18:38:38] [INFO ] Unfolded HLPN to a Petri net with 302 places and 600 transitions 1928 arcs in 88 ms.
[2024-06-01 18:38:38] [INFO ] Unfolded 16 HLPN properties in 3 ms.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
[2024-06-01 18:38:38] [INFO ] Reduced 24 identical enabling conditions.
Ensure Unique test removed 128 transitions
Reduce redundant transitions removed 128 transitions.
Support contains 302 out of 302 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 16 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
// Phase 1: matrix 472 rows 302 cols
[2024-06-01 18:38:39] [INFO ] Computed 19 invariants in 43 ms
[2024-06-01 18:38:39] [INFO ] Implicit Places using invariants in 376 ms returned []
[2024-06-01 18:38:39] [INFO ] Invariant cache hit.
[2024-06-01 18:38:40] [INFO ] Implicit Places using invariants and state equation in 509 ms returned []
Implicit Place search using SMT with State Equation took 962 ms to find 0 implicit places.
Running 464 sub problems to find dead transitions.
[2024-06-01 18:38:40] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/294 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/294 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 2 (OVERLAPS) 8/302 variables, 17/19 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/302 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 4 (OVERLAPS) 472/774 variables, 302/321 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/774 variables, 0/321 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 6 (OVERLAPS) 0/774 variables, 0/321 constraints. Problems are: Problem set: 0 solved, 464 unsolved
No progress, stopping.
After SMT solving in domain Real declared 774/774 variables, and 321 constraints, problems are : Problem set: 0 solved, 464 unsolved in 29647 ms.
Refiners :[Positive P Invariants (semi-flows): 19/19 constraints, State Equation: 302/302 constraints, PredecessorRefiner: 464/464 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 464 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/294 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/294 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 2 (OVERLAPS) 8/302 variables, 17/19 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/302 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 4 (OVERLAPS) 472/774 variables, 302/321 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/774 variables, 464/785 constraints. Problems are: Problem set: 0 solved, 464 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/774 variables, 0/785 constraints. Problems are: Problem set: 0 solved, 464 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 774/774 variables, and 785 constraints, problems are : Problem set: 0 solved, 464 unsolved in 30042 ms.
Refiners :[Positive P Invariants (semi-flows): 19/19 constraints, State Equation: 302/302 constraints, PredecessorRefiner: 464/464 constraints, Known Traps: 0/0 constraints]
After SMT, in 60850ms problems are : Problem set: 0 solved, 464 unsolved
Search for dead transitions found 0 dead transitions in 60903ms
Finished structural reductions in LTL mode , in 1 iterations and 61905 ms. Remains : 302/302 places, 472/472 transitions.
Support contains 302 out of 302 places after structural reductions.
[2024-06-01 18:39:41] [INFO ] Flatten gal took : 111 ms
[2024-06-01 18:39:41] [INFO ] Flatten gal took : 94 ms
[2024-06-01 18:39:42] [INFO ] Input system was already deterministic with 472 transitions.
Reduction of identical properties reduced properties to check from 30 to 28
RANDOM walk for 294 steps (0 resets) in 86 ms. (3 steps per ms) remains 0/28 properties
[2024-06-01 18:39:42] [INFO ] Flatten gal took : 59 ms
[2024-06-01 18:39:43] [INFO ] Flatten gal took : 104 ms
[2024-06-01 18:39:43] [INFO ] Input system was already deterministic with 472 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 37 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:43] [INFO ] Flatten gal took : 46 ms
[2024-06-01 18:39:43] [INFO ] Flatten gal took : 34 ms
[2024-06-01 18:39:43] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Performed 128 Post agglomeration using F-continuation condition.Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 302 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 174 transition count 312
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 288 place count 174 transition count 280
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 352 place count 142 transition count 280
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 1 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 2 with 16 rules applied. Total rules applied 368 place count 134 transition count 272
Applied a total of 368 rules in 67 ms. Remains 134 /302 variables (removed 168) and now considering 272/472 (removed 200) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 67 ms. Remains : 134/302 places, 272/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 16 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 21 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 272 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 3 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 25 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 27 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 302 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 174 transition count 312
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 291 place count 171 transition count 216
Iterating global reduction 2 with 3 rules applied. Total rules applied 294 place count 171 transition count 216
Applied a total of 294 rules in 31 ms. Remains 171 /302 variables (removed 131) and now considering 216/472 (removed 256) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 171/302 places, 216/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 9 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 216 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 7 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 22 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 24 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 8 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 21 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 22 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 5 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 206/302 places, 376/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 16 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 3 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 20 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 5 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 206/302 places, 376/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 15 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 17 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 302 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 174 transition count 312
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 288 place count 174 transition count 280
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 352 place count 142 transition count 280
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 355 place count 139 transition count 184
Iterating global reduction 2 with 3 rules applied. Total rules applied 358 place count 139 transition count 184
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 2 with 17 rules applied. Total rules applied 375 place count 130 transition count 176
Applied a total of 375 rules in 39 ms. Remains 130 /302 variables (removed 172) and now considering 176/472 (removed 296) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 130/302 places, 176/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 18:39:44] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 15 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 16 ms
[2024-06-01 18:39:44] [INFO ] Flatten gal took : 17 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 2 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 21 ms
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 26 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 3 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 17 ms
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 22 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 2 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 17 ms
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 19 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 22 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 302/302 places, 472/472 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 21 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 7 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 206/302 places, 376/472 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 12 ms
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 13 ms
[2024-06-01 18:39:45] [INFO ] Input system was already deterministic with 376 transitions.
[2024-06-01 18:39:45] [INFO ] Flatten gal took : 70 ms
[2024-06-01 18:39:46] [INFO ] Flatten gal took : 67 ms
[2024-06-01 18:39:46] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 53 ms.
[2024-06-01 18:39:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 302 places, 472 transitions and 1416 arcs took 8 ms.
Total runtime 69391 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-00
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-01
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-02
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-03
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-04
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-05
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-06
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-07
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-08
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-09
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-10
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-11
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-12
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-13
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-14
Could not compute solution for formula : UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-15
BK_STOP 1717267187261
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/519/ctl_0_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/519/ctl_1_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/519/ctl_2_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/519/ctl_3_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/519/ctl_4_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/519/ctl_5_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/519/ctl_6_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/519/ctl_7_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/519/ctl_8_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/519/ctl_9_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/519/ctl_10_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/519/ctl_11_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/519/ctl_12_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/519/ctl_13_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/519/ctl_14_
ctl formula name UtilityControlRoom-COL-Z4T4N08-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/519/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z4T4N08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-COL-Z4T4N08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701110800130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z4T4N08.tgz
mv UtilityControlRoom-COL-Z4T4N08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;