About the Execution of LTSMin+red for UtilityControlRoom-COL-Z4T4N04
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
418.052 | 31912.00 | 53552.00 | 400.40 | ????T????????T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r544-smll-171701110800114.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-COL-Z4T4N04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701110800114
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 7.7K Apr 13 05:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Apr 13 05:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Apr 13 05:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 13 05:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.7K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 13 05:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 151K Apr 13 05:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 13 05:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K Apr 13 05:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 29K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717265618136
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z4T4N04
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 18:13:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 18:13:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 18:13:40] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 18:13:40] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 18:13:41] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1000 ms
[2024-06-01 18:13:41] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 154 PT places and 300.0 transition bindings in 25 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
[2024-06-01 18:13:41] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 6 ms.
[2024-06-01 18:13:41] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 9 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 15 to 14
RANDOM walk for 40006 steps (8 resets) in 614 ms. (65 steps per ms) remains 1/14 properties
BEST_FIRST walk for 40003 steps (8 resets) in 301 ms. (132 steps per ms) remains 1/1 properties
// Phase 1: matrix 11 rows 13 cols
[2024-06-01 18:13:41] [INFO ] Computed 5 invariants in 5 ms
Problem AtomicPropp8 is UNSAT
After SMT solving in domain Real declared 4/24 variables, and 0 constraints, problems are : Problem set: 1 solved, 0 unsolved in 160 ms.
Refiners :[Positive P Invariants (semi-flows): 0/5 constraints, State Equation: 0/13 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 225ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 9 simplifications.
FORMULA UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 18:13:42] [INFO ] Flatten gal took : 24 ms
[2024-06-01 18:13:42] [INFO ] Flatten gal took : 6 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(4), Z(4), Z(4)] of place MovetoZ breaks symmetries in sort Z
[2024-06-01 18:13:42] [INFO ] Unfolded HLPN to a Petri net with 154 places and 300 transitions 964 arcs in 35 ms.
[2024-06-01 18:13:42] [INFO ] Unfolded 15 HLPN properties in 1 ms.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
[2024-06-01 18:13:42] [INFO ] Reduced 12 identical enabling conditions.
Ensure Unique test removed 64 transitions
Reduce redundant transitions removed 64 transitions.
Support contains 154 out of 154 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 11 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
// Phase 1: matrix 236 rows 154 cols
[2024-06-01 18:13:42] [INFO ] Computed 11 invariants in 24 ms
[2024-06-01 18:13:42] [INFO ] Implicit Places using invariants in 143 ms returned []
[2024-06-01 18:13:42] [INFO ] Invariant cache hit.
[2024-06-01 18:13:42] [INFO ] Implicit Places using invariants and state equation in 217 ms returned []
Implicit Place search using SMT with State Equation took 375 ms to find 0 implicit places.
Running 232 sub problems to find dead transitions.
[2024-06-01 18:13:42] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/150 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/150 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 2 (OVERLAPS) 4/154 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/154 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 4 (OVERLAPS) 236/390 variables, 154/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/390 variables, 0/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 6 (OVERLAPS) 0/390 variables, 0/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
No progress, stopping.
After SMT solving in domain Real declared 390/390 variables, and 165 constraints, problems are : Problem set: 0 solved, 232 unsolved in 10403 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 154/154 constraints, PredecessorRefiner: 232/232 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 232 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/150 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/150 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 2 (OVERLAPS) 4/154 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/154 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 4 (OVERLAPS) 236/390 variables, 154/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/390 variables, 232/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/390 variables, 0/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 7 (OVERLAPS) 0/390 variables, 0/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
No progress, stopping.
After SMT solving in domain Int declared 390/390 variables, and 397 constraints, problems are : Problem set: 0 solved, 232 unsolved in 13143 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 154/154 constraints, PredecessorRefiner: 232/232 constraints, Known Traps: 0/0 constraints]
After SMT, in 23987ms problems are : Problem set: 0 solved, 232 unsolved
Search for dead transitions found 0 dead transitions in 24004ms
Finished structural reductions in LTL mode , in 1 iterations and 24415 ms. Remains : 154/154 places, 236/236 transitions.
Support contains 154 out of 154 places after structural reductions.
[2024-06-01 18:14:06] [INFO ] Flatten gal took : 57 ms
[2024-06-01 18:14:07] [INFO ] Flatten gal took : 83 ms
[2024-06-01 18:14:07] [INFO ] Input system was already deterministic with 236 transitions.
RANDOM walk for 1620 steps (0 resets) in 23 ms. (67 steps per ms) remains 0/28 properties
[2024-06-01 18:14:07] [INFO ] Flatten gal took : 36 ms
[2024-06-01 18:14:07] [INFO ] Flatten gal took : 48 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 3 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 21 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 23 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Applied a total of 176 rules in 45 ms. Remains 74 /154 variables (removed 80) and now considering 140/236 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 74/154 places, 140/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 9 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 15 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 18 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 3 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 16 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 16 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 12 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 13 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 3 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 12 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 13 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Applied a total of 176 rules in 17 ms. Remains 74 /154 variables (removed 80) and now considering 140/236 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 74/154 places, 140/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 7 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 8 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 64 transitions
Trivial Post-agglo rules discarded 64 transitions
Performed 64 trivial Post agglomeration. Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 179 place count 71 transition count 92
Iterating global reduction 2 with 3 rules applied. Total rules applied 182 place count 71 transition count 92
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 9 rules applied. Total rules applied 191 place count 66 transition count 88
Applied a total of 191 rules in 33 ms. Remains 66 /154 variables (removed 88) and now considering 88/236 (removed 148) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 66/154 places, 88/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 6 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 4 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 88 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 4 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 106/154 places, 188/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 11 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 12 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 12 ms
[2024-06-01 18:14:08] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 7 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 106/154 places, 188/236 transitions.
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:14:08] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:14:09] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 64 transitions
Trivial Post-agglo rules discarded 64 transitions
Performed 64 trivial Post agglomeration. Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 179 place count 71 transition count 92
Iterating global reduction 2 with 3 rules applied. Total rules applied 182 place count 71 transition count 92
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 194 place count 59 transition count 80
Iterating global reduction 2 with 12 rules applied. Total rules applied 206 place count 59 transition count 80
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 218 place count 47 transition count 56
Iterating global reduction 2 with 12 rules applied. Total rules applied 230 place count 47 transition count 56
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 242 place count 35 transition count 44
Iterating global reduction 2 with 12 rules applied. Total rules applied 254 place count 35 transition count 44
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 266 place count 35 transition count 32
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 4 Pre rules applied. Total rules applied 266 place count 35 transition count 28
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 274 place count 31 transition count 28
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 282 place count 27 transition count 24
Applied a total of 282 rules in 19 ms. Remains 27 /154 variables (removed 127) and now considering 24/236 (removed 212) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 27/154 places, 24/236 transitions.
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 1 ms
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 1 ms
[2024-06-01 18:14:09] [INFO ] Input system was already deterministic with 24 transitions.
RANDOM walk for 28 steps (0 resets) in 4 ms. (5 steps per ms) remains 0/1 properties
FORMULA UtilityControlRoom-COL-Z4T4N04-CTLFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 6 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 106/154 places, 188/236 transitions.
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 9 ms
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 9 ms
[2024-06-01 18:14:09] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 154/154 places, 236/236 transitions.
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 9 ms
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 10 ms
[2024-06-01 18:14:09] [INFO ] Input system was already deterministic with 236 transitions.
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 27 ms
[2024-06-01 18:14:09] [INFO ] Flatten gal took : 27 ms
[2024-06-01 18:14:09] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 38 ms.
[2024-06-01 18:14:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 154 places, 236 transitions and 708 arcs took 7 ms.
Total runtime 29461 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z4T4N04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-COL-Z4T4N04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701110800114"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z4T4N04.tgz
mv UtilityControlRoom-COL-Z4T4N04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;