Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r544-smll-171701110500010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is UtilityControlRoom-COL-Z2T3N04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r544-smll-171701110500010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 572K
-rw-r--r-- 1 mcc users 9.5K Apr 13 05:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 90K Apr 13 05:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Apr 13 05:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 13 05:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 08:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 08:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 05:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Apr 13 05:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Apr 13 05:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 123K Apr 13 05:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 29K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717257506111

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T3N04
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:58:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:58:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:58:28] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 15:58:28] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 15:58:29] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1062 ms
[2024-06-01 15:58:29] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 72 PT places and 108.0 transition bindings in 25 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
[2024-06-01 15:58:29] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 6 ms.
[2024-06-01 15:58:29] [INFO ] Skeletonized 16 HLPN properties in 3 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 9 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 18 to 17
RANDOM walk for 40002 steps (8 resets) in 953 ms. (41 steps per ms) remains 1/17 properties
BEST_FIRST walk for 40004 steps (8 resets) in 440 ms. (90 steps per ms) remains 1/1 properties
// Phase 1: matrix 11 rows 13 cols
[2024-06-01 15:58:29] [INFO ] Computed 5 invariants in 4 ms
Problem AtomicPropp5 is UNSAT
After SMT solving in domain Real declared 7/24 variables, and 0 constraints, problems are : Problem set: 1 solved, 0 unsolved in 177 ms.
Refiners :[Positive P Invariants (semi-flows): 0/5 constraints, State Equation: 0/13 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 228ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 9 simplifications.
[2024-06-01 15:58:30] [INFO ] Flatten gal took : 25 ms
[2024-06-01 15:58:30] [INFO ] Flatten gal took : 6 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(4), Z(2), Z(2)] of place MovetoZ breaks symmetries in sort Z
[2024-06-01 15:58:30] [INFO ] Unfolded HLPN to a Petri net with 72 places and 108 transitions 340 arcs in 23 ms.
[2024-06-01 15:58:30] [INFO ] Unfolded 16 HLPN properties in 0 ms.
[2024-06-01 15:58:30] [INFO ] Reduced 4 identical enabling conditions.
[2024-06-01 15:58:30] [INFO ] Reduced 4 identical enabling conditions.
[2024-06-01 15:58:30] [INFO ] Reduced 4 identical enabling conditions.
[2024-06-01 15:58:30] [INFO ] Reduced 4 identical enabling conditions.
[2024-06-01 15:58:30] [INFO ] Reduced 4 identical enabling conditions.
Ensure Unique test removed 16 transitions
Reduce redundant transitions removed 16 transitions.
Support contains 72 out of 72 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 9 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
// Phase 1: matrix 92 rows 72 cols
[2024-06-01 15:58:30] [INFO ] Computed 11 invariants in 15 ms
[2024-06-01 15:58:30] [INFO ] Implicit Places using invariants in 99 ms returned []
[2024-06-01 15:58:30] [INFO ] Invariant cache hit.
[2024-06-01 15:58:30] [INFO ] Implicit Places using invariants and state equation in 126 ms returned []
Implicit Place search using SMT with State Equation took 238 ms to find 0 implicit places.
Running 88 sub problems to find dead transitions.
[2024-06-01 15:58:30] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/68 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/68 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 2 (OVERLAPS) 4/72 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/72 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 4 (OVERLAPS) 92/164 variables, 72/83 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/164 variables, 0/83 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 6 (OVERLAPS) 0/164 variables, 0/83 constraints. Problems are: Problem set: 0 solved, 88 unsolved
No progress, stopping.
After SMT solving in domain Real declared 164/164 variables, and 83 constraints, problems are : Problem set: 0 solved, 88 unsolved in 2513 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 72/72 constraints, PredecessorRefiner: 88/88 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 88 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/68 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/68 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 2 (OVERLAPS) 4/72 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/72 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 4 (OVERLAPS) 92/164 variables, 72/83 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/164 variables, 88/171 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/164 variables, 0/171 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 7 (OVERLAPS) 0/164 variables, 0/171 constraints. Problems are: Problem set: 0 solved, 88 unsolved
No progress, stopping.
After SMT solving in domain Int declared 164/164 variables, and 171 constraints, problems are : Problem set: 0 solved, 88 unsolved in 2395 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 72/72 constraints, PredecessorRefiner: 88/88 constraints, Known Traps: 0/0 constraints]
After SMT, in 5005ms problems are : Problem set: 0 solved, 88 unsolved
Search for dead transitions found 0 dead transitions in 5012ms
Finished structural reductions in LTL mode , in 1 iterations and 5282 ms. Remains : 72/72 places, 92/92 transitions.
Support contains 72 out of 72 places after structural reductions.
[2024-06-01 15:58:35] [INFO ] Flatten gal took : 25 ms
[2024-06-01 15:58:35] [INFO ] Flatten gal took : 39 ms
[2024-06-01 15:58:36] [INFO ] Input system was already deterministic with 92 transitions.
Reduction of identical properties reduced properties to check from 34 to 30
RANDOM walk for 40000 steps (8 resets) in 532 ms. (75 steps per ms) remains 1/30 properties
BEST_FIRST walk for 40004 steps (8 resets) in 895 ms. (44 steps per ms) remains 1/1 properties
[2024-06-01 15:58:36] [INFO ] Invariant cache hit.
Problem AtomicPropp18 is UNSAT
After SMT solving in domain Real declared 32/164 variables, and 0 constraints, problems are : Problem set: 1 solved, 0 unsolved in 35 ms.
Refiners :[Positive P Invariants (semi-flows): 0/11 constraints, State Equation: 0/72 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 71ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 25 ms
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 24 ms
[2024-06-01 15:58:36] [INFO ] Input system was already deterministic with 92 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 12 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:36] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 1 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 72/72 places, 92/92 transitions.
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:36] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:58:36] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 7 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 72/72 places, 92/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 72 transition count 76
Reduce places removed 16 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 40 place count 56 transition count 68
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 41 place count 55 transition count 60
Iterating global reduction 2 with 1 rules applied. Total rules applied 42 place count 55 transition count 60
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 46 place count 51 transition count 56
Iterating global reduction 2 with 4 rules applied. Total rules applied 50 place count 51 transition count 56
Applied a total of 50 rules in 27 ms. Remains 51 /72 variables (removed 21) and now considering 56/92 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 51/72 places, 56/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 3 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 4 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 1 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 72/72 places, 92/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 4 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 72/72 places, 92/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 6 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Applied a total of 0 rules in 4 ms. Remains 72 /72 variables (removed 0) and now considering 92/92 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 72/72 places, 92/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 72 transition count 76
Reduce places removed 16 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 40 place count 56 transition count 68
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 41 place count 55 transition count 60
Iterating global reduction 2 with 1 rules applied. Total rules applied 42 place count 55 transition count 60
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 46 place count 51 transition count 56
Iterating global reduction 2 with 4 rules applied. Total rules applied 50 place count 51 transition count 56
Applied a total of 50 rules in 8 ms. Remains 51 /72 variables (removed 21) and now considering 56/92 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 51/72 places, 56/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 3 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 2 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 2 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 2 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 92/92 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 64 transition count 84
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 64 transition count 84
Applied a total of 16 rules in 6 ms. Remains 64 /72 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 64/72 places, 84/92 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:58:37] [INFO ] Input system was already deterministic with 84 transitions.
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:58:37] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:58:37] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 18 ms.
[2024-06-01 15:58:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 72 places, 92 transitions and 276 arcs took 5 ms.
Total runtime 9697 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-00
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-01
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-02
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-03
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-04
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-05
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-06
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-07
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-08
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-09
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-10
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-11
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-12
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-13
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-14
Could not compute solution for formula : UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-15

BK_STOP 1717257518165

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/516/ctl_0_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/516/ctl_1_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/516/ctl_2_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/516/ctl_3_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/516/ctl_4_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/516/ctl_5_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/516/ctl_6_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/516/ctl_7_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/516/ctl_8_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/516/ctl_9_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/516/ctl_10_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/516/ctl_11_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/516/ctl_12_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/516/ctl_13_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/516/ctl_14_
ctl formula name UtilityControlRoom-COL-Z2T3N04-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/516/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T3N04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-COL-Z2T3N04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r544-smll-171701110500010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T3N04.tgz
mv UtilityControlRoom-COL-Z2T3N04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;