Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r536-tall-171690533200834.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Szymanski-PT-a08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r536-tall-171690533200834
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 6.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 08:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 08:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 19:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.4K Apr 11 14:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 11 14:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 11 14:57 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 11 14:57 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 08:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 08:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 101K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-00
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-01
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-02
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-03
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-04
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-05
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-06
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-07
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-08
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-09
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-10
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2024-11
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2023-12
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2023-13
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2023-14
FORMULA_NAME Szymanski-PT-a08-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717280926120

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Szymanski-PT-a08
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 22:28:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 22:28:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 22:28:47] [INFO ] Load time of PNML (sax parser for PT used): 76 ms
[2024-06-01 22:28:47] [INFO ] Transformed 61 places.
[2024-06-01 22:28:47] [INFO ] Transformed 224 transitions.
[2024-06-01 22:28:47] [INFO ] Parsed PT model containing 61 places and 224 transitions and 900 arcs in 174 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 8 transitions.
Support contains 36 out of 49 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 49/49 places, 216/216 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 47 transition count 216
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 46 transition count 212
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 46 transition count 212
Applied a total of 4 rules in 27 ms. Remains 46 /49 variables (removed 3) and now considering 212/216 (removed 4) transitions.
[2024-06-01 22:28:47] [INFO ] Flow matrix only has 78 transitions (discarded 134 similar events)
// Phase 1: matrix 78 rows 46 cols
[2024-06-01 22:28:47] [INFO ] Computed 1 invariants in 7 ms
[2024-06-01 22:28:47] [INFO ] Implicit Places using invariants in 202 ms returned []
[2024-06-01 22:28:47] [INFO ] Flow matrix only has 78 transitions (discarded 134 similar events)
[2024-06-01 22:28:47] [INFO ] Invariant cache hit.
[2024-06-01 22:28:47] [INFO ] State equation strengthened by 9 read => feed constraints.
[2024-06-01 22:28:47] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 315 ms to find 0 implicit places.
Running 210 sub problems to find dead transitions.
[2024-06-01 22:28:47] [INFO ] Flow matrix only has 78 transitions (discarded 134 similar events)
[2024-06-01 22:28:47] [INFO ] Invariant cache hit.
[2024-06-01 22:28:47] [INFO ] State equation strengthened by 9 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/46 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/46 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 2 (OVERLAPS) 78/124 variables, 46/47 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/124 variables, 9/56 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/124 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 5 (OVERLAPS) 0/124 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 210 unsolved
No progress, stopping.
After SMT solving in domain Real declared 124/124 variables, and 56 constraints, problems are : Problem set: 0 solved, 210 unsolved in 2506 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 46/46 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 210/210 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 210 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/46 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/46 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 2 (OVERLAPS) 78/124 variables, 46/47 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/124 variables, 9/56 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/124 variables, 210/266 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/124 variables, 0/266 constraints. Problems are: Problem set: 0 solved, 210 unsolved
At refinement iteration 6 (OVERLAPS) 0/124 variables, 0/266 constraints. Problems are: Problem set: 0 solved, 210 unsolved
No progress, stopping.
After SMT solving in domain Int declared 124/124 variables, and 266 constraints, problems are : Problem set: 0 solved, 210 unsolved in 3130 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 46/46 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 210/210 constraints, Known Traps: 0/0 constraints]
After SMT, in 5761ms problems are : Problem set: 0 solved, 210 unsolved
Search for dead transitions found 0 dead transitions in 5777ms
Starting structural reductions in LTL mode, iteration 1 : 46/49 places, 212/216 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6146 ms. Remains : 46/49 places, 212/216 transitions.
Support contains 36 out of 46 places after structural reductions.
[2024-06-01 22:28:53] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 22:28:53] [INFO ] Flatten gal took : 50 ms
[2024-06-01 22:28:53] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Szymanski-PT-a08-CTLFireability-2023-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Szymanski-PT-a08-CTLFireability-2024-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 22:28:53] [INFO ] Flatten gal took : 16 ms
[2024-06-01 22:28:53] [INFO ] Input system was already deterministic with 212 transitions.
Support contains 33 out of 46 places (down from 36) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 47 to 45
RANDOM walk for 40010 steps (56 resets) in 1014 ms. (39 steps per ms) remains 15/45 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 13/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 16 ms. (235 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (9 resets) in 19 ms. (200 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 15 ms. (250 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (9 resets) in 14 ms. (266 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 52 ms. (75 steps per ms) remains 13/13 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 13/13 properties
[2024-06-01 22:28:54] [INFO ] Flow matrix only has 78 transitions (discarded 134 similar events)
[2024-06-01 22:28:54] [INFO ] Invariant cache hit.
[2024-06-01 22:28:54] [INFO ] State equation strengthened by 9 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 13 unsolved
At refinement iteration 1 (OVERLAPS) 24/46 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 13 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/46 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 13 unsolved
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp9 is UNSAT
Problem AtomicPropp28 is UNSAT
Problem AtomicPropp29 is UNSAT
Problem AtomicPropp39 is UNSAT
At refinement iteration 3 (OVERLAPS) 78/124 variables, 46/47 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/124 variables, 9/56 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/124 variables, 0/56 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 6 (OVERLAPS) 0/124 variables, 0/56 constraints. Problems are: Problem set: 5 solved, 8 unsolved
No progress, stopping.
After SMT solving in domain Real declared 124/124 variables, and 56 constraints, problems are : Problem set: 5 solved, 8 unsolved in 214 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 46/46 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 13/13 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 8 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/12 variables, 0/0 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 1 (OVERLAPS) 34/46 variables, 1/1 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/46 variables, 0/1 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 3 (OVERLAPS) 78/124 variables, 46/47 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/124 variables, 9/56 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/124 variables, 8/64 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/124 variables, 0/64 constraints. Problems are: Problem set: 5 solved, 8 unsolved
At refinement iteration 7 (OVERLAPS) 0/124 variables, 0/64 constraints. Problems are: Problem set: 5 solved, 8 unsolved
No progress, stopping.
After SMT solving in domain Int declared 124/124 variables, and 64 constraints, problems are : Problem set: 5 solved, 8 unsolved in 179 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 46/46 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 8/13 constraints, Known Traps: 0/0 constraints]
After SMT, in 409ms problems are : Problem set: 5 solved, 8 unsolved
Fused 8 Parikh solutions to 6 different solutions.
Finished Parikh walk after 369 steps, including 108 resets, run visited all 8 properties in 6 ms. (steps per millisecond=61 )
Parikh walk visited 8 properties in 10 ms.
Successfully simplified 5 atomic propositions for a total of 14 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA Szymanski-PT-a08-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 22:28:55] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Szymanski-PT-a08-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 12 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 212 transitions.
Computed a total of 8 stabilizing places and 32 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 5 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 9 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 10 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Drop transitions (Redundant composition of simpler transitions.) removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 20 place count 42 transition count 184
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 22 place count 40 transition count 176
Iterating global reduction 0 with 2 rules applied. Total rules applied 24 place count 40 transition count 176
Applied a total of 24 rules in 26 ms. Remains 40 /46 variables (removed 6) and now considering 176/212 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 40/46 places, 176/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 9 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 44 transition count 204
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 44 transition count 204
Applied a total of 4 rules in 3 ms. Remains 44 /46 variables (removed 2) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 44/46 places, 204/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 9 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 10 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 3 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 10 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 44 transition count 204
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 44 transition count 204
Applied a total of 4 rules in 4 ms. Remains 44 /46 variables (removed 2) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 44/46 places, 204/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Drop transitions (Redundant composition of simpler transitions.) removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 20 place count 42 transition count 184
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 22 place count 40 transition count 176
Iterating global reduction 0 with 2 rules applied. Total rules applied 24 place count 40 transition count 176
Applied a total of 24 rules in 19 ms. Remains 40 /46 variables (removed 6) and now considering 176/212 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 40/46 places, 176/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 3 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 3 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Drop transitions (Redundant composition of simpler transitions.) removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 0 with 16 rules applied. Total rules applied 24 place count 42 transition count 180
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 26 place count 40 transition count 172
Iterating global reduction 0 with 2 rules applied. Total rules applied 28 place count 40 transition count 172
Applied a total of 28 rules in 14 ms. Remains 40 /46 variables (removed 6) and now considering 172/212 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 40/46 places, 172/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 5 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 5 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 172 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 3 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 5 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 42 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 42 transition count 196
Applied a total of 8 rules in 3 ms. Remains 42 /46 variables (removed 4) and now considering 196/212 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 42/46 places, 196/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 212/212 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 43 transition count 200
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 43 transition count 200
Applied a total of 6 rules in 3 ms. Remains 43 /46 variables (removed 3) and now considering 200/212 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 43/46 places, 200/212 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 22:28:55] [INFO ] Input system was already deterministic with 200 transitions.
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 12 ms
[2024-06-01 22:28:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 22:28:55] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2024-06-01 22:28:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 46 places, 212 transitions and 844 arcs took 2 ms.
Total runtime 8382 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-00
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-01
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-03
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-04
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-05
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-06
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-07
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-09
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2024-10
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2023-12
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2023-13
Could not compute solution for formula : Szymanski-PT-a08-CTLFireability-2023-15

BK_STOP 1717280935988

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Szymanski-PT-a08-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/513/ctl_0_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/513/ctl_1_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/513/ctl_2_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/513/ctl_3_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/513/ctl_4_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/513/ctl_5_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/513/ctl_6_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/513/ctl_7_
ctl formula name Szymanski-PT-a08-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/513/ctl_8_
ctl formula name Szymanski-PT-a08-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/513/ctl_9_
ctl formula name Szymanski-PT-a08-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/513/ctl_10_
ctl formula name Szymanski-PT-a08-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/513/ctl_11_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Szymanski-PT-a08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Szymanski-PT-a08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r536-tall-171690533200834"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Szymanski-PT-a08.tgz
mv Szymanski-PT-a08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;