Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r536-tall-171690532900690.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Sudoku-PT-AN16, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r536-tall-171690532900690
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 119M
-rw-r--r-- 1 mcc users 1.6M Apr 12 12:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 6.8M Apr 12 12:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.9M Apr 12 10:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 18M Apr 12 10:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 698K Apr 23 08:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.1M Apr 23 08:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1M Apr 23 08:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.2M Apr 23 08:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.7M Apr 12 14:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22M Apr 12 14:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7M Apr 12 12:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40M Apr 12 12:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 144K Apr 23 08:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 345K Apr 23 08:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 2.3M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-00
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-01
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-02
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-03
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-04
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-05
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-06
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-07
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-08
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-09
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-10
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-11
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-12
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-13
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-14
FORMULA_NAME Sudoku-PT-AN16-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717277864758

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-PT-AN16
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 21:37:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 21:37:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 21:37:46] [INFO ] Load time of PNML (sax parser for PT used): 277 ms
[2024-06-01 21:37:46] [INFO ] Transformed 4864 places.
[2024-06-01 21:37:46] [INFO ] Transformed 4096 transitions.
[2024-06-01 21:37:46] [INFO ] Found NUPN structural information;
[2024-06-01 21:37:46] [INFO ] Parsed PT model containing 4864 places and 4096 transitions and 16384 arcs in 418 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 394 ms.
Support contains 768 out of 4864 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4864/4864 places, 4096/4096 transitions.
Reduce places removed 4096 places and 0 transitions.
Iterating post reduction 0 with 4096 rules applied. Total rules applied 4096 place count 768 transition count 4096
Applied a total of 4096 rules in 83 ms. Remains 768 /4864 variables (removed 4096) and now considering 4096/4096 (removed 0) transitions.
// Phase 1: matrix 4096 rows 768 cols
[2024-06-01 21:38:03] [INFO ] Computed 47 invariants in 400 ms
[2024-06-01 21:38:03] [INFO ] Implicit Places using invariants in 787 ms returned []
[2024-06-01 21:38:03] [INFO ] Invariant cache hit.
[2024-06-01 21:38:24] [INFO ] Implicit Places using invariants and state equation in 20700 ms returned []
Implicit Place search using SMT with State Equation took 21532 ms to find 0 implicit places.
Running 0 sub problems to find dead transitions.
Search for dead transitions found 0 dead transitions in 2ms
Starting structural reductions in LTL mode, iteration 1 : 768/4864 places, 4096/4096 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21646 ms. Remains : 768/4864 places, 4096/4096 transitions.
Support contains 768 out of 768 places after structural reductions.
[2024-06-01 21:38:27] [INFO ] Flatten gal took : 1274 ms
[2024-06-01 21:38:41] [INFO ] Flatten gal took : 1422 ms
[2024-06-01 21:38:55] [INFO ] Input system was already deterministic with 4096 transitions.
Reduction of identical properties reduced properties to check from 42 to 39
RANDOM walk for 909 steps (0 resets) in 1493 ms. (0 steps per ms) remains 0/39 properties
[2024-06-01 21:39:02] [INFO ] Flatten gal took : 774 ms
[2024-06-01 21:39:14] [INFO ] Flatten gal took : 1300 ms
[2024-06-01 21:39:27] [INFO ] Input system was already deterministic with 4096 transitions.
Computed a total of 768 stabilizing places and 4096 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 768 transition count 4096
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA Sudoku-PT-AN16-CTLFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 29 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:31] [INFO ] Flatten gal took : 153 ms
[2024-06-01 21:39:32] [INFO ] Flatten gal took : 198 ms
[2024-06-01 21:39:32] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 7 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:33] [INFO ] Flatten gal took : 142 ms
[2024-06-01 21:39:33] [INFO ] Flatten gal took : 185 ms
[2024-06-01 21:39:34] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 6 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:36] [INFO ] Flatten gal took : 290 ms
[2024-06-01 21:39:36] [INFO ] Flatten gal took : 413 ms
[2024-06-01 21:39:37] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 8 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:38] [INFO ] Flatten gal took : 138 ms
[2024-06-01 21:39:38] [INFO ] Flatten gal took : 178 ms
[2024-06-01 21:39:38] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 6 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:39] [INFO ] Flatten gal took : 351 ms
[2024-06-01 21:39:40] [INFO ] Flatten gal took : 490 ms
[2024-06-01 21:39:41] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 22 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:41] [INFO ] Flatten gal took : 151 ms
[2024-06-01 21:39:41] [INFO ] Flatten gal took : 186 ms
[2024-06-01 21:39:42] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 6 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:42] [INFO ] Flatten gal took : 202 ms
[2024-06-01 21:39:43] [INFO ] Flatten gal took : 282 ms
[2024-06-01 21:39:43] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 5 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:44] [INFO ] Flatten gal took : 145 ms
[2024-06-01 21:39:45] [INFO ] Flatten gal took : 192 ms
[2024-06-01 21:39:45] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 183 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 183 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:45] [INFO ] Flatten gal took : 94 ms
[2024-06-01 21:39:45] [INFO ] Flatten gal took : 106 ms
[2024-06-01 21:39:46] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 135 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 135 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:46] [INFO ] Flatten gal took : 92 ms
[2024-06-01 21:39:46] [INFO ] Flatten gal took : 107 ms
[2024-06-01 21:39:46] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 106 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 106 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:46] [INFO ] Flatten gal took : 96 ms
[2024-06-01 21:39:46] [INFO ] Flatten gal took : 106 ms
[2024-06-01 21:39:47] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 188 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 188 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:47] [INFO ] Flatten gal took : 95 ms
[2024-06-01 21:39:47] [INFO ] Flatten gal took : 110 ms
[2024-06-01 21:39:47] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 109 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 109 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:47] [INFO ] Flatten gal took : 94 ms
[2024-06-01 21:39:48] [INFO ] Flatten gal took : 105 ms
[2024-06-01 21:39:48] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 103 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:48] [INFO ] Flatten gal took : 94 ms
[2024-06-01 21:39:48] [INFO ] Flatten gal took : 105 ms
[2024-06-01 21:39:48] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 768/768 places, 4096/4096 transitions.
Applied a total of 0 rules in 110 ms. Remains 768 /768 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 110 ms. Remains : 768/768 places, 4096/4096 transitions.
[2024-06-01 21:39:48] [INFO ] Flatten gal took : 97 ms
[2024-06-01 21:39:49] [INFO ] Flatten gal took : 106 ms
[2024-06-01 21:39:49] [INFO ] Input system was already deterministic with 4096 transitions.
[2024-06-01 21:39:51] [INFO ] Flatten gal took : 1229 ms
[2024-06-01 21:40:02] [INFO ] Flatten gal took : 1370 ms
[2024-06-01 21:40:14] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 587 ms.
[2024-06-01 21:40:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 768 places, 4096 transitions and 12288 arcs took 17 ms.
Total runtime 148205 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-00
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-01
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-02
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-03
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-04
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-05
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-06
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-07
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-08
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-09
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-10
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-11
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-12
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-14
Could not compute solution for formula : Sudoku-PT-AN16-CTLFireability-2024-15

BK_STOP 1717278024967

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/569/ctl_0_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/569/ctl_1_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/569/ctl_2_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/569/ctl_3_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/569/ctl_4_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/569/ctl_5_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/569/ctl_6_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/569/ctl_7_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/569/ctl_8_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/569/ctl_9_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/569/ctl_10_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/569/ctl_11_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/569/ctl_12_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/569/ctl_13_
ctl formula name Sudoku-PT-AN16-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/569/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-PT-AN16"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Sudoku-PT-AN16, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r536-tall-171690532900690"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-PT-AN16.tgz
mv Sudoku-PT-AN16 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;