Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r536-tall-171690531400002.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Solitaire-PT-EngCT7x7, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r536-tall-171690531400002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K May 19 07:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 19 16:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 19:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 14:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Apr 12 14:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 12 14:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 12 14:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:58 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:58 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 9 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 77K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-00
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-01
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-02
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-03
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-04
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-05
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-06
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-07
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-08
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-09
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-10
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2024-11
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2023-12
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2023-13
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2023-14
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717226110192

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Solitaire-PT-EngCT7x7
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 07:15:11] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 07:15:11] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 07:15:11] [INFO ] Load time of PNML (sax parser for PT used): 68 ms
[2024-06-01 07:15:11] [INFO ] Transformed 67 places.
[2024-06-01 07:15:11] [INFO ] Transformed 76 transitions.
[2024-06-01 07:15:11] [INFO ] Parsed PT model containing 67 places and 76 transitions and 532 arcs in 167 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 62 out of 67 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 10 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
// Phase 1: matrix 76 rows 67 cols
[2024-06-01 07:15:11] [INFO ] Computed 34 invariants in 15 ms
[2024-06-01 07:15:11] [INFO ] Implicit Places using invariants in 196 ms returned []
[2024-06-01 07:15:11] [INFO ] Invariant cache hit.
[2024-06-01 07:15:11] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 312 ms to find 0 implicit places.
Running 72 sub problems to find dead transitions.
[2024-06-01 07:15:11] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/66 variables, 32/32 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/66 variables, 0/32 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 2 (OVERLAPS) 1/67 variables, 1/33 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/67 variables, 1/34 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/67 variables, 0/34 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 5 (OVERLAPS) 76/143 variables, 67/101 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/143 variables, 0/101 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 7 (OVERLAPS) 0/143 variables, 0/101 constraints. Problems are: Problem set: 0 solved, 72 unsolved
No progress, stopping.
After SMT solving in domain Real declared 143/143 variables, and 101 constraints, problems are : Problem set: 0 solved, 72 unsolved in 1510 ms.
Refiners :[Positive P Invariants (semi-flows): 33/33 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 67/67 constraints, PredecessorRefiner: 72/72 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 72 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/66 variables, 32/32 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/66 variables, 0/32 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 2 (OVERLAPS) 1/67 variables, 1/33 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/67 variables, 1/34 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/67 variables, 0/34 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 5 (OVERLAPS) 76/143 variables, 67/101 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/143 variables, 72/173 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/143 variables, 0/173 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 8 (OVERLAPS) 0/143 variables, 0/173 constraints. Problems are: Problem set: 0 solved, 72 unsolved
No progress, stopping.
After SMT solving in domain Int declared 143/143 variables, and 173 constraints, problems are : Problem set: 0 solved, 72 unsolved in 3918 ms.
Refiners :[Positive P Invariants (semi-flows): 33/33 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 67/67 constraints, PredecessorRefiner: 72/72 constraints, Known Traps: 0/0 constraints]
After SMT, in 5627ms problems are : Problem set: 0 solved, 72 unsolved
Search for dead transitions found 0 dead transitions in 5643ms
Finished structural reductions in LTL mode , in 1 iterations and 5996 ms. Remains : 67/67 places, 76/76 transitions.
Support contains 62 out of 67 places after structural reductions.
[2024-06-01 07:15:17] [INFO ] Flatten gal took : 44 ms
[2024-06-01 07:15:17] [INFO ] Flatten gal took : 16 ms
[2024-06-01 07:15:17] [INFO ] Input system was already deterministic with 76 transitions.
Reduction of identical properties reduced properties to check from 71 to 69
RANDOM walk for 21293 steps (841 resets) in 622 ms. (34 steps per ms) remains 0/69 properties
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 11 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 14 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Computed a total of 67 stabilizing places and 76 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 67 transition count 76
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 10 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 7 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 4 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 3 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 5 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 67/67 places, 76/76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:15:18] [INFO ] Input system was already deterministic with 76 transitions.
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:15:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:15:18] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-06-01 07:15:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 67 places, 76 transitions and 532 arcs took 4 ms.
Total runtime 7514 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-00
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-01
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-02
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-03
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-04
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-05
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-06
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-07
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-08
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-09
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-10
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2024-11
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2023-12
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2023-13
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2023-14
Could not compute solution for formula : Solitaire-PT-EngCT7x7-CTLFireability-2023-15

BK_STOP 1717226119290

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/500/ctl_0_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/500/ctl_1_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/500/ctl_2_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/500/ctl_3_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/500/ctl_4_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/500/ctl_5_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/500/ctl_6_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/500/ctl_7_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/500/ctl_8_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/500/ctl_9_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/500/ctl_10_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/500/ctl_11_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/500/ctl_12_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/500/ctl_13_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/500/ctl_14_
ctl formula name Solitaire-PT-EngCT7x7-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/500/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Solitaire-PT-EngCT7x7"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Solitaire-PT-EngCT7x7, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r536-tall-171690531400002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Solitaire-PT-EngCT7x7.tgz
mv Solitaire-PT-EngCT7x7 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;