fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r532-smll-171683811300346
Last Updated
July 7, 2024

About the Execution of LTSMin+red for SmartHome-PT-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
245.680 10148.00 21740.00 183.40 ???????F???????T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r532-smll-171683811300346.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SmartHome-PT-02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r532-smll-171683811300346
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 4.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Apr 12 04:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Apr 12 04:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Apr 12 04:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Apr 12 04:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 27K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-00
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-01
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-02
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-03
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-04
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-05
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-06
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-07
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-08
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-09
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-10
FORMULA_NAME SmartHome-PT-02-CTLFireability-2024-11
FORMULA_NAME SmartHome-PT-02-CTLFireability-2023-12
FORMULA_NAME SmartHome-PT-02-CTLFireability-2023-13
FORMULA_NAME SmartHome-PT-02-CTLFireability-2023-14
FORMULA_NAME SmartHome-PT-02-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717256420862

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmartHome-PT-02
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:40:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:40:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:40:23] [INFO ] Load time of PNML (sax parser for PT used): 123 ms
[2024-06-01 15:40:23] [INFO ] Transformed 41 places.
[2024-06-01 15:40:23] [INFO ] Transformed 127 transitions.
[2024-06-01 15:40:23] [INFO ] Found NUPN structural information;
[2024-06-01 15:40:23] [INFO ] Parsed PT model containing 41 places and 127 transitions and 359 arcs in 363 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 37 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 66 transitions
Reduce redundant transitions removed 66 transitions.
FORMULA SmartHome-PT-02-CTLFireability-2023-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 37 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 61/61 transitions.
Drop transitions (Redundant composition of simpler transitions.) removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 41 transition count 49
Applied a total of 12 rules in 39 ms. Remains 41 /41 variables (removed 0) and now considering 49/61 (removed 12) transitions.
[2024-06-01 15:40:24] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
// Phase 1: matrix 36 rows 41 cols
[2024-06-01 15:40:24] [INFO ] Computed 17 invariants in 8 ms
[2024-06-01 15:40:24] [INFO ] Implicit Places using invariants in 247 ms returned []
[2024-06-01 15:40:24] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2024-06-01 15:40:24] [INFO ] Invariant cache hit.
[2024-06-01 15:40:24] [INFO ] State equation strengthened by 22 read => feed constraints.
[2024-06-01 15:40:24] [INFO ] Implicit Places using invariants and state equation in 142 ms returned []
Implicit Place search using SMT with State Equation took 446 ms to find 0 implicit places.
Running 48 sub problems to find dead transitions.
[2024-06-01 15:40:24] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2024-06-01 15:40:24] [INFO ] Invariant cache hit.
[2024-06-01 15:40:24] [INFO ] State equation strengthened by 22 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/39 variables, 39/39 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/39 variables, 1/40 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/39 variables, 0/40 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 3 (OVERLAPS) 1/40 variables, 15/55 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/40 variables, 1/56 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/40 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 6 (OVERLAPS) 1/41 variables, 1/57 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/41 variables, 1/58 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/41 variables, 0/58 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 9 (OVERLAPS) 35/76 variables, 41/99 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/76 variables, 21/120 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/76 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 12 (OVERLAPS) 1/77 variables, 1/121 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 13 (INCLUDED_ONLY) 0/77 variables, 0/121 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 14 (OVERLAPS) 0/77 variables, 0/121 constraints. Problems are: Problem set: 0 solved, 48 unsolved
No progress, stopping.
After SMT solving in domain Real declared 77/77 variables, and 121 constraints, problems are : Problem set: 0 solved, 48 unsolved in 2220 ms.
Refiners :[Domain max(s): 41/41 constraints, Positive P Invariants (semi-flows): 16/16 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 41/41 constraints, ReadFeed: 22/22 constraints, PredecessorRefiner: 48/48 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 48 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/39 variables, 39/39 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/39 variables, 1/40 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/39 variables, 0/40 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 3 (OVERLAPS) 1/40 variables, 15/55 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/40 variables, 1/56 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/40 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 6 (OVERLAPS) 1/41 variables, 1/57 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/41 variables, 1/58 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/41 variables, 0/58 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 9 (OVERLAPS) 35/76 variables, 41/99 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/76 variables, 21/120 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/76 variables, 48/168 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/76 variables, 0/168 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 13 (OVERLAPS) 1/77 variables, 1/169 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/77 variables, 0/169 constraints. Problems are: Problem set: 0 solved, 48 unsolved
At refinement iteration 15 (OVERLAPS) 0/77 variables, 0/169 constraints. Problems are: Problem set: 0 solved, 48 unsolved
No progress, stopping.
After SMT solving in domain Int declared 77/77 variables, and 169 constraints, problems are : Problem set: 0 solved, 48 unsolved in 1744 ms.
Refiners :[Domain max(s): 41/41 constraints, Positive P Invariants (semi-flows): 16/16 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 41/41 constraints, ReadFeed: 22/22 constraints, PredecessorRefiner: 48/48 constraints, Known Traps: 0/0 constraints]
After SMT, in 4040ms problems are : Problem set: 0 solved, 48 unsolved
Search for dead transitions found 0 dead transitions in 4062ms
Starting structural reductions in LTL mode, iteration 1 : 41/41 places, 49/61 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4588 ms. Remains : 41/41 places, 49/61 transitions.
Support contains 37 out of 41 places after structural reductions.
[2024-06-01 15:40:29] [INFO ] Flatten gal took : 41 ms
[2024-06-01 15:40:29] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:40:29] [INFO ] Input system was already deterministic with 49 transitions.
Support contains 36 out of 41 places (down from 37) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 69 to 61
RANDOM walk for 40000 steps (8 resets) in 1676 ms. (23 steps per ms) remains 1/61 properties
BEST_FIRST walk for 40004 steps (8 resets) in 220 ms. (181 steps per ms) remains 1/1 properties
[2024-06-01 15:40:29] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2024-06-01 15:40:29] [INFO ] Invariant cache hit.
[2024-06-01 15:40:29] [INFO ] State equation strengthened by 22 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/2 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp33 is UNSAT
After SMT solving in domain Real declared 4/77 variables, and 4 constraints, problems are : Problem set: 1 solved, 0 unsolved in 27 ms.
Refiners :[Domain max(s): 2/41 constraints, Positive P Invariants (semi-flows): 2/16 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/41 constraints, ReadFeed: 0/22 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 37ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
FORMULA SmartHome-PT-02-CTLFireability-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:40:29] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:40:29] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:40:29] [INFO ] Input system was already deterministic with 49 transitions.
Computed a total of 21 stabilizing places and 13 stable transitions
Graph (complete) has 110 edges and 41 vertex of which 40 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Graph (trivial) has 19 edges and 41 vertex of which 2 / 41 are part of one of the 1 SCC in 3 ms
Free SCC test removed 1 places
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Graph (complete) has 108 edges and 40 vertex of which 39 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 7 place count 34 transition count 42
Iterating global reduction 0 with 5 rules applied. Total rules applied 12 place count 34 transition count 42
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 28 transition count 36
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 25 transition count 30
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 25 transition count 30
Drop transitions (Redundant composition of simpler transitions.) removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 34 place count 25 transition count 26
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 35 place count 24 transition count 25
Iterating global reduction 0 with 1 rules applied. Total rules applied 36 place count 24 transition count 25
Applied a total of 36 rules in 52 ms. Remains 24 /41 variables (removed 17) and now considering 25/49 (removed 24) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 52 ms. Remains : 24/41 places, 25/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 25 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 6 place count 35 transition count 44
Iterating global reduction 1 with 5 rules applied. Total rules applied 11 place count 35 transition count 44
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 13 place count 35 transition count 42
Applied a total of 13 rules in 5 ms. Remains 35 /41 variables (removed 6) and now considering 42/49 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 35/41 places, 42/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 4 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 34/41 places, 41/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Graph (trivial) has 26 edges and 41 vertex of which 4 / 41 are part of one of the 2 SCC in 0 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 106 edges and 39 vertex of which 38 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 5 place count 35 transition count 42
Iterating global reduction 0 with 3 rules applied. Total rules applied 8 place count 35 transition count 42
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 0 with 18 rules applied. Total rules applied 26 place count 26 transition count 33
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 29 place count 23 transition count 27
Iterating global reduction 0 with 3 rules applied. Total rules applied 32 place count 23 transition count 27
Drop transitions (Redundant composition of simpler transitions.) removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 38 place count 23 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 39 place count 22 transition count 21
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 40 place count 21 transition count 20
Iterating global reduction 1 with 1 rules applied. Total rules applied 41 place count 21 transition count 20
Applied a total of 41 rules in 15 ms. Remains 21 /41 variables (removed 20) and now considering 20/49 (removed 29) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 21/41 places, 20/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 4 place count 37 transition count 46
Iterating global reduction 1 with 3 rules applied. Total rules applied 7 place count 37 transition count 46
Applied a total of 7 rules in 3 ms. Remains 37 /41 variables (removed 4) and now considering 46/49 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 37/41 places, 46/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 37 transition count 45
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 9 place count 37 transition count 44
Applied a total of 9 rules in 4 ms. Remains 37 /41 variables (removed 4) and now considering 44/49 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/41 places, 44/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 38 transition count 46
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 38 transition count 46
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 7 place count 38 transition count 45
Applied a total of 7 rules in 3 ms. Remains 38 /41 variables (removed 3) and now considering 45/49 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 38/41 places, 45/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 37 transition count 45
Applied a total of 8 rules in 2 ms. Remains 37 /41 variables (removed 4) and now considering 45/49 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/41 places, 45/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 37 transition count 45
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 9 place count 37 transition count 44
Applied a total of 9 rules in 4 ms. Remains 37 /41 variables (removed 4) and now considering 44/49 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 37/41 places, 44/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 6 place count 35 transition count 44
Iterating global reduction 1 with 5 rules applied. Total rules applied 11 place count 35 transition count 44
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 13 place count 35 transition count 42
Applied a total of 13 rules in 5 ms. Remains 35 /41 variables (removed 6) and now considering 42/49 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 35/41 places, 42/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 4 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 34/41 places, 41/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 6 place count 35 transition count 44
Iterating global reduction 1 with 5 rules applied. Total rules applied 11 place count 35 transition count 44
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 12 place count 35 transition count 43
Applied a total of 12 rules in 4 ms. Remains 35 /41 variables (removed 6) and now considering 43/49 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 35/41 places, 43/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 37 transition count 45
Applied a total of 8 rules in 3 ms. Remains 37 /41 variables (removed 4) and now considering 45/49 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 37/41 places, 45/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 39 transition count 47
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 39 transition count 47
Applied a total of 4 rules in 2 ms. Remains 39 /41 variables (removed 2) and now considering 47/49 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 39/41 places, 47/49 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:40:30] [INFO ] Input system was already deterministic with 47 transitions.
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:40:30] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:40:30] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-06-01 15:40:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 49 transitions and 157 arcs took 3 ms.
Total runtime 7039 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-00
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-01
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-02
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-03
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-04
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-05
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-06
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-08
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-09
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-10
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2024-11
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2023-12
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2023-13
Could not compute solution for formula : SmartHome-PT-02-CTLFireability-2023-14

BK_STOP 1717256431010

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SmartHome-PT-02-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/513/ctl_0_
ctl formula name SmartHome-PT-02-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/513/ctl_1_
ctl formula name SmartHome-PT-02-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/513/ctl_2_
ctl formula name SmartHome-PT-02-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/513/ctl_3_
ctl formula name SmartHome-PT-02-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/513/ctl_4_
ctl formula name SmartHome-PT-02-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/513/ctl_5_
ctl formula name SmartHome-PT-02-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/513/ctl_6_
ctl formula name SmartHome-PT-02-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/513/ctl_7_
ctl formula name SmartHome-PT-02-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/513/ctl_8_
ctl formula name SmartHome-PT-02-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/513/ctl_9_
ctl formula name SmartHome-PT-02-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/513/ctl_10_
ctl formula name SmartHome-PT-02-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/513/ctl_11_
ctl formula name SmartHome-PT-02-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/513/ctl_12_
ctl formula name SmartHome-PT-02-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/513/ctl_13_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmartHome-PT-02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SmartHome-PT-02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r532-smll-171683811300346"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmartHome-PT-02.tgz
mv SmartHome-PT-02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;