fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r532-smll-171683811200310
Last Updated
July 7, 2024

About the Execution of LTSMin+red for SmallOperatingSystem-PT-MT4096DC1024

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
327.432 15210.00 31884.00 158.60 TTTFFTTFTTFFFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r532-smll-171683811200310.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SmallOperatingSystem-PT-MT4096DC1024, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r532-smll-171683811200310
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 7.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K May 19 07:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 19 16:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Apr 12 14:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Apr 12 14:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717255777988

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT4096DC1024
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:29:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 15:29:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:29:40] [INFO ] Load time of PNML (sax parser for PT used): 142 ms
[2024-06-01 15:29:40] [INFO ] Transformed 9 places.
[2024-06-01 15:29:40] [INFO ] Transformed 8 transitions.
[2024-06-01 15:29:40] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 490 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 42 ms.
Working with output stream class java.io.PrintStream
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 41013 steps (8 resets) in 311 ms. (131 steps per ms) remains 12/15 properties
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
BEST_FIRST walk for 40004 steps (8 resets) in 668 ms. (59 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 897 ms. (44 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40003 steps (8 resets) in 348 ms. (114 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 303 ms. (131 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 483 ms. (82 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 318 ms. (125 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40002 steps (8 resets) in 436 ms. (91 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 682 ms. (58 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40003 steps (8 resets) in 213 ms. (186 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 173 ms. (229 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40003 steps (8 resets) in 89 ms. (444 steps per ms) remains 12/12 properties
BEST_FIRST walk for 40003 steps (8 resets) in 133 ms. (298 steps per ms) remains 12/12 properties
// Phase 1: matrix 8 rows 9 cols
[2024-06-01 15:29:42] [INFO ] Computed 4 invariants in 5 ms
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-01 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-01 TRUE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-02 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-02 TRUE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-05 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-05 TRUE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-09 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-09 TRUE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-10 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-10 FALSE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-12 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-12 FALSE TECHNIQUES SMT_REFINEMENT
Problem SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-15 is UNSAT
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-15 TRUE TECHNIQUES SMT_REFINEMENT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 7 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 7 solved, 5 unsolved in 394 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 12/12 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 7 solved, 5 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 5/18 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/17 variables, 0/18 constraints. Problems are: Problem set: 7 solved, 5 unsolved
At refinement iteration 5 (OVERLAPS) 0/17 variables, 0/18 constraints. Problems are: Problem set: 7 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 18 constraints, problems are : Problem set: 7 solved, 5 unsolved in 222 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 5/12 constraints, Known Traps: 0/0 constraints]
After SMT, in 694ms problems are : Problem set: 7 solved, 5 unsolved
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-14 TRUE TECHNIQUES PARIKH_WALK
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-08 TRUE TECHNIQUES PARIKH_WALK
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-03 FALSE TECHNIQUES PARIKH_WALK
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-06 TRUE TECHNIQUES PARIKH_WALK
Finished Parikh walk after 8896 steps, including 0 resets, run visited all 1 properties in 7 ms. (steps per millisecond=1270 )
FORMULA SmallOperatingSystem-PT-MT4096DC1024-ReachabilityCardinality-2024-13 TRUE TECHNIQUES PARIKH_WALK
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 5 properties in 10030 ms.
All properties solved without resorting to model-checking.
Total runtime 13128 ms.
ITS solved all properties within timeout

BK_STOP 1717255793198

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC1024"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SmallOperatingSystem-PT-MT4096DC1024, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r532-smll-171683811200310"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC1024.tgz
mv SmallOperatingSystem-PT-MT4096DC1024 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;