About the Execution of LTSMin+red for SmallOperatingSystem-PT-MT2048DC0512
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
332.756 | 33648.00 | 73758.00 | 241.90 | ????F?TF?T?F??T? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r532-smll-171683811200289.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SmallOperatingSystem-PT-MT2048DC0512, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r532-smll-171683811200289
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 7.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.2K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 14:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Apr 12 14:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Apr 12 14:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Apr 12 14:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717255459828
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT2048DC0512
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:24:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 15:24:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:24:22] [INFO ] Load time of PNML (sax parser for PT used): 69 ms
[2024-06-01 15:24:22] [INFO ] Transformed 9 places.
[2024-06-01 15:24:22] [INFO ] Transformed 8 transitions.
[2024-06-01 15:24:22] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 293 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 44 ms.
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 18 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-06-01 15:24:23] [INFO ] Computed 4 invariants in 6 ms
[2024-06-01 15:24:23] [INFO ] Implicit Places using invariants in 225 ms returned []
[2024-06-01 15:24:23] [INFO ] Invariant cache hit.
[2024-06-01 15:24:23] [INFO ] Implicit Places using invariants and state equation in 65 ms returned []
Implicit Place search using SMT with State Equation took 367 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-06-01 15:24:23] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 278 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 186 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 510ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 531ms
Finished structural reductions in LTL mode , in 1 iterations and 958 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2024-06-01 15:24:24] [INFO ] Flatten gal took : 29 ms
[2024-06-01 15:24:24] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:24:24] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 41052 steps (8 resets) in 413 ms. (99 steps per ms) remains 38/66 properties
BEST_FIRST walk for 4004 steps (8 resets) in 348 ms. (11 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 254 ms. (15 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 329 ms. (12 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 128 ms. (31 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 130 ms. (30 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 175 ms. (22 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 136 ms. (29 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 133 ms. (29 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 136 ms. (29 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 116 ms. (34 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 147 ms. (27 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 69 ms. (57 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 96 ms. (41 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 70 ms. (56 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 57 ms. (69 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 100 ms. (39 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 60 ms. (65 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 28 ms. (138 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 15 ms. (250 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 48 ms. (81 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 28 ms. (138 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 15 ms. (250 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 20 ms. (190 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 58 ms. (67 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 31 ms. (125 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4002 steps (8 resets) in 22 ms. (174 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4003 steps (8 resets) in 18 ms. (210 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4004 steps (8 resets) in 23 ms. (166 steps per ms) remains 38/38 properties
BEST_FIRST walk for 4002 steps (8 resets) in 17 ms. (222 steps per ms) remains 38/38 properties
[2024-06-01 15:24:25] [INFO ] Invariant cache hit.
Problem AtomicPropp1 is UNSAT
Problem AtomicPropp4 is UNSAT
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp9 is UNSAT
Problem AtomicPropp10 is UNSAT
Problem AtomicPropp11 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp17 is UNSAT
Problem AtomicPropp18 is UNSAT
Problem AtomicPropp20 is UNSAT
Problem AtomicPropp23 is UNSAT
Problem AtomicPropp24 is UNSAT
Problem AtomicPropp26 is UNSAT
Problem AtomicPropp27 is UNSAT
Problem AtomicPropp31 is UNSAT
Problem AtomicPropp36 is UNSAT
Problem AtomicPropp38 is UNSAT
Problem AtomicPropp39 is UNSAT
Problem AtomicPropp41 is UNSAT
Problem AtomicPropp42 is UNSAT
Problem AtomicPropp47 is UNSAT
Problem AtomicPropp49 is UNSAT
Problem AtomicPropp54 is UNSAT
Problem AtomicPropp55 is UNSAT
Problem AtomicPropp56 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 25 solved, 13 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 4 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 25 solved, 13 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 25 solved, 13 unsolved in 237 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 38/38 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 25 solved, 13 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 13/26 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/17 variables, 0/26 constraints. Problems are: Problem set: 25 solved, 13 unsolved
At refinement iteration 5 (OVERLAPS) 0/17 variables, 0/26 constraints. Problems are: Problem set: 25 solved, 13 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 26 constraints, problems are : Problem set: 25 solved, 13 unsolved in 274 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 13/38 constraints, Known Traps: 0/0 constraints]
After SMT, in 539ms problems are : Problem set: 25 solved, 13 unsolved
Finished Parikh walk after 5391 steps, including 0 resets, run visited all 1 properties in 8 ms. (steps per millisecond=673 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 13 properties in 26501 ms.
Successfully simplified 25 atomic propositions for a total of 15 simplifications.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:24:52] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:24:52] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 25 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 7/9 places, 7/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 6 transition count 7
Applied a total of 3 rules in 11 ms. Remains 6 /9 variables (removed 3) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 6/9 places, 7/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 4 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 19 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 4/9 places, 5/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 5 transitions.
RANDOM walk for 34856 steps (6 resets) in 127 ms. (272 steps per ms) remains 0/1 properties
FORMULA SmallOperatingSystem-PT-MT2048DC0512-CTLCardinality-2023-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Input system was already deterministic with 8 transitions.
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:52] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 5 ms.
[2024-06-01 15:24:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 7 ms.
Total runtime 30550 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT2048DC0512"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SmallOperatingSystem-PT-MT2048DC0512, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r532-smll-171683811200289"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT2048DC0512.tgz
mv SmallOperatingSystem-PT-MT2048DC0512 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;