Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r532-smll-171683811100273.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SmallOperatingSystem-PT-MT1024DC0256, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r532-smll-171683811100273
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 572K
-rw-r--r-- 1 mcc users 9.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.8K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 14:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Apr 12 14:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 17K Apr 12 14:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 129K Apr 12 14:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-15

=== Now, execution of the tool begins

BK_START 1717255272966

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT1024DC0256
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:21:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 15:21:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:21:15] [INFO ] Load time of PNML (sax parser for PT used): 66 ms
[2024-06-01 15:21:15] [INFO ] Transformed 9 places.
[2024-06-01 15:21:15] [INFO ] Transformed 8 transitions.
[2024-06-01 15:21:15] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 307 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 49 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 18 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-06-01 15:21:16] [INFO ] Computed 4 invariants in 6 ms
[2024-06-01 15:21:16] [INFO ] Implicit Places using invariants in 237 ms returned []
[2024-06-01 15:21:16] [INFO ] Invariant cache hit.
[2024-06-01 15:21:16] [INFO ] Implicit Places using invariants and state equation in 62 ms returned []
Implicit Place search using SMT with State Equation took 375 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-06-01 15:21:16] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 277 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 194 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 519ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 538ms
Finished structural reductions in LTL mode , in 1 iterations and 983 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2024-06-01 15:21:17] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:21:17] [INFO ] Flatten gal took : 31 ms
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:21:17] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:21:17] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 40106 steps (8 resets) in 481 ms. (83 steps per ms) remains 43/88 properties
BEST_FIRST walk for 4004 steps (8 resets) in 287 ms. (13 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 186 ms. (21 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 100 ms. (39 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 103 ms. (38 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 145 ms. (27 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 59 ms. (66 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 72 ms. (54 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 26 ms. (148 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 29 ms. (133 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4002 steps (8 resets) in 15 ms. (250 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4002 steps (8 resets) in 18 ms. (210 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 18 ms. (210 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4002 steps (8 resets) in 23 ms. (166 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 35 ms. (111 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4002 steps (8 resets) in 15 ms. (250 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 13 ms. (285 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 30 ms. (129 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 30 ms. (129 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 18 ms. (210 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 16 ms. (235 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 43 ms. (91 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 33 ms. (117 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 12 ms. (307 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 26 ms. (148 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 19 ms. (200 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 26 ms. (148 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 52 ms. (75 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 9 ms. (400 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 23 ms. (166 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4003 steps (8 resets) in 10 ms. (363 steps per ms) remains 43/43 properties
BEST_FIRST walk for 4004 steps (8 resets) in 12 ms. (308 steps per ms) remains 43/43 properties
[2024-06-01 15:21:18] [INFO ] Invariant cache hit.
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp11 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp16 is UNSAT
Problem AtomicPropp17 is UNSAT
Problem AtomicPropp18 is UNSAT
Problem AtomicPropp19 is UNSAT
Problem AtomicPropp20 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp27 is UNSAT
Problem AtomicPropp29 is UNSAT
Problem AtomicPropp30 is UNSAT
Problem AtomicPropp31 is UNSAT
Problem AtomicPropp35 is UNSAT
Problem AtomicPropp37 is UNSAT
Problem AtomicPropp38 is UNSAT
Problem AtomicPropp41 is UNSAT
Problem AtomicPropp50 is UNSAT
Problem AtomicPropp55 is UNSAT
Problem AtomicPropp56 is UNSAT
Problem AtomicPropp58 is UNSAT
Problem AtomicPropp63 is UNSAT
Problem AtomicPropp64 is UNSAT
Problem AtomicPropp65 is UNSAT
Problem AtomicPropp69 is UNSAT
Problem AtomicPropp72 is UNSAT
Problem AtomicPropp76 is UNSAT
Problem AtomicPropp78 is UNSAT
Problem AtomicPropp80 is UNSAT
Problem AtomicPropp82 is UNSAT
Problem AtomicPropp87 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 32 solved, 11 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 4 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 32 solved, 11 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 32 solved, 11 unsolved in 151 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 43/43 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 32 solved, 11 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 1/1 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/1 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 2 (OVERLAPS) 2/9 variables, 3/4 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 11/24 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/24 constraints. Problems are: Problem set: 32 solved, 11 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/24 constraints. Problems are: Problem set: 32 solved, 11 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 24 constraints, problems are : Problem set: 32 solved, 11 unsolved in 151 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 11/43 constraints, Known Traps: 0/0 constraints]
After SMT, in 330ms problems are : Problem set: 32 solved, 11 unsolved
Fused 11 Parikh solutions to 10 different solutions.
Finished Parikh walk after 4168 steps, including 0 resets, run visited all 2 properties in 25 ms. (steps per millisecond=166 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 11 properties in 14416 ms.
Successfully simplified 32 atomic propositions for a total of 15 simplifications.
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:21:33] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:21:33] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 8 transitions.
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 17 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 7/9 places, 7/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 3 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 27 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 4/9 places, 5/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 5 transitions.
RANDOM walk for 2052 steps (0 resets) in 12 ms. (157 steps per ms) remains 0/1 properties
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 6 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 4/9 places, 5/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 1 ms
[2024-06-01 15:21:33] [INFO ] Input system was already deterministic with 8 transitions.
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:21:33] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:21:33] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2024-06-01 15:21:33] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 6 ms.
Total runtime 18009 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-00
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-04
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-06
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-07
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-08
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-11
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-13
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-14
Could not compute solution for formula : SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-15

BK_STOP 1717255293882

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
mcc2024
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-00
ctl formula formula --ctl=/tmp/518/ctl_0_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-04
ctl formula formula --ctl=/tmp/518/ctl_1_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-06
ctl formula formula --ctl=/tmp/518/ctl_2_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-07
ctl formula formula --ctl=/tmp/518/ctl_3_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-08
ctl formula formula --ctl=/tmp/518/ctl_4_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2024-11
ctl formula formula --ctl=/tmp/518/ctl_5_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-13
ctl formula formula --ctl=/tmp/518/ctl_6_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-14
ctl formula formula --ctl=/tmp/518/ctl_7_
ctl formula name SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-2023-15
ctl formula formula --ctl=/tmp/518/ctl_8_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT1024DC0256"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SmallOperatingSystem-PT-MT1024DC0256, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r532-smll-171683811100273"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT1024DC0256.tgz
mv SmallOperatingSystem-PT-MT1024DC0256 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;