Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r528-tall-171683762300978.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is ShieldRVt-PT-020A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r528-tall-171683762300978
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 23 07:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.4K Apr 12 01:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 43K Apr 12 01:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Apr 12 01:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 38K Apr 12 01:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 54K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-00
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-01
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-02
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-03
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-04
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-05
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-06
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-07
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-08
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-09
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-10
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2024-11
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2023-12
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2023-13
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2023-14
FORMULA_NAME ShieldRVt-PT-020A-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717276121154

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-020A
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 21:08:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 21:08:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 21:08:42] [INFO ] Load time of PNML (sax parser for PT used): 79 ms
[2024-06-01 21:08:42] [INFO ] Transformed 163 places.
[2024-06-01 21:08:42] [INFO ] Transformed 163 transitions.
[2024-06-01 21:08:42] [INFO ] Found NUPN structural information;
[2024-06-01 21:08:42] [INFO ] Parsed PT model containing 163 places and 163 transitions and 686 arcs in 186 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 129 out of 163 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 12 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
// Phase 1: matrix 162 rows 163 cols
[2024-06-01 21:08:42] [INFO ] Computed 81 invariants in 7 ms
[2024-06-01 21:08:43] [INFO ] Implicit Places using invariants in 288 ms returned []
[2024-06-01 21:08:43] [INFO ] Invariant cache hit.
[2024-06-01 21:08:43] [INFO ] Implicit Places using invariants and state equation in 185 ms returned []
Implicit Place search using SMT with State Equation took 507 ms to find 0 implicit places.
Running 161 sub problems to find dead transitions.
[2024-06-01 21:08:43] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/162 variables, 162/162 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/162 variables, 0/162 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 2 (OVERLAPS) 1/163 variables, 81/243 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/163 variables, 1/244 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/163 variables, 0/244 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 5 (OVERLAPS) 162/325 variables, 163/407 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/325 variables, 0/407 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 7 (OVERLAPS) 0/325 variables, 0/407 constraints. Problems are: Problem set: 0 solved, 161 unsolved
No progress, stopping.
After SMT solving in domain Real declared 325/325 variables, and 407 constraints, problems are : Problem set: 0 solved, 161 unsolved in 4461 ms.
Refiners :[Domain max(s): 163/163 constraints, Positive P Invariants (semi-flows): 81/81 constraints, State Equation: 163/163 constraints, PredecessorRefiner: 161/161 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 161 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/162 variables, 162/162 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/162 variables, 0/162 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 2 (OVERLAPS) 1/163 variables, 81/243 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/163 variables, 1/244 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/163 variables, 0/244 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 5 (OVERLAPS) 162/325 variables, 163/407 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/325 variables, 161/568 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/325 variables, 0/568 constraints. Problems are: Problem set: 0 solved, 161 unsolved
At refinement iteration 8 (OVERLAPS) 0/325 variables, 0/568 constraints. Problems are: Problem set: 0 solved, 161 unsolved
No progress, stopping.
After SMT solving in domain Int declared 325/325 variables, and 568 constraints, problems are : Problem set: 0 solved, 161 unsolved in 4497 ms.
Refiners :[Domain max(s): 163/163 constraints, Positive P Invariants (semi-flows): 81/81 constraints, State Equation: 163/163 constraints, PredecessorRefiner: 161/161 constraints, Known Traps: 0/0 constraints]
After SMT, in 9037ms problems are : Problem set: 0 solved, 161 unsolved
Search for dead transitions found 0 dead transitions in 9051ms
Finished structural reductions in LTL mode , in 1 iterations and 9596 ms. Remains : 163/163 places, 162/162 transitions.
Support contains 129 out of 163 places after structural reductions.
[2024-06-01 21:08:52] [INFO ] Flatten gal took : 42 ms
[2024-06-01 21:08:52] [INFO ] Flatten gal took : 17 ms
[2024-06-01 21:08:52] [INFO ] Input system was already deterministic with 162 transitions.
Reduction of identical properties reduced properties to check from 85 to 79
RANDOM walk for 40000 steps (8 resets) in 2143 ms. (18 steps per ms) remains 11/79 properties
BEST_FIRST walk for 40004 steps (8 resets) in 331 ms. (120 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 179 ms. (222 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40003 steps (8 resets) in 160 ms. (248 steps per ms) remains 11/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 156 ms. (254 steps per ms) remains 10/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 126 ms. (314 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 149 ms. (266 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 135 ms. (294 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 104 ms. (380 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 111 ms. (357 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 113 ms. (350 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 274 ms. (145 steps per ms) remains 10/10 properties
[2024-06-01 21:08:53] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/25 variables, 25/25 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/25 variables, 0/25 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 2 (OVERLAPS) 20/45 variables, 22/47 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/45 variables, 20/67 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/45 variables, 0/67 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 5 (OVERLAPS) 118/163 variables, 59/126 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/163 variables, 118/244 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/163 variables, 0/244 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 8 (OVERLAPS) 162/325 variables, 163/407 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/325 variables, 0/407 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 10 (OVERLAPS) 0/325 variables, 0/407 constraints. Problems are: Problem set: 0 solved, 10 unsolved
No progress, stopping.
After SMT solving in domain Real declared 325/325 variables, and 407 constraints, problems are : Problem set: 0 solved, 10 unsolved in 264 ms.
Refiners :[Domain max(s): 163/163 constraints, Positive P Invariants (semi-flows): 81/81 constraints, State Equation: 163/163 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 10 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/25 variables, 25/25 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/25 variables, 0/25 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 2 (OVERLAPS) 20/45 variables, 22/47 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/45 variables, 20/67 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/45 variables, 0/67 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 5 (OVERLAPS) 118/163 variables, 59/126 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/163 variables, 118/244 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/163 variables, 0/244 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 8 (OVERLAPS) 162/325 variables, 163/407 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/325 variables, 10/417 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/325 variables, 0/417 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 11 (OVERLAPS) 0/325 variables, 0/417 constraints. Problems are: Problem set: 0 solved, 10 unsolved
No progress, stopping.
After SMT solving in domain Int declared 325/325 variables, and 417 constraints, problems are : Problem set: 0 solved, 10 unsolved in 437 ms.
Refiners :[Domain max(s): 163/163 constraints, Positive P Invariants (semi-flows): 81/81 constraints, State Equation: 163/163 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints]
After SMT, in 707ms problems are : Problem set: 0 solved, 10 unsolved
Fused 10 Parikh solutions to 8 different solutions.
Finished Parikh walk after 20707 steps, including 874 resets, run visited all 10 properties in 539 ms. (steps per millisecond=38 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 10 properties in 554 ms.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 13 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 14 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 9 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 162 transition count 161
Applied a total of 2 rules in 31 ms. Remains 162 /163 variables (removed 1) and now considering 161/162 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 162/163 places, 161/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 161 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 4 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 10 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 11 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 160 transition count 160
Applied a total of 3 rules in 14 ms. Remains 160 /163 variables (removed 3) and now considering 160/162 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 160/163 places, 160/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 160 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 162 transition count 161
Applied a total of 2 rules in 12 ms. Remains 162 /163 variables (removed 1) and now considering 161/162 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 162/163 places, 161/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 9 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 161 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 9 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 8 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 3 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 3 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 2 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 3 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 2 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 162 transition count 161
Applied a total of 2 rules in 9 ms. Remains 162 /163 variables (removed 1) and now considering 161/162 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 162/163 places, 161/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 161 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 1 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 1 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 1 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
Starting structural reductions in LTL mode, iteration 0 : 163/163 places, 162/162 transitions.
Applied a total of 0 rules in 1 ms. Remains 163 /163 variables (removed 0) and now considering 162/162 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 163/163 places, 162/162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 6 ms
[2024-06-01 21:08:55] [INFO ] Input system was already deterministic with 162 transitions.
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Flatten gal took : 7 ms
[2024-06-01 21:08:55] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-06-01 21:08:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 163 places, 162 transitions and 684 arcs took 4 ms.
Total runtime 13583 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-00
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-01
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-02
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-03
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-04
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-05
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-06
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-07
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-08
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-09
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-10
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2024-11
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2023-12
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2023-13
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2023-14
Could not compute solution for formula : ShieldRVt-PT-020A-CTLFireability-2023-15

BK_STOP 1717276136405

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/514/ctl_0_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/514/ctl_1_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/514/ctl_2_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/514/ctl_3_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/514/ctl_4_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/514/ctl_5_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/514/ctl_6_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/514/ctl_7_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/514/ctl_8_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/514/ctl_9_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/514/ctl_10_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/514/ctl_11_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/514/ctl_12_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/514/ctl_13_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/514/ctl_14_
ctl formula name ShieldRVt-PT-020A-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/514/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-020A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is ShieldRVt-PT-020A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r528-tall-171683762300978"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-020A.tgz
mv ShieldRVt-PT-020A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;