Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r528-tall-171683761000386.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is ShieldPPPs-PT-003A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r528-tall-171683761000386
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 9.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 110K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 12:01 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 161K Apr 13 12:01 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Apr 13 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Apr 13 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 27K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-00
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-01
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-02
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-03
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-04
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-05
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-06
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-07
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-08
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-09
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-10
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2024-11
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2023-12
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2023-13
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2023-14
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717242009050

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldPPPs-PT-003A
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 11:40:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 11:40:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 11:40:10] [INFO ] Load time of PNML (sax parser for PT used): 53 ms
[2024-06-01 11:40:10] [INFO ] Transformed 96 places.
[2024-06-01 11:40:10] [INFO ] Transformed 81 transitions.
[2024-06-01 11:40:10] [INFO ] Found NUPN structural information;
[2024-06-01 11:40:10] [INFO ] Parsed PT model containing 96 places and 81 transitions and 306 arcs in 142 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 81 out of 96 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 9 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
// Phase 1: matrix 81 rows 96 cols
[2024-06-01 11:40:10] [INFO ] Computed 34 invariants in 12 ms
[2024-06-01 11:40:10] [INFO ] Implicit Places using invariants in 188 ms returned []
[2024-06-01 11:40:10] [INFO ] Invariant cache hit.
[2024-06-01 11:40:10] [INFO ] Implicit Places using invariants and state equation in 119 ms returned []
Implicit Place search using SMT with State Equation took 333 ms to find 0 implicit places.
Running 80 sub problems to find dead transitions.
[2024-06-01 11:40:10] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/95 variables, 95/95 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/95 variables, 0/95 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 2 (OVERLAPS) 1/96 variables, 34/129 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/96 variables, 1/130 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/96 variables, 0/130 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 5 (OVERLAPS) 81/177 variables, 96/226 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/177 variables, 0/226 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 7 (OVERLAPS) 0/177 variables, 0/226 constraints. Problems are: Problem set: 0 solved, 80 unsolved
No progress, stopping.
After SMT solving in domain Real declared 177/177 variables, and 226 constraints, problems are : Problem set: 0 solved, 80 unsolved in 1565 ms.
Refiners :[Domain max(s): 96/96 constraints, Positive P Invariants (semi-flows): 34/34 constraints, State Equation: 96/96 constraints, PredecessorRefiner: 80/80 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 80 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/95 variables, 95/95 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/95 variables, 0/95 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 2 (OVERLAPS) 1/96 variables, 34/129 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/96 variables, 1/130 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/96 variables, 0/130 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 5 (OVERLAPS) 81/177 variables, 96/226 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/177 variables, 80/306 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/177 variables, 0/306 constraints. Problems are: Problem set: 0 solved, 80 unsolved
At refinement iteration 8 (OVERLAPS) 0/177 variables, 0/306 constraints. Problems are: Problem set: 0 solved, 80 unsolved
No progress, stopping.
After SMT solving in domain Int declared 177/177 variables, and 306 constraints, problems are : Problem set: 0 solved, 80 unsolved in 3778 ms.
Refiners :[Domain max(s): 96/96 constraints, Positive P Invariants (semi-flows): 34/34 constraints, State Equation: 96/96 constraints, PredecessorRefiner: 80/80 constraints, Known Traps: 0/0 constraints]
After SMT, in 5404ms problems are : Problem set: 0 solved, 80 unsolved
Search for dead transitions found 0 dead transitions in 5419ms
Finished structural reductions in LTL mode , in 1 iterations and 5783 ms. Remains : 96/96 places, 81/81 transitions.
Support contains 81 out of 96 places after structural reductions.
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 33 ms
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 11 ms
[2024-06-01 11:40:16] [INFO ] Input system was already deterministic with 81 transitions.
Support contains 80 out of 96 places (down from 81) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 80 to 73
RANDOM walk for 40000 steps (161 resets) in 1197 ms. (33 steps per ms) remains 1/73 properties
BEST_FIRST walk for 40003 steps (18 resets) in 149 ms. (266 steps per ms) remains 1/1 properties
[2024-06-01 11:40:16] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 4/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp41 is UNSAT
After SMT solving in domain Real declared 11/177 variables, and 7 constraints, problems are : Problem set: 1 solved, 0 unsolved in 24 ms.
Refiners :[Domain max(s): 4/96 constraints, Positive P Invariants (semi-flows): 3/34 constraints, State Equation: 0/96 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 31ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 11 ms
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 8 ms
[2024-06-01 11:40:16] [INFO ] Input system was already deterministic with 81 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 6 ms
[2024-06-01 11:40:16] [INFO ] Flatten gal took : 6 ms
[2024-06-01 11:40:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 9 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 94 transition count 79
Applied a total of 4 rules in 20 ms. Remains 94 /96 variables (removed 2) and now considering 79/81 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 94/96 places, 79/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 79 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 94 transition count 79
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 93 transition count 78
Applied a total of 4 rules in 18 ms. Remains 93 /96 variables (removed 3) and now considering 78/81 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 93/96 places, 78/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 5 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 3 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 3 ms
[2024-06-01 11:40:17] [INFO ] Input system was already deterministic with 81 transitions.
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Flatten gal took : 4 ms
[2024-06-01 11:40:17] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2024-06-01 11:40:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 96 places, 81 transitions and 306 arcs took 1 ms.
Total runtime 7289 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-00
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-01
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-02
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-03
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-04
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-05
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-06
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-07
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-08
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-09
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-10
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2024-11
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2023-12
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2023-13
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2023-14
Could not compute solution for formula : ShieldPPPs-PT-003A-CTLFireability-2023-15

BK_STOP 1717242017841

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/508/ctl_0_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/508/ctl_1_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/508/ctl_2_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/508/ctl_3_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/508/ctl_4_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/508/ctl_5_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/508/ctl_6_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/508/ctl_7_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/508/ctl_8_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/508/ctl_9_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/508/ctl_10_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/508/ctl_11_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/508/ctl_12_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/508/ctl_13_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/508/ctl_14_
ctl formula name ShieldPPPs-PT-003A-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/508/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldPPPs-PT-003A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is ShieldPPPs-PT-003A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r528-tall-171683761000386"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldPPPs-PT-003A.tgz
mv ShieldPPPs-PT-003A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;