fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r528-tall-171683760800290
Last Updated
July 7, 2024

About the Execution of LTSMin+red for ShieldIIPt-PT-030A

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
504.644 80022.00 116796.00 245.90 ????T???T???T?T? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r528-tall-171683760800290.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is ShieldIIPt-PT-030A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r528-tall-171683760800290
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 596K
-rw-r--r-- 1 mcc users 6.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 07:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 22:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 158K Apr 12 22:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Apr 12 22:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 36K Apr 12 22:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 159K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-00
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-01
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-02
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-03
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-04
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-05
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-06
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-07
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-08
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-09
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-10
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2024-11
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2023-12
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2023-13
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2023-14
FORMULA_NAME ShieldIIPt-PT-030A-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717237255180

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-030A
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 10:20:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 10:20:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 10:20:56] [INFO ] Load time of PNML (sax parser for PT used): 105 ms
[2024-06-01 10:20:56] [INFO ] Transformed 573 places.
[2024-06-01 10:20:56] [INFO ] Transformed 423 transitions.
[2024-06-01 10:20:56] [INFO ] Found NUPN structural information;
[2024-06-01 10:20:56] [INFO ] Parsed PT model containing 573 places and 423 transitions and 1806 arcs in 217 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 18 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 173 out of 573 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 50 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
// Phase 1: matrix 422 rows 573 cols
[2024-06-01 10:20:56] [INFO ] Computed 271 invariants in 21 ms
[2024-06-01 10:20:57] [INFO ] Implicit Places using invariants in 498 ms returned []
[2024-06-01 10:20:57] [INFO ] Invariant cache hit.
[2024-06-01 10:20:57] [INFO ] Implicit Places using invariants and state equation in 682 ms returned []
Implicit Place search using SMT with State Equation took 1210 ms to find 0 implicit places.
Running 421 sub problems to find dead transitions.
[2024-06-01 10:20:57] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/572 variables, 572/572 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/572 variables, 0/572 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 2 (OVERLAPS) 1/573 variables, 271/843 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/573 variables, 1/844 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/573 variables, 0/844 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 5 (OVERLAPS) 422/995 variables, 573/1417 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/995 variables, 0/1417 constraints. Problems are: Problem set: 0 solved, 421 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 995/995 variables, and 1417 constraints, problems are : Problem set: 0 solved, 421 unsolved in 30071 ms.
Refiners :[Domain max(s): 573/573 constraints, Positive P Invariants (semi-flows): 271/271 constraints, State Equation: 573/573 constraints, PredecessorRefiner: 421/421 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 421 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/572 variables, 572/572 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/572 variables, 0/572 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 2 (OVERLAPS) 1/573 variables, 271/843 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/573 variables, 1/844 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/573 variables, 0/844 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 5 (OVERLAPS) 422/995 variables, 573/1417 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/995 variables, 421/1838 constraints. Problems are: Problem set: 0 solved, 421 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/995 variables, 0/1838 constraints. Problems are: Problem set: 0 solved, 421 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 995/995 variables, and 1838 constraints, problems are : Problem set: 0 solved, 421 unsolved in 30022 ms.
Refiners :[Domain max(s): 573/573 constraints, Positive P Invariants (semi-flows): 271/271 constraints, State Equation: 573/573 constraints, PredecessorRefiner: 421/421 constraints, Known Traps: 0/0 constraints]
After SMT, in 60358ms problems are : Problem set: 0 solved, 421 unsolved
Search for dead transitions found 0 dead transitions in 60392ms
Finished structural reductions in LTL mode , in 1 iterations and 61680 ms. Remains : 573/573 places, 422/422 transitions.
Support contains 173 out of 573 places after structural reductions.
[2024-06-01 10:21:58] [INFO ] Flatten gal took : 95 ms
[2024-06-01 10:21:58] [INFO ] Flatten gal took : 48 ms
[2024-06-01 10:21:58] [INFO ] Input system was already deterministic with 422 transitions.
Support contains 171 out of 573 places (down from 173) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 73 to 71
RANDOM walk for 40000 steps (8 resets) in 2402 ms. (16 steps per ms) remains 41/71 properties
BEST_FIRST walk for 4004 steps (8 resets) in 46 ms. (85 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 42 ms. (93 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4002 steps (8 resets) in 51 ms. (76 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 34 ms. (114 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4002 steps (8 resets) in 34 ms. (114 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 40 ms. (97 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 50 ms. (78 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 30 ms. (129 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 57 ms. (69 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 34 ms. (114 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 28 ms. (138 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 26 ms. (148 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 42 ms. (93 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4002 steps (8 resets) in 28 ms. (138 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 31 ms. (125 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 34 ms. (114 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 48 ms. (81 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 31 ms. (125 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 34 ms. (114 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 27 ms. (142 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 33 ms. (117 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 29 ms. (133 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 31 ms. (125 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 42 ms. (93 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 21 ms. (181 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 20 ms. (190 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 41/41 properties
BEST_FIRST walk for 4003 steps (8 resets) in 22 ms. (174 steps per ms) remains 41/41 properties
[2024-06-01 10:22:00] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/99 variables, 99/99 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/99 variables, 0/99 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 2 (OVERLAPS) 90/189 variables, 88/187 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/189 variables, 90/277 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/189 variables, 0/277 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 5 (OVERLAPS) 384/573 variables, 183/460 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/573 variables, 384/844 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/573 variables, 0/844 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 8 (OVERLAPS) 422/995 variables, 573/1417 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/995 variables, 0/1417 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 10 (OVERLAPS) 0/995 variables, 0/1417 constraints. Problems are: Problem set: 0 solved, 41 unsolved
No progress, stopping.
After SMT solving in domain Real declared 995/995 variables, and 1417 constraints, problems are : Problem set: 0 solved, 41 unsolved in 2079 ms.
Refiners :[Domain max(s): 573/573 constraints, Positive P Invariants (semi-flows): 271/271 constraints, State Equation: 573/573 constraints, PredecessorRefiner: 41/41 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 41 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/99 variables, 99/99 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/99 variables, 0/99 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 2 (OVERLAPS) 90/189 variables, 88/187 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/189 variables, 90/277 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/189 variables, 0/277 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 5 (OVERLAPS) 384/573 variables, 183/460 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/573 variables, 384/844 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/573 variables, 0/844 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 8 (OVERLAPS) 422/995 variables, 573/1417 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/995 variables, 41/1458 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/995 variables, 0/1458 constraints. Problems are: Problem set: 0 solved, 41 unsolved
At refinement iteration 11 (OVERLAPS) 0/995 variables, 0/1458 constraints. Problems are: Problem set: 0 solved, 41 unsolved
No progress, stopping.
After SMT solving in domain Int declared 995/995 variables, and 1458 constraints, problems are : Problem set: 0 solved, 41 unsolved in 4846 ms.
Refiners :[Domain max(s): 573/573 constraints, Positive P Invariants (semi-flows): 271/271 constraints, State Equation: 573/573 constraints, PredecessorRefiner: 41/41 constraints, Known Traps: 0/0 constraints]
After SMT, in 6948ms problems are : Problem set: 0 solved, 41 unsolved
Fused 41 Parikh solutions to 26 different solutions.
Finished Parikh walk after 1142 steps, including 0 resets, run visited all 1 properties in 8 ms. (steps per millisecond=142 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 41 properties in 5286 ms.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 33 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:22:12] [INFO ] Input system was already deterministic with 422 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 16 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 26 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 25 ms
[2024-06-01 10:22:12] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 573 transition count 421
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 572 transition count 421
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 571 transition count 420
Applied a total of 4 rules in 61 ms. Remains 571 /573 variables (removed 2) and now considering 420/422 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 61 ms. Remains : 571/573 places, 420/422 transitions.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 21 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 22 ms
[2024-06-01 10:22:12] [INFO ] Input system was already deterministic with 420 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 10 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 20 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 21 ms
[2024-06-01 10:22:12] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 10 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 21 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 22 ms
[2024-06-01 10:22:12] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 573 transition count 421
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 572 transition count 421
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 571 transition count 420
Applied a total of 4 rules in 38 ms. Remains 571 /573 variables (removed 2) and now considering 420/422 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 571/573 places, 420/422 transitions.
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 19 ms
[2024-06-01 10:22:12] [INFO ] Flatten gal took : 20 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 420 transitions.
RANDOM walk for 1922 steps (0 resets) in 342 ms. (5 steps per ms) remains 0/1 properties
FORMULA ShieldIIPt-PT-030A-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 10 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 21 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 23 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 6 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 19 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 19 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 6 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 573 transition count 421
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 572 transition count 421
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 571 transition count 420
Applied a total of 4 rules in 30 ms. Remains 571 /573 variables (removed 2) and now considering 420/422 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 571/573 places, 420/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 420 transitions.
RANDOM walk for 40000 steps (8 resets) in 860 ms. (46 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40002 steps (8 resets) in 298 ms. (133 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 6868 steps, run visited all 1 properties in 62 ms. (steps per millisecond=110 )
Probabilistic random walk after 6868 steps, saw 6639 distinct states, run finished after 66 ms. (steps per millisecond=104 ) properties seen :1
FORMULA ShieldIIPt-PT-030A-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 9 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:13] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 6 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:13] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 6 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 572 transition count 420
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 570 transition count 420
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 568 transition count 419
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 6 place count 568 transition count 418
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 8 place count 567 transition count 418
Applied a total of 8 rules in 37 ms. Remains 567 /573 variables (removed 6) and now considering 418/422 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 567/573 places, 418/422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 12 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 12 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 418 transitions.
RANDOM walk for 4879 steps (0 resets) in 51 ms. (93 steps per ms) remains 0/1 properties
FORMULA ShieldIIPt-PT-030A-CTLFireability-2023-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 9 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 422 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 573 transition count 421
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 572 transition count 421
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 5 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 571 transition count 420
Applied a total of 4 rules in 31 ms. Remains 571 /573 variables (removed 2) and now considering 420/422 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 571/573 places, 420/422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 20 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 420 transitions.
RANDOM walk for 40000 steps (8 resets) in 380 ms. (104 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40002 steps (8 resets) in 289 ms. (137 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 9438 steps, run visited all 1 properties in 71 ms. (steps per millisecond=132 )
Probabilistic random walk after 9438 steps, saw 9168 distinct states, run finished after 72 ms. (steps per millisecond=131 ) properties seen :1
FORMULA ShieldIIPt-PT-030A-CTLFireability-2023-14 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in LTL mode, iteration 0 : 573/573 places, 422/422 transitions.
Applied a total of 0 rules in 7 ms. Remains 573 /573 variables (removed 0) and now considering 422/422 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 573/573 places, 422/422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 17 ms
[2024-06-01 10:22:14] [INFO ] Input system was already deterministic with 422 transitions.
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:14] [INFO ] Flatten gal took : 18 ms
[2024-06-01 10:22:14] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-06-01 10:22:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 573 places, 422 transitions and 1804 arcs took 4 ms.
Total runtime 78544 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-00
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-01
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-02
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-03
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-05
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-06
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-07
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-09
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-10
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2024-11
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2023-13
Could not compute solution for formula : ShieldIIPt-PT-030A-CTLFireability-2023-15

BK_STOP 1717237335202

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/526/ctl_0_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/526/ctl_1_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/526/ctl_2_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/526/ctl_3_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/526/ctl_4_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/526/ctl_5_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/526/ctl_6_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/526/ctl_7_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/526/ctl_8_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/526/ctl_9_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/526/ctl_10_
ctl formula name ShieldIIPt-PT-030A-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/526/ctl_11_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-030A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is ShieldIIPt-PT-030A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r528-tall-171683760800290"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-030A.tgz
mv ShieldIIPt-PT-030A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;