fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r524-tall-171679081200854
Last Updated
July 7, 2024

About the Execution of LTSMin+red for SharedMemory-PT-000200

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
13070.516 209373.00 547957.00 511.10 TFFTFTTFTFTFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679081200854.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SharedMemory-PT-000200, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679081200854
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 505M
-rw-r--r-- 1 mcc users 18M Apr 14 12:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66M Apr 14 12:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 28M Apr 14 02:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 107M Apr 14 02:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3M Apr 23 07:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12M Apr 23 07:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13M Apr 23 07:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 39M Apr 23 07:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 21M Apr 15 07:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 71M Apr 15 07:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19M Apr 15 01:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70M Apr 15 01:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 22K Apr 23 07:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 57K Apr 23 07:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 42M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-00
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-01
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-02
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-03
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-04
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-05
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-06
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-07
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-08
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-09
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-10
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-11
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-12
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-13
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-14
FORMULA_NAME SharedMemory-PT-000200-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717241403392

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000200
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 11:30:04] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 11:30:04] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 11:30:06] [INFO ] Load time of PNML (sax parser for PT used): 1752 ms
[2024-06-01 11:30:06] [INFO ] Transformed 40601 places.
[2024-06-01 11:30:06] [INFO ] Transformed 80200 transitions.
[2024-06-01 11:30:06] [INFO ] Found NUPN structural information;
[2024-06-01 11:30:06] [INFO ] Parsed PT model containing 40601 places and 80200 transitions and 320000 arcs in 2245 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 1240 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 3963 steps (0 resets) in 120687 ms. (0 steps per ms) remains 10/14 properties
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
BEST_FIRST walk for 13705 steps (0 resets) in 21172 ms. (0 steps per ms) remains 10/10 properties
BEST_FIRST walk for 23070 steps (4 resets) in 20728 ms. (1 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 1156 ms. (34 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 688 ms. (58 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 623 ms. (64 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 550 ms. (72 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 561 ms. (71 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 547 ms. (73 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 548 ms. (72 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 581 ms. (68 steps per ms) remains 10/10 properties
// Phase 1: matrix 80200 rows 40601 cols
[2024-06-01 11:31:25] [INFO ] Computed 401 invariants in 33293 ms
SMT process timed out in 56103ms, After SMT, problems are : Problem set: 0 solved, 10 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 40601 out of 40601 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 40601/40601 places, 80200/80200 transitions.
Applied a total of 0 rules in 892 ms. Remains 40601 /40601 variables (removed 0) and now considering 80200/80200 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 913 ms. Remains : 40601/40601 places, 80200/80200 transitions.
RANDOM walk for 3854 steps (0 resets) in 120817 ms. (0 steps per ms) remains 10/10 properties
BEST_FIRST walk for 13517 steps (0 resets) in 20857 ms. (0 steps per ms) remains 10/10 properties
BEST_FIRST walk for 27022 steps (4 resets) in 20500 ms. (1 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 466 ms. (85 steps per ms) remains 9/10 properties
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
BEST_FIRST walk for 40004 steps (8 resets) in 431 ms. (92 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 533 ms. (74 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 434 ms. (91 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 446 ms. (89 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 434 ms. (91 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 521 ms. (76 steps per ms) remains 9/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 642 ms. (62 steps per ms) remains 9/9 properties
[2024-06-01 11:32:31] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/40601 variables, 40601/40601 constraints. Problems are: Problem set: 0 solved, 9 unsolved
Problem SharedMemory-PT-000200-ReachabilityCardinality-2024-03 is UNSAT
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-03 TRUE TECHNIQUES SMT_REFINEMENT
Problem SharedMemory-PT-000200-ReachabilityCardinality-2024-07 is UNSAT
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-07 FALSE TECHNIQUES SMT_REFINEMENT
At refinement iteration 1 (INCLUDED_ONLY) 0/40601 variables, 401/41002 constraints. Problems are: Problem set: 2 solved, 7 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/40601 variables, 0/41002 constraints. Problems are: Problem set: 2 solved, 7 unsolved
SMT process timed out in 59109ms, After SMT, problems are : Problem set: 2 solved, 7 unsolved
Fused 7 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 14 out of 40601 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 40601/40601 places, 80200/80200 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 39786 transitions
Trivial Post-agglo rules discarded 39786 transitions
Performed 39786 trivial Post agglomeration. Transition count delta: 39786
Iterating post reduction 0 with 39786 rules applied. Total rules applied 39786 place count 40601 transition count 40414
Discarding 558 places :
Also discarding 545 output transitions
Drop transitions (Output transitions of discarded places.) removed 545 transitions
Remove reverse transitions (loop back) rule discarded transition End_Own_Acc_25_25 and 558 places that fell out of Prefix Of Interest.
Drop transitions (Empty/Sink Transition effects.) removed 37027 transitions
Ensure Unique test removed 2577 transitions
Reduce isomorphic transitions removed 39604 transitions.
Graph (trivial) has 41 edges and 71 vertex of which 26 / 71 are part of one of the 13 SCC in 1 ms
Free SCC test removed 13 places
Iterating post reduction 1 with 39606 rules applied. Total rules applied 79392 place count 58 transition count 265
Drop transitions (Empty/Sink Transition effects.) removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 2 with 26 rules applied. Total rules applied 79418 place count 58 transition count 239
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 13 Pre rules applied. Total rules applied 79418 place count 58 transition count 226
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 3 with 26 rules applied. Total rules applied 79444 place count 45 transition count 226
Drop transitions (Empty/Sink Transition effects.) removed 182 transitions
Reduce isomorphic transitions removed 182 transitions.
Iterating post reduction 3 with 182 rules applied. Total rules applied 79626 place count 45 transition count 44
Drop transitions (Redundant composition of simpler transitions.) removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 4 with 12 rules applied. Total rules applied 79638 place count 45 transition count 32
Ensure Unique test removed 12 places
Iterating post reduction 4 with 12 rules applied. Total rules applied 79650 place count 33 transition count 32
Free-agglomeration rule applied 2 times.
Iterating global reduction 5 with 2 rules applied. Total rules applied 79652 place count 33 transition count 30
Reduce places removed 2 places and 0 transitions.
Drop transitions (Empty/Sink Transition effects.) removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 79656 place count 31 transition count 28
Ensure Unique test removed 2 places
Iterating post reduction 6 with 2 rules applied. Total rules applied 79658 place count 29 transition count 28
Applied a total of 79658 rules in 2562 ms. Remains 29 /40601 variables (removed 40572) and now considering 28/80200 (removed 80172) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2562 ms. Remains : 29/40601 places, 28/80200 transitions.
RANDOM walk for 394 steps (0 resets) in 15 ms. (24 steps per ms) remains 0/7 properties
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000200-ReachabilityCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 208009 ms.
ITS solved all properties within timeout

BK_STOP 1717241612765

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000200"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SharedMemory-PT-000200, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679081200854"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000200.tgz
mv SharedMemory-PT-000200 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;