fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r524-tall-171679080900698
Last Updated
July 7, 2024

About the Execution of LTSMin+red for SharedMemory-COL-000005

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
283.191 5350.00 13700.00 48.00 ??T????F???F?TF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080900698.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SharedMemory-COL-000005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080900698
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 7.1K Apr 12 15:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Apr 12 15:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Apr 12 15:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Apr 12 15:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 07:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 15:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Apr 12 15:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Apr 12 15:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Apr 12 15:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 12K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-00
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-01
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-02
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-03
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-04
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-05
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-06
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-07
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-08
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-09
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-10
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-11
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-12
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-13
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-14
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717234406107

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-COL-000005
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 09:33:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 09:33:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 09:33:27] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 09:33:27] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 09:33:27] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 578 ms
[2024-06-01 09:33:27] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 46 PT places and 85.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
FORMULA SharedMemory-COL-000005-CTLFireability-2024-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 09:33:28] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 16 arcs in 4 ms.
[2024-06-01 09:33:28] [INFO ] Skeletonized 8 HLPN properties in 2 ms. Removed 7 properties that had guard overlaps.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 2 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 3 to 2
RANDOM walk for 51 steps (0 resets) in 7 ms. (6 steps per ms) remains 0/2 properties
[2024-06-01 09:33:28] [INFO ] Flatten gal took : 12 ms
[2024-06-01 09:33:28] [INFO ] Flatten gal took : 1 ms
Domain [P(5), P(5)] of place Ext_Mem_Acc breaks symmetries in sort P
[2024-06-01 09:33:28] [INFO ] Unfolded HLPN to a Petri net with 46 places and 60 transitions 220 arcs in 14 ms.
[2024-06-01 09:33:28] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Initial state reduction rules removed 4 formulas.
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 5 transitions.
FORMULA SharedMemory-COL-000005-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-CTLFireability-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-CTLFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 41 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 4 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
// Phase 1: matrix 55 rows 41 cols
[2024-06-01 09:33:28] [INFO ] Computed 11 invariants in 16 ms
[2024-06-01 09:33:28] [INFO ] Implicit Places using invariants in 161 ms returned []
[2024-06-01 09:33:28] [INFO ] Invariant cache hit.
[2024-06-01 09:33:28] [INFO ] Implicit Places using invariants and state equation in 73 ms returned []
Implicit Place search using SMT with State Equation took 266 ms to find 0 implicit places.
Running 45 sub problems to find dead transitions.
[2024-06-01 09:33:28] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/36 variables, 6/6 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/36 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 2 (OVERLAPS) 5/41 variables, 5/11 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/41 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 4 (OVERLAPS) 55/96 variables, 41/52 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/96 variables, 0/52 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 6 (OVERLAPS) 0/96 variables, 0/52 constraints. Problems are: Problem set: 0 solved, 45 unsolved
No progress, stopping.
After SMT solving in domain Real declared 96/96 variables, and 52 constraints, problems are : Problem set: 0 solved, 45 unsolved in 613 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 41/41 constraints, PredecessorRefiner: 45/45 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 45 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/36 variables, 6/6 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/36 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 2 (OVERLAPS) 5/41 variables, 5/11 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/41 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 4 (OVERLAPS) 55/96 variables, 41/52 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/96 variables, 45/97 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/96 variables, 0/97 constraints. Problems are: Problem set: 0 solved, 45 unsolved
At refinement iteration 7 (OVERLAPS) 0/96 variables, 0/97 constraints. Problems are: Problem set: 0 solved, 45 unsolved
No progress, stopping.
After SMT solving in domain Int declared 96/96 variables, and 97 constraints, problems are : Problem set: 0 solved, 45 unsolved in 562 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 41/41 constraints, PredecessorRefiner: 45/45 constraints, Known Traps: 0/0 constraints]
After SMT, in 1240ms problems are : Problem set: 0 solved, 45 unsolved
Search for dead transitions found 0 dead transitions in 1255ms
Finished structural reductions in LTL mode , in 1 iterations and 1539 ms. Remains : 41/41 places, 55/55 transitions.
Support contains 41 out of 41 places after structural reductions.
[2024-06-01 09:33:29] [INFO ] Flatten gal took : 15 ms
[2024-06-01 09:33:29] [INFO ] Flatten gal took : 17 ms
[2024-06-01 09:33:29] [INFO ] Input system was already deterministic with 55 transitions.
Reduction of identical properties reduced properties to check from 20 to 12
RANDOM walk for 40000 steps (8 resets) in 1064 ms. (37 steps per ms) remains 1/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 1093 ms. (36 steps per ms) remains 1/1 properties
[2024-06-01 09:33:30] [INFO ] Invariant cache hit.
Problem AtomicPropp4 is UNSAT
After SMT solving in domain Real declared 25/96 variables, and 0 constraints, problems are : Problem set: 1 solved, 0 unsolved in 25 ms.
Refiners :[Positive P Invariants (semi-flows): 0/11 constraints, State Equation: 0/41 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 40ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 11 simplifications.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 11 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 13 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 6 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 4 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 3 ms
[2024-06-01 09:33:30] [INFO ] Input system was already deterministic with 55 transitions.
[2024-06-01 09:33:30] [INFO ] Flatten gal took : 12 ms
[2024-06-01 09:33:31] [INFO ] Flatten gal took : 8 ms
[2024-06-01 09:33:31] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 12 ms.
[2024-06-01 09:33:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 55 transitions and 200 arcs took 3 ms.
Total runtime 3849 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-00
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-01
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-03
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-04
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-05
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-06
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-08
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-09
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-10
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-12
Could not compute solution for formula : SharedMemory-COL-000005-CTLFireability-2024-15

BK_STOP 1717234411457

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/505/ctl_0_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/505/ctl_1_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/505/ctl_2_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/505/ctl_3_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/505/ctl_4_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/505/ctl_5_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/505/ctl_6_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/505/ctl_7_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/505/ctl_8_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/505/ctl_9_
ctl formula name SharedMemory-COL-000005-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/505/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SharedMemory-COL-000005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080900698"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000005.tgz
mv SharedMemory-COL-000005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;